HN27C256AG15

HN27C256AG Series 32768-word × 8-bit UV Erasable and Programmable ROM Maintenance only Description This Hitachi HN27C256AG is a 256-kbit ultraviolet erasable and electrically programmable ROM, featuring high speed and low power dissipation. Fabricated on advanced fine process and high speed circuitry technique, the HN27C256AG makes high speed access time possible for 16 bit microprocessors such as the 8086 and 68000. And low power dissipation in active and standby modes matches our CMOS 256-kbit EPROM. In programming operation, the HN27C256AG realizes faster programming times than our conventional 256-kbit EPROM by Hitachi’s Fast High-Reliability Programming Algorithm. Pin arrangement, pin configuration and programming voltage are compatible with our 256-kbit EPROM series, therefore existing programmers can be used with the HN27C256AG. Features • High speed Access time: 100/120/150 ns (max) • Low power dissipation Active mode: 25 mW (typ) (f = 1 MHz) Standby mode: 5 µW (typ) • High reliability and fast programming Programming voltage: +12.5 V DC Fast High-Reliability Programming Algorithm available • Device identifier mode Manufacturer code and device code Ordering Information Type No. Access Time Package HN27C256AG-10 HN27C256AG-12 HN27C256AG-15 100 ns 120 ns 150 ns 600-mil 28-pin cerdip (DG-28) Note: This device is not available for new application. HN27C256AG Series Pin Arrangement VPP 1 28 VCC A12 2 27 A14 A7 3 26 A13 A6 4 25 A8 A5 5 24 A9 A4 6 23 A11 A3 7 22 OE A2 8 21 A10 A1 9 20 CE A0 10 19 I/O7 I/O0 11 18 I/O6 I/O1 12 17 I/O5 I/O2 13 16 I/O4 VSS 14 15 I/O3 (Top View) Pin Description Pin Name Function A0 – A14 Address I/O0 – I/O7 Input/output CE Chip enable OE Output enable VCC Power supply VPP Programming power supply VSS Ground 2 HN27C256AG Series X-Decoder Block Diagram A4 – A9 A12 – A14 512 × 512 Memory Matrix Address Input Data Control I/O0 I/O7 Y-Gating Y-Decoder CE A0 – A3 A10, A11 OE VCC VPP H H : High Threshold Inverter VSS 3 HN27C256AG Series Mode Selection Mode CE (20) OE (22) A9 (24) VPP (1) VCC (28) I/O (11 – 13, 15 – 19) Read VIL VIL X VCC VCC Dout Output disable VIL VIH X VCC VCC High-Z Standby VIH X X VCC VCC High-Z Program VIL VIH X VPP VCC Din Program verify VIH VIL X VPP VCC Dout Optional verify VIL VIL X VPP VCC Dout Program inhibit VIH VIH X VPP VCC High-Z VCC VCC Code Identifier VIL VIL VH *2 Notes: 1. × : Don’t care. 2. VH : 12.0 V ± 0.5 V. Absolute Maximum Ratings Parameter Symbol All input and output voltage A9 input voltage *1 Value Vin, Vout *1 Unit *2 V *2 –0.6 to +7.0 VID –0.6 to +13.5 V VPP voltage *1 VPP –0.6 to +13.5 V VCC voltage *1 VCC –0.6 to +7.0 V Operating temperature range Topr 0 to +70 °C Storage temperature range Tstg –65 to +125 °C Storage temperature range under bias Tbias –10 to +80 °C Notes: 1. Relative to VSS . 2. Vin, Vout, V ID min = –1.0 V for pulse width ≤ 50 ns. Capacitance (Ta = 25°C, f = 1 MHz) Parameter Symbol Min Typ Max Unit Test Conditions Input capacitance Cin — 4 8 pF Vin = 0 V Output capacitance Cout — 8 12 pF Vout = 0 V 4 HN27C256AG Series Read Operation DC Characteristics (Ta = 0 to +70°C, VCC = 5 V ± 10%, VPP = VCC) Parameter Symbol Min Typ Max Unit Test Conditions Input leakage current I LI — — 2 µA Vin = 0 V to VCC Output leakage current I LO — — 2 µA Vout = 0 V to VCC VPP current I PP1 — 1 20 µA VPP = 5.5 V Standby V CC current I SB1 — — 1 mA CE = VIH I SB2 — 1 20 µA CE = VCC ± 0.3 V I CC1 — — 30 mA CE = VIL, Iout = 0 mA I CC2 — — 30 mA f = 10 MHz, Iout = 0 mA I CC3 — 5 15 mA f = 1 MHz, Iout = 0 mA — 0.8 Operating VCC current Input low voltage *3 *3 VIL –0.3 *1 V *2 Input high voltage VIH 2.2 — VCC + 1.0 V Output low voltage VOL — — 0.45 V I OL = 2.1 mA Output high voltage VOH1 2.4 — — V I OH = –1.0 mA VOH2 VCC – 0.7 — — V I OH = –100 µA Notes: 1. VIL min = –1.0 V for pulse width ≤ 50 ns. 2. VIH max = VCC + 1.5 V for pulse width ≤ 20 ns. If V IH is over the specified maximum value, read operation cannot be guaranteed. 3. Only defined for DC function test. V IL max = 0.45 V, VIH min = 2.4 V for AC function test. 5 HN27C256AG Series AC Characteristics (Ta = 0 to +70°C, VCC = 5 V ± 10%, VPP = VCC) Test Conditions • • • • Input pulse levels: 0.45 V to 2.4 V Input rise and fall time: ≤ 10 ns Output load: 1TTL gate + 100 pF Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V Outputs; 0.8 V and 2.0 V HN27C256AG -10 Parameter Symbol Min -12 -15 Max Min Max Min Max Unit Test Conditions Address to output delay t ACC — 100 — 120 — 150 ns CE = OE = VIL CE to output delay t CE — 100 — 120 — 150 ns OE = VIL OE to output delay t OE — 60 — 60 — 70 ns CE = VIL OE high to output float t DF 0 35 0 40 0 50 ns CE = VIL Address to output hold t OH 5 — 5 — 5 — ns CE = OE = VIL Note: t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. Read Timing Waveform Address CE Standby Mode Active Mode Standby Mode tCE OE tDF tOE tACC Data Out 6 tOH Data Out Valid HN27C256AG Series Fast High-Reliability Programming This device can be applied the Fast High-Reliability Programming Algorithm shown in following flowchart. This algorithm offers both faster programming time and high reliability data retension. A theoretical programming time (except brank checking and verifying time) is one-tenth of conventional high performance programming algorithm’s. Regarding the model and software version of the programmers available this algorithm, please contact programmer maker. START SET PROG./VERIFY MODE VPP = 12.5 ± 0.5 V, VCC = 6.0 ± 0.25 V Address = 0 n=0 n+1 n Program tPW = 0.2 ms ± 5% Address + 1 VERIFY Address NOGO GO Program tOPW = 0.2n ms n = 25 NO YES NO LAST Address? YES SET READ MODE VCC = 5.0 V ± 0.5 V, VPP = VCC READ All Address NOGO GO END FAIL 7 HN27C256AG Series DC Characteristics (Ta = 25°C ± 5°C, VCC = 6 V ± 0.25 V, VPP = 12.5 V ± 0.5 V) Parameter Symbol Min Typ Max Unit Test Conditions Input leakage current I LI — — 2 µA Vin = 0 V to VCC VPP supply current I PP — — 30 mA CE = VIL Operating VCC current I CC — — 30 mA — 0.8 Input low level VIL –0.1 *5 V *6 Input high level VIH 2.2 — VCC + 0.5 V Output low voltage during verify VOL — — 0.45 V I OL = 2.1 mA Output high voltage during verify VOH 2.4 — — V I OH = –400 µA Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13.5 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12. 5V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V or 12.5 V to VIL when CE = Low. 5. VIL min = –0.6 V for pulse width ≤ 20 ns. 6. If V IH is over the specified maximum value, programming operation cannot be guaranteed. 8 HN27C256AG Series AC Characteristics (Ta = 25°C ± 5°C, VCC = 6 V ± 0.25 V, VPP = 12.5 V ± 0.5 V) Test Conditions • Input pulse levels: 0.45 V to 2.4 V • Input rise and fall time: ≤ 20 ns • Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V Outputs; 0.8 V and 2.0 V Parameter Symbol Min Typ Max Unit Address setup time t AS 2 — — µs OE setup time t OES 2 — — µs Data setup time t DS 2 — — µs Address hold time t AH 0 — — µs Data hold time t DH 2 — — µs VPP setup time t VPS 2 — — µs VCC setup time t VCS 2 — — µs 0.19 0.20 0.21 ms 0.19 — 5.25 ms 0 — 150 ns — — 130 ns CE initial programming pulse width t PW CE over programming pulse width t OPW Data valid from OE t OE OE to output float delay t DF *2 *1 Test Conditions Notes: 1. Refer to the Fast High-Reliability Programming Flowchart for tOPW. 2. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 9 HN27C256AG Series Fast High-Reliability Programming Timing Waveform Program Program Verify Address tAS Data tAH Data In Stable tDS Data Out Valid tDH tDF VPP VPP VCC tVPS VCC+1 VCC VCC tVCS CE tPW OE 10 tOES tOE HN27C256AG Series High Performance Programming This device can be applied the high performance programming algorithm shown in following flowchart. This algorithm is as same as our 256-kbit EPROM series so existing programmers can be used with this device. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data. START SET PROG./VERIFY MODE VPP = 12.5 ± 0.5 V, VCC = 6.0 ± 0.25 V Address = 0 n=0 n+1 n Program tPW = 1.0 ms ± 5% Address + 1 VERIFY Address NOGO GO Program tOPW = 3n ms n = 25 NO YES NO LAST Address? YES SET READ MODE VCC = 5.0 V ± 0.5 V, VPP = VCC READ All Address NOGO GO END FAIL 11 HN27C256AG Series DC Characteristics (Ta = 25°C ± 5°C, VCC = 6 V ± 0.25 V, VPP = 12.5 V ± 0.5 V) Parameter Symbol Min Typ Max Unit Test Conditions Input leakage current I LI — — 2 µA Vin = 0 V to VCC VPP supply current I PP — — 30 mA CE = VIL Operating VCC current I CC — — 30 mA — 0.8 Input low level VIL –0.1 *5 V *6 Input high level VIH 2.2 — VCC + 0.5 V Output low voltage during verify VOL — — 0.45 V I OL = 2.1 mA Output high voltage during verify VOH 2.4 — — V I OH = –400 µA Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13.5 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12. 5V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V or 12.5 V to VIL when CE = Low. 5. VIL min = –0.6 V for pulse width ≤ 20 ns. 6. If V IH is over the specified maximum value, programming operation cannot be guaranteed. 12 HN27C256AG Series AC Characteristics (Ta = 25°C ± 5°C, VCC = 6 V ± 0.25 V, VPP = 12.5 V ± 0.5 V) Test Conditions • Input pulse levels: 0.45 V to 2.4 V • Input rise and fall time: ≤ 20 ns • Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V Outputs; 0.8 V and 2.0 V Parameter Symbol Min Typ Max Unit Address setup time t AS 2 — — µs OE setup time t OES 2 — — µs Data setup time t DS 2 — — µs Address hold time t AH 0 — — µs Data hold time t DH 2 — — µs VPP setup time t VPS 2 — — µs VCC setup time t VCS 2 — — µs 0.95 1.0 1.05 ms 2.85 — 78.75 ms 0 — 150 ns — — 130 ns CE initial programming pulse width t PW CE over programming pulse width t OPW Data valid from OE t OE OE to output float delay t DF *2 *1 Test Conditions Notes: 1. Refer to the high performance programming flowchart for t OPW. 2. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 13 HN27C256AG Series High Performance Programming Timing Waveform Program Program Verify Address tAS Data tAH Data In Stable tDS Data Out Valid tDH tDF VPP VPP VCC tVPS VCC + 1 VCC VCC tVCS CE tPW tOES tOE OE Erase Erasure of HN27C256AG is performed by exposure to ultraviolet light of 2537 Å and all the output data are changed to “1” after this erasure procedure. The minimum integrated dose (i.e. UV intensity × exposure time) for erasure is 15 W · sec/cm2. Mode Description Device Identifier Mode Programming condition of EPROM is various according to EPROM manufacturers and device types. It may cause miss operation. To countermeasure it, some EPROMs provide maker identifier code. Users can write EPROM by reading out write condition coded before shipped. Some commercial programmers can set write condition by recognizing this code. This function enables effective program. Regarding commercial programmers that can recognize this device’s identifier code, please contact programmer maker. 14 HN27C256AG Series HN27C256AG Series Identifier Code Identifier A0 (10) I/O7 (19) I/O6 (18) I/O5 (17) I/O4 (16) I/O3 (15) I/O2 (13) I/O1 (12) I/O0 (11) Hex Data Manufacturer code VIL 0 0 0 0 0 1 1 1 07 Device code VIH 0 0 1 1 0 0 0 1 31 Notes: 1. A9 = 12.0 V ± 0.5 V. 2. A1 – A8, A10 – A14, CE, OE = VIL. 15 HN27C256AG Series Package Dimensions HN27C256AG Series (DG-28) Unit: mm 36.83 38.10 Max 28 14.66 15.51 Max 15 .89 φ8 1 1.32 14 15.24 2.54 ± 0.25 16 0.48 ± 0.10 2.54 Min 5.89 Max 0.38 Min 2.54 Max + 0.11 0.25 – 0.05 0 – 15°