Datasheet
ICL3224E, ICL3226E, ICL3244E
±15kV ESD Protected, +3V to +5.5V, 1µA, 250kbps, RS-232 Transceivers with
Enhanced Automatic Powerdown
The ICL3224E, ICL3226E, and ICL3244E devices are
3.0V to 5.5V powered RS-232 transmitters/receivers
that meet ElA/TIA-232 and V.28/V.24 specifications,
even at VCC = 3.0V. They provide ±15kV ESD
protection (IEC61000-4-2 Air Gap and Human Body
Model) on transmitter outputs and receiver inputs
(RS-232 pins). Targeted applications are PDAs,
Palmtops, and notebook and laptop computers where
the low operational power and even lower standby
power consumption are critical. Efficient on-chip
charge pumps coupled with manual and enhanced
automatic powerdown functions, reduce the standby
supply current to a 1µA trickle. Small footprint
packaging and the use of small, low value capacitors
ensure board space savings. Data rates greater than
250kbps are ensured at worst case load conditions.
This family is fully compatible with 3.3V only systems,
mixed 3.3V and 5.0V systems, and 5.0V only
systems.
The ICL3244E is a 3-driver, 5-receiver device that
provides a complete serial port suitable for laptop or
notebook computers. It also includes a noninverting
always-active receiver for “wake-up” capability.
The ICL3224E, ICL3226E, and ICL3244E feature an
enhanced automatic powerdown function that powers
down the on-chip power supply and driver circuits.
Powerdown occurs when all receiver and transmitter
inputs detect no signal transitions for a period of 30s.
These devices power back up automatically
whenever they sense a transition on any transmitter
or receiver input.
Table 1 summarizes the features of the device
represented by this datasheet and AN9863
summarizes the features of each device comprising
the ICL32xxE 3V family.
Related Literature
Features
• Pb-Free Plus Anneal Available (RoHS Compliant)
• ESD protection for RS-232 I/O pins to ±15kV
(IEC61000)
• Manual and enhanced automatic powerdown
• Drop in replacements for MAX3224E, MAX3226E,
MAX3244E
• Meets EIA/TIA-232 and V.28/V.24 specifications at
3V
• RS-232 compatible with VCC = 2.7V
• Latch-up free
• On-chip voltage converters require only four
external 0.1µF capacitors
• Ensured mouse driveability (ICL3244E)
• “Ready to Transmit” indicator output
(ICL3224E/ICL3226E)
• Receiver hysteresis for improved noise immunity
• Ensured minimum data rate 250kbps
• Ensured minimum slew rate 6V/µs
• Wide power supply range single +3V to +5.5V
• Low supply current in powerdown state 1µA
Applications
• Any system requiring RS-232 communication ports
○ Battery powered, hand-held, and portable
equipment
○ Laptop computers, notebooks, palmtops
○ Modems, printers, and other peripherals
○ Digital cameras
○ Cellular/mobile phones
For a full list of related documents, visit our website:
• ICL3224E, ICL3226E, and ICL3244E device pages
FN4899 Rev.7.00
Jun.11.19
Page 1 of 28
ICL3224E, ICL3226E, ICL3244E
Contents
1.
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
1.2
1.3
1.4
2.
Typical Operating Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
5
6
6
Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
2.2
2.3
2.4
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
8
8
9
3.
Typical Performance Curves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.
Application Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1
4.1.1
4.2
4.3
4.4
4.4.1
4.4.2
4.4.3
4.4.4
4.4.5
4.5
4.6
4.7
4.8
4.9
4.10
4.11
4.12
5.
Charge-Pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Charge Pump Abs Max Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Powerdown Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Software Controlled (Manual) Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
INVALID Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enhanced Automatic Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Emulating Standard Automatic Powerdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hybrid Automatic Powerdown Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
READY Output (ICL3224E and ICL3226E only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Supply Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operation Down to 2.7V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitter Outputs when Exiting Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mouse Driveability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interconnection with 3V and 5V Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
12
13
13
15
16
16
17
18
18
19
19
19
19
19
20
20
21
±15kV ESD Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1
5.2
5.3
5.4
Human Body Model (HBM) Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IEC61000-4-2 Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Air-gap discharge test method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact Discharge Test Method. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
22
22
22
22
6.
Die Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.
Package Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
FN4899 Rev.7.00
Jun.11.19
Page 2 of 28
ICL3224E, ICL3226E, ICL3244E
1.
1.1
1. Overview
Overview
Typical Operating Circuits
+3.3V
+
0.1µF
C1
0.1µF
2
+
4
C2
0.1µF
5
+
6
T1IN
T2IN
TTL/CMOS
LOGIC LEVELS
R1OUT
C1+
19
VCC
V+
C1C2+
V- 7
C2T1
13
17
T2
12
8
15
16
5kΩ
R1
R2OUT
10
9
5kΩ
R2
1
14
3
READY
FORCEOFF
INVALID
FORCEON
20
11
+ C3
0.1µF
C4
0.1µF
+
T1OUT
T2OUT
R1IN
RS-232
LEVELS
R2IN
VCC
TO POWER
CONTROL LOGIC
GND
18
Figure 1. ICL3224E
+3.3V
+
0.1µF
15
C1
0.1µF
C2
0.1µF
TTL/CMOS
LOGIC LEVELS
T1IN
R1OUT
2
+ C1+
4
C15
+ C2+
6
C2-
VCC
V+
V- 7
T1
11
13
9
1
3
8
READY
C4
+ 0.1µF
T1OUT
R1IN
RS-232
LEVELS
5kΩ
R1
16
12
+ C3
0.1µF
FORCEOFF
FORCEON
GND
INVALID
10
VCC
TO POWER
CONTROL LOGIC
14
Figure 2. ICL3226E
FN4899 Rev.7.00
Jun.11.19
Page 3 of 28
ICL3224E, ICL3226E, ICL3244E
1. Overview
+3.3V
+
C1
0.1µF
C2
0.1µF
T1IN
T2IN
T3IN
0.1µF
28
C1+
24
C11
C2+
+
2
C2+
26
VCC
27
V+
V-
14
T1
13
T2
12
T3
3
9
10
11
+
C3
0.1µF
C4
0.1µF
+
T1OUT
T2OUT
RS-232
LEVELS
T3OUT
20
R2OUTB
TTL/CMOS
LOGIC LEVELS
R1OUT
R2OUT
19
4
R1
18
5
R2
17
6
R3IN
R3
5kΩ
16
7
R4
R5OUT
TO POWER
CONTROL LOGIC
22
21
RS-232
LEVELS
R4IN
5kΩ
15
23
VCC
R2IN
5kΩ
R3OUT
R4OUT
R1IN
5kΩ
8
5kΩ
R5
FORCEON
R5IN
FORCEOFF
INVALID GND
25
Figure 3. ICL3244E
FN4899 Rev.7.00
Jun.11.19
Page 4 of 28
ICL3224E, ICL3226E, ICL3244E
1.2
1. Overview
Ordering Information
Part Number
(Notes 2, 3)
Part Marking
Temp Range (°C)
ICL3224EIAZ
3224EIAZ
-40 to 85
ICL3224EIAZ-T
3224EIAZ
-40 to 85
ICL3224ECAZ (No longer
available, recommended
replacement: ICL3224EIAZ)
3224ECAZ
0 to 70
ICL3224ECAZ-T (No longer
available, recommended
replacement: ICL3224EIAZ-T)
3224ECAZ
0 to 70
ICL3226EIAZ
3226EIAZ
-40 to 85
ICL3226EIAZ-T
3226EIAZ
-40 to 85
ICL3226ECAZ (No longer
available, recommended
replacement: ICL3226EIAZ)
3226ECAZ
0 to 70
ICL3226ECAZ-T (No longer
available, recommended
replacement: ICL3226EIAZ-T)
3226ECAZ
0 to 70
ICL3244EIAZ
ICL3244EIAZ
-40 to 85
ICL3244EIAZ-T
ICL3244EIAZ
-40 to 85
ICL3244ECAZ (No longer
available, recommended
replacement: ICL3244EIAZ)
ICL3244ECAZ
0 to 70
ICL3244ECAZ-T (No longer
available, recommended
replacement: ICL3244EIAZ-T)
ICL3244ECAZ
0 to 70
Tape and Reel
(Units) (Note 1)
Package
(RoHS Compliant)
1k
1k
1k
1k
1k
1k
Pkg. Dwg. #
20 Ld SSOP
M20.209
20 Ld SSOP
M20.209
20 Ld SSOP
M20.209
20 Ld SSOP
M20.209
16 Ld SSOP
M16.209
16 Ld SSOP
M16.209
16 Ld SSOP
M16.209
16 Ld SSOP
M16.209
28 Ld SSOP
M28.209
28 Ld SSOP
M28.209
28 Ld SSOP
M28.209
28 Ld SSOP
M28.209
Notes:
1. See TB347 for details about reel specifications.
2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J-STD-020.
3. For Moisture Sensitivity Level (MSL), see the ICL3224E, ICL3226E, and ICL3244E device pages. For more information about MSL, see
TB363.
Table 1.
Summary of Features
Data Rate
(kbps)
Rx. Enable
Function?
Ready
Output?
Manual
Powerdown?
Enhanced
Automatic
Powerdown
Function?
Part Number
Number
of Tx.
Number
of Rx.
Number of
Monitor Rx.
(ROUTB)
ICL3224E
2
2
0
250
No
Yes
Yes
Yes
ICL3226E
1
1
0
250
No
Yes
Yes
Yes
ICL3244E
3
5
1
250
No
No
Yes
Yes
FN4899 Rev.7.00
Jun.11.19
Page 5 of 28
ICL3224E, ICL3226E, ICL3244E
1.3
1. Overview
Pin Configurations
ICL3224E (SSOP)
Top View
READY 1
C1+ 2
3
ICL3226E (SSOP)
Top View
20 FORCEOFF
READY 1
C1+ 2
19 VCC
3
16 FORCEOFF
15 VCC
18 GND
V+
C1- 4
17 T1OUT
C1- 4
13 T1OUT
C2+ 5
16 R1IN
C2+ 5
12 FORCEON
C2- 6
15 R1OUT
C2- 6
11 T1IN
V+
V- 7
14 FORCEON
T2OUT 8
13 T1IN
R2IN 9
12 T2IN
R2OUT 10
V- 7
R1IN 8
14 GND
10 INVALID
9 R1OUT
11 INVALID
ICL3244E (SSOP)
Top View
C2+ 1
28 C1+
C2- 2
27 V+
V-
1.4
3
26 VCC
R1IN 4
25 GND
R2IN 5
24 C1-
R3IN 6
23 FORCEON
R4IN 7
22 FORCEOFF
R5IN 8
21 INVALID
T1OUT 9
20 R2OUTB
T2OUT 10
19 R1OUT
T3OUT 11
18 R2OUT
T3IN 12
17 R3OUT
T2IN 13
16 R4OUT
T1IN 14
15 R5OUT
Pin Descriptions
Pin
Function
VCC
System power supply input (3.0V to 5.5V).
V+
Internally generated positive transmitter supply (+5.5V).
V-
Internally generated negative transmitter supply (-5.5V).
GND
Ground connection.
C1+
External capacitor (voltage doubler) is connected to this lead.
C1-
External capacitor (voltage doubler) is connected to this lead.
C2+
External capacitor (voltage inverter) is connected to this lead.
C2-
External capacitor (voltage inverter) is connected to this lead.
TIN
TTL/CMOS compatible transmitter Inputs.
FN4899 Rev.7.00
Jun.11.19
Page 6 of 28
ICL3224E, ICL3226E, ICL3244E
Pin
TOUT
RIN
1. Overview
Function
±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.
±15kV ESD Protected, RS-232 compatible receiver inputs.
ROUT
TTL/CMOS level receiver outputs.
ROUTB
TTL/CMOS level, noninverting, always enabled receiver outputs.
INVALID
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
READY
Active high output that indicates when the ICL32XXE is ready to transmit (V- ≤ -4V)
FORCEOFF
Active low to shut down transmitters and on-chip power supply, which overrides any automatic circuitry and FORCEON (See
Table 2).
FORCEON
Active high input to override automatic powerdown circuitry and keeps transmitters active. (FORCEOFF must be high).
FN4899 Rev.7.00
Jun.11.19
Page 7 of 28
ICL3224E, ICL3226E, ICL3244E
2.
2. Specifications
Specifications
2.1
Absolute Maximum Ratings
Parameter
Minimum
Maximum
Unit
VCC to GND
-0.3
6
V
V+ to GND
-0.3
7
V
V- to GND
+0.3
-7
V
14
V
6
V
±25
V
±13.2
V
VCC + 0.3
V
V+ to VInput Voltages
TIN, FORCEOFF, FORCEON
-0.3
RIN
Output Voltages
TOUT
ROUT, INVALID, READY
-0.3
Short-Circuit Duration
TOUT
Continuous
ESD Rating
(See “ESD Performance” on page 10)
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions can adversely
impact product reliability and result in failures not covered by warranty.
2.2
Thermal Information
Thermal Resistance (Typical, Note 4)
θJA (°C/W)
16 Ld SSOP Package
140
20 Ld SSOP Package
125
28 Ld SSOP Package
100
Notes:
4. θJA is measured with the component mounted on a low-effective thermal conductivity test board in free air. See TB379 for details.
Parameter
Minimum
Maximum Junction Temperature (Plastic Package)
Maximum Storage Temperature Range
-65
Pb-Free Reflow Profile
2.3
Maximum
Unit
+150
°C
+150
°C
see TB493
Recommended Operating Conditions
Parameter
Minimum
Maximum
Unit
ICL32xxEC
0
+70
°C
ICL32xxEI
-40
+85
°C
Temperature Range
FN4899 Rev.7.00
Jun.11.19
Page 8 of 28
ICL3224E, ICL3226E, ICL3244E
2.4
2. Specifications
Electrical Specifications
Test conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; unless otherwise specified. Typicals are at TA = +25°C.
Parameter
Test Conditions
Temp
(°C)
Min
Typ
Max
Unit
DC Characteristics
Supply Current, Automatic
Powerdown
All RIN Open, FORCEON = GND, FORCEOFF = VCC
+25
-
1.0
10
µA
Supply Current, Powerdown
FORCEOFF = GND
+25
-
1.0
10
µA
Supply Current,
All outputs unloaded, FORCEON = FORCEOFF = VCC
Automatic Powerdown Disabled
+25
-
0.3
1.0
mA
Logic and Transmitter Inputs and Receiver Outputs
Input Logic Threshold Low
TIN, FORCEON, FORCEOFF
Full
-
-
0.8
V
Input Logic Threshold High
TIN, FORCEON,
FORCEOFF
VCC = 3.3V
Full
2.0
-
-
V
VCC = 5.0V
Full
2.4
-
-
V
+25
-
0.5
-
V
Transmitter Input Hysteresis
Input Leakage Current
TIN, FORCEON, FORCEOFF
Full
-
±0.01
±1.0
µA
Output Leakage Current
FORCEOFF = GND, ICL3244E Only
Full
-
±0.05
±10
µA
Output Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
Output Voltage High
IOUT = -1.0mA
Full
-
V
VCC - 0.6 VCC - 0.1
Receiver Inputs
Input Voltage Range
Full
-25
-
25
V
VCC = 3.3V
+25
0.6
1.2
-
V
VCC = 5.0V
+25
0.8
1.5
-
V
VCC = 3.3V
+25
-
1.5
2.4
V
VCC = 5.0V
+25
-
1.8
2.4
V
Input Hysteresis
+25
-
0.5
-
V
Input Resistance
+25
3
5
7
kΩ
Input Threshold Low
Input Threshold High
Transmitter Outputs
Output Voltage Swing
All transmitter outputs loaded with 3kΩ to Ground
Full
±5.0
±5.4
-
V
Output Resistance
VCC = V+ = V- = 0V, transmitter output = ±2V
Full
300
10M
-
W
Full
-
±35
±60
mA
Full
-
-
±25
µA
Full
±5
-
-
V
Output Short-Circuit Current
Output Leakage Current
VOUT = ±12V, VCC = 0V or 3V to 5.5V
Automatic Powerdown or FORCEOFF = GND
Mouse Driveability (ICL3244E only)
Transmitter Output Voltage
(See Figure 20 on page 20)
T1IN = T2IN = GND, T3IN = VCC, T3OUT loaded with 3kΩ
to GND, T1OUT and T2OUT loaded with 2.5mA each
Enhanced Automatic Powerdown (FORCEON = GND, FORCEOFF = VCC)
Receiver Input Thresholds to
INVALID High
See Figure 15 on page 17
Full
-2.7
-
2.7
V
Receiver Input Thresholds to
INVALID Low
See Figure 15 on page 17
Full
-0.3
-
0.3
V
INVALID, READY Output
Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
INVALID, READY Output
Voltage High
IOUT = -1.0mA
Full
VCC - 0.6
-
-
V
FN4899 Rev.7.00
Jun.11.19
Page 9 of 28
ICL3224E, ICL3226E, ICL3244E
2. Specifications
Test conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; unless otherwise specified. Typicals are at TA = +25°C. (Continued)
Temp
(°C)
Min
Typ
Max
Unit
Receiver Positive or Negative
Threshold to INVALID High
Delay (tINVH)
+25
-
1
-
µs
Receiver Positive or Negative
Threshold to INVALID Low
Delay (tINVL)
+25
-
30
-
µs
Receiver or Transmitter Edge to (Note 5)
Transmitters Enabled Delay
(tWU)
+25
-
100
-
µs
Receiver or Transmitter Edge to (Note 5)
Transmitters Disabled Delay
(tAUTOPWDN)
Full
15
30
60
sec
Parameter
Test Conditions
Timing Characteristics
Maximum Data Rate
RL = 3kΩ, CL = 1000pF, one transmitter switching
Full
250
500
-
kbps
Receiver Propagation Delay
Receiver input to receiver
output, CL = 150pF
tPHL
+25
-
0.15
-
µs
tPLH
+25
-
0.15
-
µs
Receiver Output Enable Time
Normal operation (ICL3244E only)
+25
-
200
-
ns
Receiver Output Disable Time
Normal operation (ICL3244E only)
+25
-
200
-
ns
Transmitter Skew
tPHL - tPLH
+25
-
100
-
ns
Receiver Skew
tPHL - tPLH
+25
-
50
-
ns
Transition Region Slew Rate
VCC = 3.3V,
RL = 3kΩ to 7kΩ,
measured from 3V to -3V
or -3V to 3V
CL = 150pF to 1000pF
+25
6
-
30
V/µs
CL = 150pF to 2500pF
+25
4
8
30
V/µs
Human Body Model
+25
-
±15
-
kV
IEC61000-4-2 Contact Discharge
+25
-
±8
-
kV
IEC61000-4-2 Air Gap Discharge
+25
-
±15
-
kV
Human body model (HBM)
+25
-
±3
-
kV
ESD Performance
RS-232 Pins (TOUT, RIN)
All Other Pins
Notes:
5. An “edge” is defined as a transition through the transmitter or receiver input thresholds.
FN4899 Rev.7.00
Jun.11.19
Page 10 of 28
ICL3224E, ICL3226E, ICL3244E
3.
3. Typical Performance Curves
Typical Performance Curves
Typical Performance Curves VCC = 3.3V, TA = 25°C
6
25
VOUT+
20
2
Slew Rate (V/µs)
Transmitter Output Voltage (V)
4
1 Transmitter at 250kbps
Other Transmitters at 30kbps
0
-2
-SLEW
15
+SLEW
10
-4
-6
VOUT -
0
1000
2000
3000
4000
5
5000
0
1000
Load Capacitance (pF)
2000
3000
Figure 4. Transmitter Output Voltage vs Load
Capacitance
35
ICL3226E
ICL3224E
35
30
250kbps
250kbps
30
25
Supply Current (mA)
Supply Current (mA)
5000
Figure 5. Slew Rate vs Load Capacitance
40
120kbps
20
15
20kbps
10
25
20
120kbps
15
10
20kbps
5
5
0
0
1000
2000
3000
4000
5000
0
1000
Load Capacitance (pF)
2000
3000
3.5
ICL3244E
40
250kbps
Supply Current (mA)
2.5
30
120kbps
20
20kbps
15
10
0
1000
2000
3000
4000
2.0
1.5
1.0
0.5
5000
Load Capacitance (pF)
Figure 8. Supply Current vs Load Capacitance When
Transmitting Data
FN4899 Rev.7.00
Jun.11.19
No Load
All Outputs Static
3.0
25
5000
Figure 7. Supply Current vs Load Capacitance When
Transmitting Data
45
35
4000
Load Capacitance (pF)
Figure 6. Supply Current vs Load Capacitance when
Transmitting Data
Supply Current (mA)
4000
Load Capacitance (pF)
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Load Capacitance (pF)
Figure 9. Supply Current vs Supply Voltage
Page 11 of 28
ICL3224E, ICL3226E, ICL3244E
4.
4. Application Information
Application Information
The ICL3224E, ICL3226E, and ICL3244E operate from a single +3V to +5.5V supply, ensure a 250kbps minimum
data rate, require only four small external 0.1µF capacitors, feature low power consumption, and meet all ElA
RS-232C and V.28 specifications.
4.1
Charge-Pump
The ICL32xxE use regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate
±5.5V transmitter supplies from a VCC supply as low as 3.0V, which allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of 3.3V powered systems. The efficient on-chip power
supplies require only four small, external 0.1µF capacitors for the voltage doubler and inverter functions at
VCC = 3.3V. See the Capacitor Selection section, and Table 6 on page 19 for capacitor recommendations for other
operating conditions. The charge pumps operate discontinuously turning off with the V+ and V- supplies are
pumped up to the nominal values), resulting in significant power savings.
4.1.1 Charge Pump Abs Max Ratings
These 3V to 5V RS-232 transceivers have been fully characterized for 3.0V to 3.6V operation, and at critical
points for 4.5V to 5.5V operation. Furthermore, load conditions were favorable using static logic states only.
The specified maximum values for V+ and V- are +7V and -7V respectively. These limits apply for VCC values set
to 3.0V and 3.6V (see Table 2). For VCC values set to 4.5V and 5.5V, the maximum values for V+ and V- can
approach +9V and -7V respectively (see Table 3). The breakdown characteristics for V+ and V- were measured
with ±13V.
Table 2.
V+ and V- Values for VCC = 3.0V to 3.6V
V+ (V)
V- (V)
C1 (μF)
C2, C3, C4 (μF)
Load
T1IN (Logic
State)
0.1
0.1
Open
H
5.8
6.56
-5.6
-5.88
3kΩ // 1000pF
0.047
0.33
Open
3kΩ // 1000pF
1
1
Open
3kΩ // 1000pF
FN4899 Rev.7.00
Jun.11.19
VCC = 3.0V
VCC = 3.6V
VCC = 3.0V
VCC = 3.6V
L
5.8
6.56
-5.6
-5.88
2.4kbps
5.8
6.56
-5.6
-5.88
H
5.88
6.6
-5.56
-5.92
L
5.76
6.36
-5.56
-5.76
2.4kbps
6
6.64
-5.64
-5.96
H
5.68
6
-5.6
-5.6
L
5.68
6
-5.6
-5.6
2.4kbps
5.68
6
-5.6
-5.6
H
5.76
6.08
-5.64
-5.64
L
5.68
6.04
-5.6
-5.6
2.4kbps
5.84
6.16
-5.64
-5.72
H
5.88
6.24
-5.6
-5.6
L
5.88
6.28
-5.6
-5.64
2.4kbps
5.8
6.2
-5.6
-5.6
H
5.88
6.44
-5.64
-5.72
L
5.88
6.04
-5.64
-5.64
2.4kbps
5.92
6.4
-5.64
-5.64
Page 12 of 28
ICL3224E, ICL3226E, ICL3244E
Table 3.
4. Application Information
V+ and V- Values for Vcc = 4.5V to 5.5V
V+ (V)
V- (V)
C1 (μF)
C2, C3, C4 (μF)
Load
T1IN (Logic
State)
0.1
0.1
Open
H
7.44
8.48
-6.16
-6.4
L
7.44
8.48
-6.16
-6.44
2.4kbps
7.44
8.48
-6.17
-6.44
H
7.76
8.88
-6.36
-6.72
3kΩ // 1000pF
0.047
0.33
Open
3kΩ // 1000pF
1
1
Open
3kΩ // 1000pF
VCC = 4.5V
VCC = 5.5V
VCC = 4.5V
VCC = 5.5V
L
7.08
8
-5.76
-5.76
2.4kbps
7.76
8.84
-6.4
-6.64
H
6.44
6.88
-5.8
-5.88
L
6.48
6.88
-5.84
-5.88
2.4kbps
6.44
6.88
-5.8
-5.88
H
6.64
7.28
-5.92
-6.04
L
6.24
6.6
-5.52
-5.52
2.4kbps
6.72
7.16
-5.92
-5.96
H
6.84
7.6
-5.76
-5.76
L
6.88
7.6
-5.76
-5.76
2.4kbps
6.92
7.56
-5.72
-5.76
H
7.28
8.16
-5.8
-5.92
L
6.44
6.84
-5.64
-6.84
2.4kbps
7.08
7.76
-5.8
-5.8
The resulting new maximum voltages at V+ and V- are listed in Table 4.
Table 4.
4.2
New Measured Withstanding Voltages
V+, V- to Ground
±13V
V+ to V-
20V
Transmitters
The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. The transmitters are coupled with the on-chip ±5.5V supplies to deliver true RS-232 levels over a
wide range of single supply system voltages.
Transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode
(see Table 5 on page 15). These outputs may be driven to ±12V when disabled.
All devices ensure a 250kbps data rate for full load conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one transmitter
operating at full speed. Under more typical conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one transmitter
easily operates at 1Mbps.
Transmitter inputs float if they are not connected and can cause ICC to increase. Connect unused inputs to GND
for the best performance.
4.3
Receivers
All the ICL32xxE devices contain standard inverting receivers, but only the ICL3244E receivers can tri-state using
the FORCEOFF control line. The ICL3244E includes a noninverting (monitor) receiver (denoted by the ROUTB
label) that is always active regardless of the state of any control lines. Both receiver types convert RS-232 signals
to CMOS output levels and accept inputs up to ±25V while presenting the required 3kΩ to 7kΩ input impedance
FN4899 Rev.7.00
Jun.11.19
Page 13 of 28
ICL3224E, ICL3226E, ICL3244E
4. Application Information
(see Figure 10) even if the power is off (VCC = 0V). The receivers’ Schmitt trigger input stage uses hysteresis to
increase noise immunity and decrease errors due to slow input signal transitions.
VCC
RXOUT
RXIN
-25V ≤ VRIN ≤ +25V
5kΩ
GND ≤ VROUT ≤ VCC
GND
Figure 10. Inverting Receiver Connections
The ICL3244E inverting receivers disable during forced (manual) powerdown, but not during automatic
powerdown (see Table 5 on page 15). Conversely, the monitor receiver remains active even during manual
powerdown, which makes it extremely useful for Ring Indicator monitoring. Standard receivers driving powered
down peripherals must be disabled to prevent current flow through the peripheral’s protection diodes (see
Figures 11 and 12). When powered down, they cannot be used for wake-up functions, but the corresponding
monitor receiver can be dedicated to this task as shown in Figure 12.
.
VCC
VCC
Transition
Detector
VCC
Current
Flow
VCC
To
Wake-Up
Logic
VCC
VOUT = VCC
R2OUTB
Rx
RX
Powered
Down
UART
Tx
GND
SHDN = GND
ICL3244E
Old
RS-232 Chip
Powered
Down
UART
VOUT = HI-Z
R2OUT
TX
R2IN
T1IN
T1OUT
FORCEOFF = GND
Figure 11. Power Drain Through Powered Down Peripheral
FN4899 Rev.7.00
Jun.11.19
Figure 12. Disabled Receivers Prevent Power Drain
Page 14 of 28
ICL3224E, ICL3226E, ICL3244E
4.4
4. Application Information
Powerdown Functionality
This 3V ISL32xxE devices require a nominal supply current of 0.3mA during normal operation (not in powerdown
mode). This current is considerably less than the 5mA to 11mA current required of 5V RS-232 devices. The
already low current requirement drops significantly when the device enters powerdown mode. In powerdown,
supply current drops to 1µA, because the on-chip charge pump turns off (V+ collapses to VCC, V- collapses to
GND), and the transmitter outputs tri-state. Inverting receiver outputs may or may not disable in powerdown; see
Table 5 for details. This micro-power mode makes these devices ideal for battery powered and portable
applications.
Table 5.
RCVR or
XMTR
EDGE
Within 30
Sec?
Powerdown Logic Truth Table
FORCEOFF FORCEON
Input
Input
Transmitter
Outputs
Receiver
Outputs
ROUTB
Outputs
(Note 6)
RS-232
Level
Present at
Receiver
Input?
INVALID
Output
Mode of Operation
ICL3224E, ICL3226E
No
H
H
Active
Active
N.A.
No
L
No
H
H
Active
Active
N.A.
Yes
H
Yes
H
L
Active
Active
N.A.
No
L
Yes
H
L
Active
Active
N.A.
Yes
H
No
H
L
High-Z
Active
N.A.
No
L
No
H
L
High-Z
Active
N.A.
Yes
H
X
L
X
High-Z
Active
N.A.
No
L
X
L
X
High-Z
Active
N.A.
Yes
H
Normal Operation (Enhanced
Auto Powerdown Disabled)
Normal Operation (Enhanced
Auto Powerdown Enabled)
Powerdown Due to Enhanced
Auto Powerdown Logic
Manual Powerdown
ICL322XE - INVALID Driving FORCEON and FORCEOFF (Emulates Automatic Powerdown)
X
Note 7
Note 7
Active
Active
N.A.
Yes
H
Normal Operation
X
Note 7
Note 7
High-Z
Active
N.A.
No
L
Forced Auto Powerdown
No
H
H
Active
Active
Active
No
L
No
H
H
Active
Active
Active
Yes
H
Normal Operation (Enhanced
Auto Powerdown Disabled)
Yes
H
L
Active
Active
Active
No
L
Yes
H
L
Active
Active
Active
Yes
H
No
H
L
High-Z
Active
Active
No
L
No
H
L
High-Z
Active
Active
Yes
H
X
L
X
High-Z
High-Z
Active
No
L
X
L
X
High-Z
High-Z
Active
Yes
H
ICL3244E
Normal Operation (Enhanced
Auto Powerdown Enabled)
Powerdown Due to Enhanced
Auto Powerdown Logic
Manual Powerdown
ICL3244E - INVALID Driving FORCEON and FORCEOFF (Emulates Automatic Powerdown)
X
Note 7
Note 7
Active
Active
Active
Yes
H
Normal Operation
X
Note 7
Note 7
High-Z
High-Z
Active
No
L
Forced Auto Powerdown
Notes:
6. Applies only to the ICL3244E.
7. Input is connected to INVALID Output.
FN4899 Rev.7.00
Jun.11.19
Page 15 of 28
ICL3224E, ICL3226E, ICL3244E
4. Application Information
4.4.1 Software Controlled (Manual) Powerdown
The ISL32xxE devices allow you to force the IC into the low power, standby state, and use a two pin approach
where the FORCEON and FORCEOFF inputs determine the IC’s mode. For always enabled operation,
FORCEON and FORCEOFF are both strapped high. Under logic or software control, only the FORCEOFF input
needs to be driven to switch between active and power-down modes. The FORCEON state is not critical because
FORCEOFF overrides FORCEON. However, if strictly manual control over power-down is needed, you must strap
FORCEON high to disable the automatic powerdown circuitry. The ICL3244E inverting (standard) receiver
outputs also disable when the device is in powerdown, and eliminate the possible current path through a
shutdown peripheral’s input protection diode (see Figures 11 and 12).
Connecting FORCEOFF and FORCEON together disables the enhanced automatic powerdown feature, which
enables them to function as a manual SHUTDOWN input (see Figure 13).
With any of the above control schemes, the time required to exit powerdown and resume transmission is only
100µs.
FORCEOFF
Power
Management
Logic
FORCEON
INVALID
ICL32xxE
I/O
UART
CPU
Figure 13. Connections for Manual Powerdown When No Valid Receiver Signals are Present
When using both manual and enhanced automatic powerdown (FORCEON = 0), the ICL32xxE devices do not
power up from manual powerdown until both FORCEOFF and FORCEON are driven high, or until a transition
occurs on a receiver or transmitter input. Figure 14 shows a circuit for ensuring that the ICL32xxE powers up as
soon as FORCEOFF switches high. The rising edge of the master powerdown signal forces the device to power
up, and the ICL32xxE returns to enhanced automatic powerdown mode an RC time constant after this rising
edge. The time constant is not critical, because the ICL32xxE remains powered up for 30s after the FORCEON
falling edge, even if there are no signal transitions. The delay gives slow-to-wake systems (such as a mouse)
plenty of time to start transmitting, and as long as it starts transmitting within 30s both systems remain enabled.
Power
Management
Unit
Master Powerdown Line
0.1µF
FORCEOFF
1MΩ
FORCEON
ICL32xxE
Figure 14. Circuit to Ensure Immediate Power Up When Exiting Forced Powerdown
4.4.2 INVALID Output
Table 5 on page 15 on the INVALID output always indicates whether 30µs have elapsed with invalid RS-232
signals (see Figure 15 and 18) persisting on all of the receiver inputs and provides you a way to determine when
FN4899 Rev.7.00
Jun.11.19
Page 16 of 28
ICL3224E, ICL3226E, ICL3244E
4. Application Information
the interface block should power down. Invalid receiver levels occur whenever the driving peripheral’s outputs are
shut off (powered down) or when the RS-232 interface cable is disconnected. If an interface cable is disconnected
and all the receiver inputs are floating (but pulled to GND by the internal receiver pull down resistors), the
INVALID logic detects the invalid levels and drives the output low. The power management logic then uses this
indicator to power down the interface block. Reconnecting the cable restores valid levels at the receiver inputs,
INVALID switches high, and the power management logic wakes up the interface block. INVALID can also
indicate the DTR or RING INDICATOR signal, as long as the other receiver inputs are floating, or driven to GND
(as in the case of a powered down driver).
Valid RS-232 Level - INVALID = 1
2.7V
Indeterminate
0.3V
Invalid Level - INVALID = 0
-0.3V
Indeterminate
-2.7V
Valid RS-232 Level - INVALID = 1
Figure 15. Definition of Valid RS-232 Receiver Levels
4.4.3 Enhanced Automatic Powerdown
Even greater power savings are available by using the ISL32xxE’s enhanced automatic powerdown function.
When the enhanced powerdown logic determines that no transitions have occurred on any of the transmitter or
receiver inputs for 30s, the charge pump and transmitters powerdown, and reduces supply current to 1µA. The
ICL32xxE devices automatically power back up whenever they detect a transition on one of these inputs. The
automatic powerdown feature provides additional system power savings without changes to the existing operating
system.
Enhanced automatic powerdown operates when the FORCEON input is low and the FORCEOFF input is high.
Tying FORCEON high disables automatic powerdown, but manual powerdown is always available using the
overriding FORCEOFF input. Table 5 on page 15 summarizes the enhanced automatic powerdown functionality.
Figure 16 shows the enhanced powerdown control logic. Note: When the ICL32xxE enters powerdown (manually
or automatically), the 30s timer remains timed out (set), keeping the ICL32xxE powered down until FORCEON
transitions high, or until a transition occurs on a receiver or transmitter input.
FORCEOFF
T_IN
Edge
Detect
S
R_IN
30s
Timer
Edge
Detect
AUTOSHDN
R
FORCEON
Figure 16. Enhanced Automatic Powerdown Logic
The INVALID output signal switches low to indicate that invalid levels have persisted on all of the receiver inputs
for more than 30µs (see Figure 17 on page 18), but this has no direct effect on the state of the ICL32xxE (see the
next sections for methods of using INVALID to power down the device). INVALID switches high 1µs after detecting
a valid RS-232 level on a receiver input. INVALID operates in all modes (forced or automatic powerdown, or
forced on), so it is also useful for systems employing manual powerdown circuitry.
FN4899 Rev.7.00
Jun.11.19
Page 17 of 28
ICL3224E, ICL3226E, ICL3244E
4. Application Information
Receiver
Inputs
Invalid
} Region
Transmitter
Inputs
Transmitter
Outputs
tINVH
INVALID
Output
tINVL
tAUTOPWDN
tWU
tAUTOPWDN
tWU
READY
Output
V+
VCC
0
V-
Figure 17. Enhanced Automatic Powerdown, INVALID and READY Timing Diagrams
The time to recover from automatic powerdown mode is typically 100µs.
4.4.4 Emulating Standard Automatic Powerdown
If enhanced automatic powerdown is not desired, you can implement the standard automatic powerdown feature
(mimics the function on the ICL3221E/ICL3223E/ICL3243E) by connecting the INVALID output to the FORCEON
and FORCEOFF inputs, as shown in Figure 18. After 30µs of invalid receiver levels, INVALID switches low and
drives the ICL32xxE into a forced powerdown condition. INVALID switches high as soon as a receiver input
senses a valid RS-232 level, forcing the ICL32xxE to power on. See “ICL322XE - INVALID Driving FORCEON
and FORCEOFF (Emulates Automatic Powerdown)” on page 15 for an operational summary. This operational
mode is perfect for handheld devices that communicate with another computer through a detachable cable.
Detaching the cable allows the internal receiver pull-down resistors to pull the inputs to GND (an invalid RS-232
level), causing the 30µs timer to time out and drive the IC into powerdown. Reconnecting the cable restores valid
levels, causing the IC to power back up.
FORCEON
INVALID
FORCEOFF
ICL32xxE
I/O
UART
CPU
Figure 18. Connections for Automatic Powerdown When No Valid Receiver Signals are Present
4.4.5 Hybrid Automatic Powerdown Options
For devices that communicate only through a detachable cable, you can connect INVALID to FORCEOFF (with
FORCEON = 0). While the cable is attached, INVALID and FORCEOFF remain high, so the enhanced automatic
powerdown logic powers down the RS-232 device whenever there is 30s of inactivity on the receiver and
transmitter inputs. Detaching the cable allows the receiver inputs to drop to an invalid level (GND), so INVALID
FN4899 Rev.7.00
Jun.11.19
Page 18 of 28
ICL3224E, ICL3226E, ICL3244E
4. Application Information
switches low and forces the RS-232 device to power down. The ICL32xxE remains powered down until the cable
is reconnected (INVALID = FORCEOFF = 1), and a transition occurs on a receiver or transmitter input (see
Figure 16 on page 17). For immediate power up when the cable is reattached, connect FORCEON to
FORCEOFF through a network similar to that shown in Figure 14 on page 16.
4.5
READY Output (ICL3224E and ICL3226E only)
The READY output indicates that the ICL322xE is ready to transmit. READY switches low whenever the device
enters powerdown, and switches back high during power-up when V- reaches -4V or lower.
4.6
Capacitor Selection
The charge pumps require 0.1µF capacitors for 3.3V operation. For other supply voltages see to Table 6 for
capacitor values. Do not use values smaller than those listed in Table 6. Increasing the capacitor values (by a
factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C2, C3, and C4 can
be increased without increasing C1’s value, however, do not increase C1 without also increasing C2, C3, and C4 to
maintain the proper ratios (C1 to the other capacitors).
When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal value. The capacitor’s Equivalent Series Resistance
(ESR) usually rises at low temperatures and it influences the amount of ripple on V+ and V-.
Table 6.
4.7
Required Capacitor Values
VCC (V)
C1 (µF)
C2, C3, C4 (µF)
3.0 to 3.6
0.1
0.1
4.5 to 5.5
0.047
0.33
3.0 to 5.5
0.1
0.47
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is adequate. In applications that are particularly sensitive to
power supply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitor C1.
Connect the bypass capacitor as close as possible to the IC.
4.8
Operation Down to 2.7V
ICL32xxE transmitter outputs meet RS-562 levels (±3.7V), at full data rate, with VCC as low as 2.7V. RS-562
levels typically ensure interoperability with RS-232 devices.
4.9
Transmitter Outputs when Exiting Powerdown
Figure 19 on page 20 shows the response of two transmitter outputs when exiting powerdown mode. As they
activate, the two transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, or
undesirable transients. Each transmitter is loaded with 3kΩ in parallel with 2500pF. Note: The transmitters enable
only when the magnitude of the supplies exceed approximately 3V.
FN4899 Rev.7.00
Jun.11.19
Page 19 of 28
ICL3224E, ICL3226E, ICL3244E
4. Application Information
5V/Div
FORCEOFF
T1
VCC = +3.3V
C1 - C4 = 0.1µF
2V/Div
T2
5V/Div
READY
Time (20µs/Div)
Figure 19. Transmitter Outputs When Exiting Powerdown
4.10
Mouse Driveability
The ICL3244E is specifically designed to power a serial mouse while operating from low voltage supplies.
Figure 20 shows the transmitter output voltages under increasing load current. The on-chip switching regulator
ensures the transmitters supply at least ±5V during worst case conditions (15mA for paralleled V+ transmitters,
7.3mA for single V- transmitter).
6
Transmitter Output Voltage (V)
5
VOUT+
4
VCC = 3.0V
3
2
T1
1
VOUT+
0
T2
-1
ICL3244E
-2
VCC
-3
VOUT -
T3
VOUT -
-4
-5
-6
0
1
2
3
4
5
6
7
8
9
10
Load Current per Transmitter (mA)
Figure 20. Transmitter Output Voltage vs Load Current
(per Transmitter, i.e., Double Current Axis for Total VOUT+ Current)
4.11
High Data Rates
The ICL32xxE maintain the RS-232 ±5V minimum transmitter output voltages even at high data rates. Figure 21
on page 21 shows a transmitter loopback test circuit, and Figure 22 on page 21 shows the loopback test result at
120kbps. For this test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF, at
120kbps. Figure 23 on page 21 shows the loopback results for a single transmitter driving 1000pF and an RS-232
load at 250kbps. The static transmitters were also loaded with an RS-232 receiver.
FN4899 Rev.7.00
Jun.11.19
Page 20 of 28
ICL3224E, ICL3226E, ICL3244E
4. Application Information
VCC
+
0.1µF
+
C1
VCC
C1+
V+
+
C3
C1+
C2
ICL32xxE
V-
C2+
C4
+
C2TIN
TOUT
ROUT
FORCEON
VCC
1000pF
RIN
5k
FORCEOFF
Figure 21. Transmitter Loopback Test Circuit
5V/Div
5V/Div
T1IN
T1IN
T1OUT
T1OUT
R1OUT
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
VCC = +3.3V
C1 - C4 = 0.1µF
2µs/Div
5µs/Div
Figure 22. Loopback Test at 120kbps
4.12
Figure 23. Loopback Test at 250kbps
Interconnection with 3V and 5V Logic
The ICL32xxE directly interfaces with 5V CMOS and TTL logic families. The AC, HC, and CD4000 outputs can
drive the ICL32xxE inputs with the ICL32xxE at 3.3V and the logic supply at 5V, but ICL32xxE outputs do not
reach the minimum VIH for these logic families. See Table 7 for more information.
Table 7.
Logic Family Compatibility with Various Supply Voltages
System Power-Supply
Voltage (V)
VCC Supply Voltage (V)
3.3
3.3
5
5
5
3.3
FN4899 Rev.7.00
Jun.11.19
Compatibility
Compatible with all CMOS families.
Compatible with all TTL and CMOS logic families.
Compatible with ACT and HCT CMOS, and with TTL. ICL32xxE outputs are
incompatible with AC, HC, and CD4000 CMOS inputs.
Page 21 of 28
ICL3224E, ICL3226E, ICL3244E
5.
5. ±15kV ESD Protection
±15kV ESD Protection
All pins on the ICL32xx devices include ESD protection structures, but the ICL32xxE family incorporates
advanced structures that allow the RS-232 pins (transmitter outputs and receiver inputs) to survive ESD events
up to ±15kV. The RS-232 pins are particularly vulnerable to ESD damage because they typically connect to an
exposed port on the exterior of the finished product. Touching the port pins, or connecting a cable, can cause an
ESD event that might destroy unprotected ICs. The ESD structures protect the device whether or not it is powered
up, protect without allowing any latchup mechanism to activate, and do not interfere with RS-232 signals as large
as ±25V.
5.1
Human Body Model (HBM) Testing
The Human Body Model (HBM) test method emulates the ESD event delivered to an IC during human handling.
The tester delivers the charge through a 1.5kΩ current limiting resistor, so the test is less severe than the
IEC61000 test, which uses a 330Ω limiting resistor. The HBM method determines an IC’s ability to withstand the
ESD transients typically present during handling and manufacturing. Due to the random nature of these events,
each pin is tested with respect to all other pins. The RS-232 pins on “E” family devices can withstand HBM ESD
events to ±15kV.
5.2
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most
likely to suffer an ESD event are those that are exposed to the outside world (the RS-232 pins in this case), and
the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin
combination. The lower current limiting resistor coupled with the larger charge storage capacitor yields a test that
is much more severe than the HBM test. The extra ESD protection built into this device’s RS-232 pins allows the
design of equipment meeting Level 4 criteria without the need for additional board level protection on the RS-232
port.
5.3
Air-gap discharge test method
For the air-gap discharge test, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current
waveform delivered to the IC pin depends on factors such as approach speed, humidity, and temperature, so it is
difficult to obtain repeatable results. The “E” device RS-232 pins withstand ±15kV air-gap discharges.
5.4
Contact Discharge Test Method
During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, and
eliminates the variables associated with the air-gap discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages higher than ±8kV. All “E” family devices survive ±8kV
contact discharges on the RS-232 pins.
FN4899 Rev.7.00
Jun.11.19
Page 22 of 28
ICL3224E, ICL3226E, ICL3244E
6.
6. Die Characteristics
Die Characteristics
Substrate Potential (Powered Up)
GND
Transistor Count
ISL3224E: 937
ISL3226E: 825
ISL3244E: 1109
Process
Si Gate CMOS
FN4899 Rev.7.00
Jun.11.19
Page 23 of 28
ICL3224E, ICL3226E, ICL3244E
7.
7. Revision History
Revision History
Rev.
Date
Description
13
Jun.11.19
Updated to latest formatting.
Updated Related Literature section.
Updated Ordering information table by adding active tape and reel information, added notes 1-3, and removed
retired parts.
Added “Charge Pump Abs Max Ratings” on page 12.
Added Revision History section.
Updated disclaimer.
FN4899 Rev.7.00
Jun.11.19
Page 24 of 28
ICL3224E, ICL3226E, ICL3244E
8.
8. Package Outline Drawings
Package Outline Drawings
For the most recent package outline drawing, see M16.209.
M16.209 (JEDEC MO-150-AC ISSUE B)
16 Lead Shrink Small Outline Plastic Package (SSOP)
INCHES
N
INDEX
AREA
H
0.25(0.010) M
GAUGE
PLANE
-B1
2
3
0.25
0.010
SEATING PLANE
-A-
B M
E
A
D
e
α
A1
B
A2
C
0.10(0.004)
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.078
-
2.00
-
A1
0.002
-
0.05
-
-
A2
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.233
0.255
5.90
6.50
3
E
0.197
0.220
5.00
5.60
4
e
-C-
0.25(0.010) M
L
B S
MILLIMETERS
0.026 BSC
H
0.292
L
0.022
N
α
0.65 BSC
0.322
7.40
0.037
0.55
16
0°
-
8.20
-
0.95
6
16
8°
0°
7
8°
Rev. 3
6/05
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of “B”
dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
FN4899 Rev.7.00
Jun.11.19
Page 25 of 28
ICL3224E, ICL3226E, ICL3244E
8. Package Outline Drawings
For the most recent package outline drawing, see M20.209.
M20.209 (JEDEC MO-150-AE ISSUE B)
20 Lead Shrink Small Outline Plastic Package (SSOP)
N
INDEX
AREA
H
0.25(0.010) M
E
GAUGE
PLANE
-B1
2
3
0.25
0.010
SEATING PLANE
-A-
INCHES
B M
L
A
D
-C-
α
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
SYMBOL
MIN
MAX
MIN
MAX
A
0.068
0.078
1.73
1.99
A1
0.002
0.008’
0.05
0.21
A2
0.066
0.070’
1.68
1.78
B S
NOTES
B
0.010’
0.015
0.25
0.38
C
0.004
0.008
0.09
0.20’
D
0.278
0.289
7.07
7.33
3
E
0.205
0.212
5.20’
5.38
4
e
A2
MILLIMETERS
0.026 BSC
H
0.301
L
0.025
N
α
0.65 BSC
0.311
7.65
0.037
0.63
20
0 deg.
9
7.90’
0.95
6
20
8 deg.
0 deg.
7
8 deg.
Rev. 3 11/02
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess
of “B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
FN4899 Rev.7.00
Jun.11.19
Page 26 of 28
ICL3224E, ICL3226E, ICL3244E
8. Package Outline Drawings
For the most recent package outline drawing, see M28.209.
M28.209 (JEDEC MO-150-AH ISSUE B)
28 Lead Shrink Small Outline Plastic Package (SSOP)
N
INDEX
AREA
H
0.25(0.010) M
2
SYMBOL
3
0.25
0.010
SEATING PLANE
-A-
INCHES
GAUGE
PLANE
-B1
B M
E
A
D
-C-
e
α
A1
B
0.25(0.010) M
L
C
0.10(0.004)
C A M
B S
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
MAX
MIN
MAX
NOTES
A
-
0.078
-
2.00
-
A1
0.002
-
0.05
-
-
A2
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.390
0.413
9.90
10.50
3
E
0.197
0.220
5.00
5.60
4
e
A2
MILLIMETERS
MIN
0.026 BSC
0.65 BSC
-
H
0.292
0.322
7.40
8.20
-
L
0.022
0.037
0.55
0.95
6
8°
0°
N
α
28
0°
28
7
8°
Rev. 2 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of
“B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
FN4899 Rev.7.00
Jun.11.19
Page 27 of 28
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