DATASHEET
ICS4231-03
LOW EMI CLOCK GENERATOR
Description
Features
The ICS4231-03 generates a low EMI output clock
from a clock or crystal input. The device uses ICS’
proprietary mix of analog and digital Phase Locked
Loop (PLL) technology to spread the frequency
spectrum of the output, thereby reducing the frequency
amplitude peaks by several dB.
•
•
•
•
Pin and function compatible to Cypress W42C31-03
Packaged in 8-pin SOIC (Pb free available)
Provides a spread spectrum output clock
Accepts a clock or crystal input and provides same
frequency dithered output
• Input clock frequency of 10 to 33 MHz
• Peak reduction by 8dB - 14dB typical on 3rd - 19th
The ICS4231-03 offers four different center and down
spread selections. Refer to the MK1714-01/02 for the
widest selection of input frequencies and multipliers.
odd harmonics
• Spread percentage selections of ±1.875%, ±1.0%,
ICS offers a complete line of EMI reducing clock
generators. Consult us when you need to remove
crystals and oscillators from your board.
and -2.0%
• Operating voltage of 5V
• Advanced, low-power CMOS process
Block Diagram
VDD
FS1:0
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
OE#
X1/CLKIN
X2
Clock Buffer/
Crystal
Oscillator
CLK
GND
IDT™ / ICS™ LOW EMI CLOCK GENERATOR
1
ICS4231-03
REV A 110404
ICS4231-03
LOW EMI CLOCK GENERATOR
SSCG
Pin Assignment
Output Enable Function Table
X1/CLKIN
1
8
OE#
X2
GND
2
3
7
6
FS1
VDD
FS0
4
5
CLKOUT
OE#
(Pin 8)
Output Status
0
1
Running
Tri-state
0 = connect to GND
1 = connect directly to VDD
Note: OE# pin has an internal pull-down resistor
8 pin (150 mil) SOIC
Frequency Range and Spread Table
FS1
(Pin 7)
FS0
(Pin 4)
Clock Input
Frequency
(MHz)
Crystal Input
Frequency
(MHz)
Spread Amount
0
0
1
1
0
1
0
1
10-20
10-20
20-33
20-33
10-20
10-20
20-25
20-25
±1.875%
±1.0%
±1.875%
-2.0%
Note: FS1:0 have internal pull-up resistors
Pin Descriptions
Pin
Number
Pin
Name
Pin Type
1
X1/CLKIN
Input
2
X2
Output
Crystal output. Float for a clock input.
3
GND
Power
Connect to ground.
4
FS0
Input
Select pin for input frequency and spread amount. See table above. Internal
pull up resistor.
5
CLKOUT
Output
Spread spectrum clock output per table above.
6
VDD
Power
Connect to 5V.
7
FS1
Input
Select pin for input frequency and spread amount. See table above. Internal
pull up resistor.
8
OE#
Input
Output Enable. Active Low. See table above. Internal pull-down resistor.
IDT™ / ICS™ LOW EMI CLOCK GENERATOR
Pin Description
Crystal or Clock Input.
2
ICS4231-03
REV A 110404
ICS4231-03
LOW EMI CLOCK GENERATOR
SSCG
External Components
PCB Layout Recommendations
The ICS4231-03 requires a minimum number of
external components for proper operation.
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
Decoupling Capacitor
1) The 0.01µF decoupling capacitor should be mounted
on the component side of the board as close to the VDD
pin as possible. No vias should be used between the
decoupling capacitor and VDD pin. The PCB trace to
VDD pin should be kept as short as possible, as should
the PCB trace to the ground via.
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 6 and 3, as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
2) To minimize EMI the 33Ω series termination resistor,
if needed, should be placed close to the clock output.
Series Termination Resistor
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50Ω trace (a commonly used trace
impedance) place a 33Ω resistor in series with the clock
line, as close to the clock output pin as possible. The
nominal impedance of the clock output is 20Ω.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed away
from the ICS4231-03. This includes signal traces just
underneath the device, or on layers adjacent to the
ground plane layer used by the device.
value of these capacitors is given by the following
equation:
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS4231-03. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
7V
All Inputs and Outputs
-0.5V to VDD+0.5V
Ambient Operating Temperature
0 to +70° C
Storage Temperature
-65 to +150° C
Junction Temperature
125° C
Soldering Temperature
260° C
IDT™ / ICS™ LOW EMI CLOCK GENERATOR
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ICS4231-03
REV A 110404
ICS4231-03
LOW EMI CLOCK GENERATOR
SSCG
DC Electrical Characteristics
Unless stated otherwise, VDD = 5V, ±10%, Ambient Temperature 0 to +70° C
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
4.5
5
5.5
V
18
32
mA
Operating Voltage
VDD
Supply Current
IDD
Input High Voltage
VIH
Input Low Voltage
VIL
Output High Voltage
VOH
IOH = -24mA
Output Low Voltage
VOL
IOL = 24mA
Input Capacitance
CIN
All pins except X1, X2
5
X1, X2, as seen by the
xtal, Note 1
17
pF
20
Ω
500
KΩ
No load, at 3.3V
0.7VDD
0.15VDD
Load Capacitance
Output Impedance
V
2.5
V
Rout
Input Pull-Up Resistor
Power-Up Time
V
First locked clock
cycle after Power
Good
0.4
V
7
pF
5
ms
Note 1: Pins X1 and X2 each have 34 pF capacitance. When used with a crystal, the total combined
capacitance as seen by the crystal is 17 pF. If driving X1 with a clock input, the load capacitance will be
34 pF.
AC Electrical Characteristics
Unless stated otherwise, VDD = 5V±10%, Ambient Temperature 0 to +70° C, CL=15pf
Parameter
Symbol
Input Frequency
Conditions
Input Clock
Output Frequency
Min.
Typ.
Max. Units
10
33
MHz
10
33
MHz
60
%
50
55
%
Input Clock Duty Cycle
Time above VDD/2
40
Output Clock Duty Cycle
Note 1
45
Output Rise Time
tOR
0.8 to 2.4V, note 1
2
5
ns
Output Fall Time
tOF
2.4 to 0.8V, note 1
2
5
ns
300
ps
Jitter
cycle-to-cycle
Harmonic Reduction
8
dB
Note 1: Measured with 15pF load
IDT™ / ICS™ LOW EMI CLOCK GENERATOR
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ICS4231-03
REV A 110404
ICS4231-03
LOW EMI CLOCK GENERATOR
SSCG
Thermal Characteristics
Parameter
Thermal Resistance Junction to
Ambient
Thermal Resistance Junction to Case
Symbol
Min.
Max. Units
Still air
150
° C/W
θJA
1 m/s air flow
140
° C/W
θJA
3 m/s air flow
120
° C/W
40
° C/W
θJC
Marking Diagram (Pb free)
5
8
4231M-03
######
YYWW
1
Typ.
θJA
Marking Diagram
8
Conditions
5
4231M03L
######
YYWW
4
1
4
Notes:
1. ###### is the lot number.
2. YYWW is the last two digits of the year and week that the part was assembled.
3. “L” denotes Pb (lead) free package.
4. Bottom marking: country of origin.
IDT™ / ICS™ LOW EMI CLOCK GENERATOR
5
ICS4231-03
REV A 110404
ICS4231-03
LOW EMI CLOCK GENERATOR
SSCG
Package Outline and Package Dimensions (8 pin SOIC, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
8
Symbol
E
Min
A
A1
B
C
D
E
e
H
h
L
α
H
INDEX
AREA
1 2
D
A
Inches
Max
Min
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
4.80
5.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
0°
8°
Max
.0532
.0688
.0040
.0098
.013
.020
.0075
.0098
.1890
.1968
.1497
.1574
0.050 BASIC
.2284
.2440
.010
.020
.016
.050
0°
8°
h x 45
A1
C
-Ce
B
SEATING
PLANE
L
.10 (.004)
C
Ordering Information
Part / Order Number
4231M-03
4231M-03T
4231M-03LF
4231M-03LFT
Marking
see page 5
Shipping
packaging
Package
Tubes
Tape and Reel
Tubes
Tape and Reel
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
Temperature
0 to +70°
0 to +70°
0 to +70°
0 to +70°
C
C
C
C
“LF” denotes Pb free packaging.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result
from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
IDT™ / ICS™ LOW EMI CLOCK GENERATOR
6
ICS4231-03
REV A 110404
ICS4231-03
LOW EMI CLOCK GENERATOR
SSCG
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Integrated Device Technology, Inc.
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800 345 7015
+408 284 8200 (outside U.S.)
Integrated Device Technology
Singapore (1997) Pte. Ltd.
Reg. No. 199707558G
435 Orchard Road
#20-03 Wisma Atria
Singapore 238877
+65 6 887 5505
IDT Europe, Limited
Prime House
Barnett Wood Lane
Leatherhead, Surrey
United Kingdom KT22 7DE
+44 1372 363 339
© 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device
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