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TLV716, TLV716P
SBVS217B – JUNE 2013 – REVISED NOVEMBER 2015
TLV716/P Capacitor-Free, Dual, 150-mA,
Low-Dropout Voltage Regulator in 1.2-mm × 1.2-mm SON Package
1 Features
3 Description
•
•
•
•
•
•
The TLV716 is a family of dual-channel, capacitorfree,150-mA, low-dropout (LDO) voltage regulators
with multiple fixed-output options available from 1 V
to 3.3 V. These devices provide an initial 1%
accuracy and 1.5% accuracy overtemperature.
1
•
•
No Input or Output Capacitors Required
Inrush Current Control
Low Crosstalk
Accuracy: 1.5% (–40°C to 125°C
Input Voltage Range: 1.4 V to 5.5 V
Multiple Fixed-Output Voltage Combinations
Possible from 1 V to 3.3 V
Foldback Current Limit Protection
Package: 1.2-mm × 1.2-mm SON-6 (DPQ)
The TLV716 family is designed to be stable with or
without an input or output capacitor. Eliminating the
output capacitor allows for a very small solution size.
The TLV716P series provides an active pulldown
circuit to quickly discharge the output voltage if the
application requires an output capacitor.
The device provides inrush current control during
device power up and enabling. Inrush control
provides constant-current charging of the output load
during start-up, thereby reducing the risk of an
undesired overcurrent fault from the input supply or
battery.
2 Applications
•
•
•
Wireless Handsets, Smart Phones, Tablets
Set-Top Boxes (STBs), Cameras, Modems
Portable Battery-Powered Products
The TLV716 family is available in a 1.2-mm × 1.2-mm
SON-6 package and is ideal for space-constrained
applications.
Device Information(1)
PART NUMBER
TLV716
TLV716P
PACKAGE
X2SON (6)
BODY SIZE (NOM)
1.20 mm × 1.20 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Circuit
VIN
1.0 V to 3.3 V
1.4 V to 5.5 V
OUT1
IN
1.0 V to 3.3 V
EN1
On
Off
TLV716 OUT2
VOUT1
VOUT2
EN2
On
GND
Off
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV716, TLV716P
SBVS217B – JUNE 2013 – REVISED NOVEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 10
7.1
7.2
7.3
7.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
10
10
11
11
8
Application and Implementation ........................ 12
8.1 Application Information............................................ 12
8.2 Typical Application .................................................. 12
9 Power Supply Recommendations...................... 13
10 Layout................................................................... 14
10.1
10.2
10.3
10.4
Layout Guidelines .................................................
Layout Example ....................................................
Thermal Considerations ........................................
Power Dissipation .................................................
14
14
14
14
11 Device and Documentation Support ................. 16
11.1
11.2
11.3
11.4
11.5
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
16
16
16
16
16
12 Mechanical, Packaging, and Orderable
Information ........................................................... 16
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (September 2013) to Revision B
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
•
Deleted (LDO) from title.......................................................................................................................................................... 1
•
Changed Accuracy bullet from 1% to 1.5% and added temperature range (–40°C to 125°C) ............................................. 1
Changes from Original (June 2013) to Revision A
Page
•
Changed document status from Product Preview to Production Data; pre-RTM changes made throughout........................ 1
•
Changed junction temperature range in second paragraph of Overview section ................................................................ 10
2
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SBVS217B – JUNE 2013 – REVISED NOVEMBER 2015
5 Pin Configuration and Functions
DPQ Package
6-Pin X2SON
Top View
OUT1
1
6
EN1
OUT2
2
5
IN
GND
3
4
EN2
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
OUT1
1
O
Regulated output voltage pin.
See the Input and Output Capacitor Requirements section for more details.
OUT2
2
O
Regulated output voltage pin.
See the Input and Output Capacitor Requirements section for more details.
GND
3
—
Ground pin.
EN2
4
I
Enable pin for regulator 2. Driving EN2 over 0.9 V turns on regulator 2.
Driving EN2 below 0.4 V places regulator 2 into shutdown mode.
IN
5
I
Input voltage pin.
See the Input and Output Capacitor Requirements section for more details.
EN1
6
I
Enable pin for regulator 1. Driving EN1 over 0.9 V turns on regulator 1.
Driving EN1 below 0.4 V places regulator 1 into shutdown mode.
PAD
—
—
Connecting the thermal pad to the ground plane improves the thermal performance.
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SBVS217B – JUNE 2013 – REVISED NOVEMBER 2015
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6 Specifications
6.1 Absolute Maximum Ratings
at TJ = –40°C to 125°C, unless otherwise noted.
Voltage
(2)
(1)
MIN
MAX
UNIT
IN
–0.3
6
V
EN1, EN2
–0.3
VIN + 0.3
V
OUT1, OUT2
–0.3
3.6 or VIN + 0.3
V
Current, OUT1, OUT2
–30
Internally limited
mA
Output short circuit duration
Indefinite
s
TJ
Operating junction temperature
–55
150
°C
Tstg
Storage temperature
–55
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground.
6.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
V(ESD)
(1)
(2)
Electrostatic discharge
(1)
UNIT
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101, all
pins (2)
V
±500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted).
MIN
NOM
MAX
1.4
5.5
UNIT
VIN
Input voltage
V
VEN
Enable range: VEN1, VEN2
0
VIN
V
IOUT
Output current: IOUT1, IOUT2
0
150
mA
CIN
Input capacitor
0
1
COUT
Output capacitor: COUT1, COUT2
0
0.1
TJ
Operating junction temperature range
µF
–40
100
µF
125
°C
6.4 Thermal Information
TLV716, TLV716P
THERMAL METRIC
(1)
DPQ (X2SON)
UNIT
6 PINS
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
RθJB
Junction-to-board thermal resistance
ψJT
Junction-to-top characterization parameter
ψJB
Junction-to-board characterization parameter
RθJC(bot)
Junction-to-case (bottom) thermal resistance
91
°C/W
(1)
4
149.3
°C/W
93
°C/W
110.1
°C/W
3.4
°C/W
114.9
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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SBVS217B – JUNE 2013 – REVISED NOVEMBER 2015
6.5 Electrical Characteristics
over operating temperature range of TA = –40°C to 85°C, VIN = VOUT(TYP) + 0.5 V or 2 V (whichever is greater), IOUT = 1 mA,
VEN1 = VEN2 = 0.9 V, and CIN = COUT1 = COUT2 = 1 μF, unless otherwise noted. Typical values are at TJ = 25°C
PARAMETER
VIN
TEST CONDITIONS
Input voltage range
MIN
TYP
1.4
TJ = 25°C, VOUT > 1.2 V
TJ = 25°C, VOUT ≤ 1.2 V
–1%
MAX
UNIT
5.5
0.33%
V
1%
–20
20
TJ = –40°C to 85°C, VOUT > 1.2 V
–1.5%
1.5%
mV
TJ = –40°C to 85°C, VOUT ≤ 1.2 V
–50
50
mV
Each channel
150
0.2
%/V
0.07
0.2
mV/mA
0.005
0.066
mV/mA
VOUT
Output voltage accuracy
IOUT
Output current
ΔVOUT / ΔVIN
Line regulation
VOUT + 0.5 V < VIN ≤ 5.5 V
ΔVOUT / ΔIOUT
Load regulation
1 mA < IOUT < 150 mA
ΔVOUT / ΔIOUT
Cross load regulation
1 mA < IOUT < 150 mA
0.78
1
V
IOUT = 150 mA, 1.2 V ≤ VOUT < 1.8 V
0.6
0.9
V
IOUT = 150 mA, 1.8 V ≤ VOUT < 2.1 V
0.35
0.575
V
IOUT = 150 mA, 2.1 V ≤ VOUT < 2.5 V
0.29
0.48
V
IOUT = 150 mA, 2.5 V ≤ VOUT < 3 V
0.23
0.45
V
IOUT = 150 mA, 3 V ≤ VOUT < 3.3 V
0.21
0.42
V
0.9
VIN
V
0
0.4
IOUT = 150 mA, 1 V ≤ VOUT < 1.2 V
VDO
Dropout voltage
mA
0.02
VHI
Enable high voltage
VLO
Enable low voltage
RPD
Output pulldown resistance
TLV716P only
ICL
Output current limit
VIN = VOUT(TYP) + 0.5 V or 2.1 V
(whichever is greater)
ISC
Output short current limit
VOUT = 0 V
40
IGND
Ground pin current
Per channel, IOUT = 0 mA, VIN = 5.5 V
50
75
µA
ISHUTDOWN
Shutdown current
Per channel, VIN = 5.5 V, TJ = 25°C
0.1
1
μA
f = 100 Hz, VOUT = 2.8 V, IOUT = 30 mA
80
dB
f = 10 kHz, VOUT = 2.8 V, IOUT = 30 mA
46
dB
BW = 10 Hz to 100 kHz, VOUT = 1.8 V,
VIN = 2.3 V, IOUT = 10 mA
70
μVRMS
VOUT = 1 V, IOUT = 150 mA
170
μs
VOUT = 3.3 V, IOUT = 150 mA
900
μs
Shutdown, temperature increasing
158
°C
PSRR
Power-supply rejection ratio
VN
Output noise voltage
tSTR
Start-up time
(1)
TSD
Thermal shutdown temperature
TJ
Operating Junction Temperature
(1)
V
Ω
120
160
Reset, temperature decreasing
500
mA
mA
140
–40
°C
125
°C
Start-up time = time from EN assertion to 0.98 × VOUT(NOM).
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6.6 Typical Characteristics
Over operating temperature range of TJ = –40°C to 125°C, VIN = VOUT(TYP) + 0.5 V or 2 V (whichever is greater), VEN1 = VEN2 =
VIN, IOUT1 = IOUT2 = 10 mA, CIN = 1 μF, COUT1 = 1 μF, and COUT2 = 1 μF, unless otherwise noted. Output current plots show
typical performance with a single output current sweep. Typical values are at TJ = 25°C.
1
0.6
0.4
±40ƒC
0°C
25°C
85°C
125°C
0.3
Output Voltage û (% VOUT)
Output Voltage û (% VOUT)
0.4
±40ƒC
0°C
25°C
85°C
125°C
0.8
0.2
0
-0.2
-0.4
-0.6
0.2
0.1
0
-0.1
-0.2
-0.3
-0.8
-1
-0.4
1.5
2.5
3.5
4.5
3.5
5.5
Input Voltage (V)
1.006
1
C001
0.998
0.996
0.994
±40ƒC
3.304
0°C
3.302
25°C
85°C
3.3
125°C
3.298
3.296
3.294
3.292
0.992
3.29
0.99
3.288
0
25
50
75
100
125
Output Current (mA)
0
150
25
3000.0
100
125
C004
110
1500.0
1000.0
500.0
100
90
80
70
±40ƒC
0°C
25°C
85°C
125°C
60
50
0.0
40
1
2
150
120
Ground Pin Current (µA)
2000.0
75
Output Current (mA)
Figure 4. Load Regulation
VOUT vs IOUT (VOUT = 3.3 V)
±40ƒC
0°C
25°C
85°C
125°C
2500.0
50
C003
Figure 3. Load Regulation
VOUT vs IOUT (VOUT = 1 V)
Shutdown Current (nA)
5.5
3.306
Output Voltage (V)
1.002
5
Figure 2. Line Regulation
%VOUT Deviation vs VIN (VOUT = 3.3 V)
±40ƒC
0°C
25°C
85°C
125°C
1.004
3
4
5
Input Voltage (V)
6
1
2
3
4
5
Input Voltage (V)
C005
Figure 5. Shutdown Current vs VIN
6
4.5
Input Voltage (V)
Figure 1. Line Regulation
%VOUT Deviation vs VIN (VOUT = 1 V)
Output Voltage (V)
4
C001
6
C006
Figure 6. Ground Pin Current vs VIN
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Typical Characteristics (continued)
Over operating temperature range of TJ = –40°C to 125°C, VIN = VOUT(TYP) + 0.5 V or 2 V (whichever is greater), VEN1 = VEN2 =
VIN, IOUT1 = IOUT2 = 10 mA, CIN = 1 μF, COUT1 = 1 μF, and COUT2 = 1 μF, unless otherwise noted. Output current plots show
typical performance with a single output current sweep. Typical values are at TJ = 25°C.
400
±40ƒC
0°C
25°C
85°C
125°C
150
±40ƒC
0°C
25°C
85°C
125°C
350
300
Dropout Voltage (mV)
Ground Pin Current (µA)
175
125
100
250
200
150
100
75
50
50
0
0
25
50
75
100
125
150
Output Current ( mA)
0
25
75
100
1.2
3.5
1
3
0.8
0.6
±40ƒC
0°C
2.5
2
1.5
±40ƒC
0°C
1
25°C
0.5
85°C
0
0.05
0.1
0.15
0.2
0.25
Output Current (A)
85°C
125°C
125°C
0
150
C008
25°C
0.2
0
0.3
0
0.05
0.1
0.15
0.2
0.25
0.3
Output Current (A)
C010
Figure 9. Output Voltage vs
Output Current (VOUT = 1 V)
(Foldback Current Limit)
C011
Figure 10. Output Voltage vs
Output Current (VOUT = 3.3 V)
(Foldback Current Limit)
90
10
VOUT = 3.3 V
80
70
VOUT = 1.0 V
1
1RLVH —9 ¥+]
60
PSRR (dB)
125
Figure 8. Dropout Voltage vs IOUT
(VOUT = 3.3 V)
Output Voltage (V)
Output Voltage (V)
Figure 7. Ground Pin Current vs IOUT
0.4
50
Output Current (mA)
C007
50
40
30
IOUT = 10 mA
0.1
0.01
20
IOUT = 50 mA
10
IOUT = 150 mA
0
0.001
10
100
1k
10k
100k
Frequency (Hz)
1M
10M
10
100
Figure 11. Power-Supply Rejection Ratio vs Frequency
(VOUT = 3.3 V)
1k
10k
100k
1M
Frequency (Hz)
C012
10M
C013
Figure 12. Output Spectral Noise Density
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Typical Characteristics (continued)
Over operating temperature range of TJ = –40°C to 125°C, VIN = VOUT(TYP) + 0.5 V or 2 V (whichever is greater), VEN1 = VEN2 =
VIN, IOUT1 = IOUT2 = 10 mA, CIN = 1 μF, COUT1 = 1 μF, and COUT2 = 1 μF, unless otherwise noted. Output current plots show
typical performance with a single output current sweep. Typical values are at TJ = 25°C.
VIN = 2 V to 3 V in 5 μs
VOUT = 1 V
I OUT = 30 mA
C IN = none
COUT = none
VIN (1 V/div)
VIN = 2 V to 3 V in 5 μs
VOUT = 1 V
I OUT = 30 mA
C IN = none
COUT = 1 μF
VIN (1 V/div)
VOUT1 (20 mV/div)
VOUT1 (20 mV/div)
VOUT2 (20 mV/div)
VOUT2 (20 mV/div)
Time (20 μs/div)
Time (20 μs/div)
Figure 13. Line Transient
Figure 14. Line Transient
VIN (1 V/div)
IOUT1 (100 mA/div)
VOUT1 (20 mV/div)
VOUT1 (100 mV/div)
VIN = 3.5 V to 4.5 V in 5 μs
VOUT = 3.3 V
I OUT = 30 mA
C IN = none
COUT = 1 μF
VOUT2 (100 mV/div)
Time (50 μs/div)
I OUT1 = 0 mA ® 150 mA ® 0 mA
I OUT2 = 30 mA
VIN = 2 V, VOUT = 1 V
C IN = 0.22 μF, COUT = 0.22 μF
Time (200 μs/div)
Figure 15. Line Transient
Figure 16. Load Transient
VIN = 3.8 V
short VOUT to GND
COUT = none
VIN (2 V/div)
IOUT1 (100 mA/div)
VOUT1 (2 V/div)
VOUT1 (100 mV/div)
VOUT2 (100 mV/div)
I OUT1 = 0.1 mA ® 150 mA ® 0.1 mA
I OUT2 = 30 mA
VIN = 4.3 V, VOUT = 3.3 V
C IN = 0.22 μF, COUT = 0.22 μF
IOUT1 (100 mA/div)
Time (100 μs/div)
Figure 17. Load Transient
8
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Time (20 μs/div)
Figure 18. Foldback Current Limit
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Typical Characteristics (continued)
Over operating temperature range of TJ = –40°C to 125°C, VIN = VOUT(TYP) + 0.5 V or 2 V (whichever is greater), VEN1 = VEN2 =
VIN, IOUT1 = IOUT2 = 10 mA, CIN = 1 μF, COUT1 = 1 μF, and COUT2 = 1 μF, unless otherwise noted. Output current plots show
typical performance with a single output current sweep. Typical values are at TJ = 25°C.
VOUT1 (500 mV/div)
VOUT2 (500 mV/div)
VOUT1 (500 mV/div)
VOUT2 (500 mV/div)
VIN = 0 V to 2.3 V
VOUT = 1.8 V
COUT = 1 μF
I OUT1 = 0 mA
VIN (500 mV/div)
VIN = 0 V to 2.3 V
VOUT = 1.8 V
COUT = 1 μF
I OUT1 = 150 mA
VIN (500 mV/div)
Time (200 μs/div)
Time (200 μs/div)
Figure 19. Start-Up
Figure 20. Start-Up
VOUT1 (1 V/div)
VOUT2 (1 V/div)
VOUT1 (1 V/div)
VOUT2 (1 V/div)
EN (1 V/div)
EN = 0 V to 1 V
VIN = 3.8 V
VOUT = 3.3 V
COUT = none
I OUT = no load
EN (1 V/div)
EN = 0 V to 1 V
VIN = 3.8 V
VOUT = 3.3 V
COUT = none
I OUT = 150 mA
Time (200 μs/div)
Time (200 μs/div)
Figure 21. Start-Up With EN
Figure 22. Start-Up With EN
VOUT2 (1 V/div)
VOUT1 (1 V/div)
EN = 0 V to 1 V
VIN = 3.8 V
VOUT = 3.3 V
COUT = none
I OUT = no load
EN (1 V/div)
Time (500 ns/div)
Figure 23. Shutdown With EN
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7 Detailed Description
7.1 Overview
The TLV716 and TLV716P devices belong to a new family of next-generation of dual-value, low-dropout (LDO)
regulators. These devices consume low quiescent current and deliver excellent line and load transient
performance. These characteristics, combined with low noise, very good PSRR with little (VIN – VOUT) headroom,
make this family of devices ideal for RF portable applications.
This family of regulators offers current limit and thermal protection. Device operating junction temperature is
–40°C to 125°C.
7.2 Functional Block Diagram
120 W
IN
Bandgap and
Reference
0.8 V
UVLO
Current
Limit
OUT1
EN1
EN2
Enable and
Power Control
Logic
Thermal
Shutdown
Thermal
Shutdown
OUT2
Current
Limit
Bandgap and
Reference
0.8 V
UVLO
120 W
NOTE: Dashed lines are for the TLV716P only.
10
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7.3 Feature Description
7.3.1 Internal Current Limit
The TLV716 and TLV716P have an internal foldback current limit that helps protect the regulator during fault
conditions. The current supplied by the device gradually reduces while the output voltage decreases. When the
output is connected to ground, the LDO supplies a typical current of 40 mA. When in current limit, the output
voltage is not regulated and VOUT = IOUT × RLOAD; see Figure 10 and Figure 11. The PMOS pass transistor
dissipates [(VIN – VOUT) × ILIMIT] until thermal shutdown is triggered and the device turns off. When the device
cools down, the internal thermal shutdown circuit turns on the device. If the fault condition continues, the device
cycles between current limit and thermal shutdown. See the Thermal Considerations section for more details.
The TLV716 PMOS pass element has a built-in body diode that conducts current when the voltage at OUT
exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated,
external limiting to 5% of the rated output current is recommended. A small schottky diode connected with the
anode to OUT and the cathode to IN can accomplish this limiting.
7.3.2 Shutdown
The enable pin (EN) is active high. The device is enabled when the EN pin goes above 0.9 V. This relatively low
value of voltage required to turn the LDO regulator on can be used to enable the device with the general-purpose
input/output (GPIO) of recent processors whose GPIO voltage is lower than traditional microcontrollers.
The device is turned off when the EN pin is held at less than 0.4 V. When shutdown capability is not required, the
EN pin can connected to the IN pin. The TLV716P will pull down the output with a 120-Ω resistor when the EN
pin falls below 0.4 V.
7.3.3 Undervoltage Lockout (UVLO)
The TLV716 and TLV716P use an undervoltage lockout circuit (1.3 V, typical) to keep the output shut off until the
internal circuitry is operating properly.
7.4 Device Functional Modes
7.4.1 Capacitor-Free Operation
The TLV716 and TLV716P are stable without the use of input or output capacitors. This functionality results in a
reduction of component count, cost, and solution size. In addition, without the need of external capacitors, the
ultra-small, 1.2-mm × 1.2-mm DPQ package optimizes the solution size for board space-constrained applications.
To optimize device AC performance, an input and output capacitor is recommended, as described in the Input
and Output Capacitor Requirements section.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TLV716 and TLV716P belong to a family of dual-channel, capacitor-free, 150-mA, low-dropout voltage
(LDO) regulators. These devices can be used with or without external capacitors and are available in a 1.2-mm ×
1.2-mm package, making these devices a very small solution size for dual-channel, low-dropout (LDO)
regulators. This family of LDO regulators offers current limit and thermal protection, and is specified from –40°C
to 85°C. Figure 24 shows an application circuit for this family of devices.
8.2 Typical Application
VIN
CIN
IN
OUT1
EN1
OUT2
VOUT1
VOUT2
ON
(1)
OFF ON
(1)
EN2
GND
COUT2
1mF
Ceramic
(1)
COUT1
1mF
Ceramic
OFF
(1)
Optional.
Figure 24. Typical Application Circuit
8.2.1 Design Requirements
Table 1 lists the design requirements.
Table 1. Design Parameters
PARAMETER
DESIGN REQUIREMENT
Input voltage
4.2 V to 3 V (Lithium Ion battery)
Output 1 voltage
2.8 V ±1.5%
Output 1 DC current
50 mA
Output 2 voltage
1.8 V ±1.5%
Output2 DC current
10 mA
Maximum ambient temperature
65°C
8.2.2 Detailed Design Procedure
An input capacitor is not required for this design because of the low impedance connection directly to the battery.
No output capacitor allows for the minimal possible inrush current during start-up, ensuring the 180-mA
maximum input current limit is not exceeded. Verify that the maximum junction temperature is not exceeded by
calculating the total power dissipation and the junction temperature rise. For this example the total worst case
power dissipation is (4.2 V - 2.8 V) × 0.05 A + (4.2 V - 1.8 V) × 0.01 = 0.094 W. The rise in junction temperature
is calculated by multiplying the power dissipation by thermal resistance RθJA. For this example, assuming the
board size is similar to the JEDEC High K standard, the rise in junction temperature is 0.094 W × 149.3 °C/W =
14°C. The junction temperature is calculated by adding the rise in junction temperature to the maximum ambient
temperature; in this example the maximum junction temperature can be calculated to be 65°C + 14°C = 79°C. It
is mandatary to keep the junction temperature below the maximum operating junction temperature. For additional
thermal information see the Thermal Considerations and Power Dissipation sections.
12
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8.2.2.1 Input and Output Capacitor Requirements
The TLV716 and TLV716P uses an advanced internal control loop to obtain stable operation both with or without
the use of input or output capacitors. If an output capacitor is used the device can support values as high as 100µF. The dynamic performance of the device is improved with the use of an output capacitor. An output
capacitance of 0.1 μF or larger generally provides good dynamic response. X5R- and X7R-type ceramic
capacitors are recommended because these capacitors have minimal variation in value and equivalent series
resistance (ESR) over temperature.
Although an input capacitor is not required for stability, good analog design practice is to connect a 0.1-µF to
1-µF capacitor from IN to GND. This capacitor counteracts input source impedance and improves supply
transient response, input ripple, and PSRR. A higher value capacitor may be necessary if large, fast, rise-time
load transients are anticipated or if the device is located several inches from the input power source.
8.2.2.2 Dropout Voltage
The TLV716 and TLV716P use a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than
the dropout voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output
resistance is the RDS(ON) of the PMOS pass element. VDO scales approximately with the output current because
the PMOS device behaves like a resistor in dropout.
As with any linear regulator, PSRR and transient response are degraded as (VIN – VOUT) approaches dropout.
8.2.3 Application Curves
90
10
VOUT = 3.3 V
80
70
1RLVH —9 ¥+]
PSRR (dB)
VOUT = 1.0 V
1
60
50
40
30
IOUT = 10 mA
0.1
0.01
20
IOUT = 50 mA
10
IOUT = 150 mA
0
0.001
10
100
1k
10k
100k
1M
Frequency (Hz)
10M
10
100
Figure 25. Power-Supply Rejection Ratio vs Frequency
(VOUT = 3.3 V)
1k
10k
100k
1M
Frequency (Hz)
C012
10M
C013
Figure 26. Output Spectral Noise Density
9 Power Supply Recommendations
These devices are designed to operate from an input voltage supply range from 1.4 V to 5.5 V. The input voltage
range must provide adequate headroom for the device to have a regulated output. This input supply must be
well-regulated and stable. If the input supply is noisy, additional input capacitors with low ESR can help improve
the output noise performance.
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10 Layout
10.1 Layout Guidelines
If used, place the input and output capacitors as close to the device pins as possible. To maximize AC
performance refer to Figure 27.
10.2 Layout Example
GND PLANE
COUT1
TLV716
VOUT1
VOUT2
CIN
OUT1
1
6
EN1
OUT2
2
5
IN
GND
3
4
EN2
VIN
COUT2
GND PLANE
Figure 27. Layout Recommendation
10.3 Thermal Considerations
Thermal protection disables the output when the junction temperature rises to approximately 158°C, allowing the
device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is again
enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection
circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a
result of overheating.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, junction temperature should be limited to 125°C maximum. To estimate the
margin of safety in a complete design, increase the ambient temperature until the thermal protection is triggered;
use worst-case loads and signal conditions. The ambient temperature at which thermal shutdown occurs on the
device is 33°C higher (158°C - 125°C) than the maximum recommended operating conditions.
The internal protection circuitry of the TLV716 and TLV716P is designed to protect against overload conditions.
This circuitry is not intended to replace proper PCB layout and heatsinking. Continuously running the device into
thermal shutdown degrades reliability.
10.4 Power Dissipation
The ability to remove heat from a die is different for each package type, presenting different considerations in the
printed-circuit-board (PCB) layout. The copper PCB area around the device that is free of other components
moves the heat from the device to ambient air. Performance data for JEDEC high-K boards are given in the
Thermal Information table. Using heavier copper increases effectiveness in removing heat from the device.
Power dissipation (PD) is equal to the product of the output current and the voltage drop across both output pass
elements, as shown in Equation 1:
PD = (VIN – VOUT1) × IOUT1 + (VIN – VOUT2) × IOUT2
14
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Power Dissipation (continued)
The maximum ambient temperature that the device can operate within the maximum TJ operating temperature of
125°C depends on the thermal impedance and the total power dissipated within the device. Figure 28 and
Figure 29 show maximum ambient temperature verses output current for two different LDO configurations.
Figure 29 shows the maximum ambient temperature with VIN = 3.3 V, VOUT1 = 1.8 V, and VOUT2 = 1 V versus
IOUT1. Figure 28 shows the maximum ambient temperature with VIN = 5 V, VOUT1 = 3.3 V, and VOUT2 = 1.8 V
versus IOUT1.
125
Maximum Ambient Temperature (ƒC)
Maximum Ambient Temperature (ƒC)
125
115
105
95
85
75
65
55
5 Vin, 3.3 Vout1, 1.8
Vout2, Iout2 = 0 mA
45
5 Vin, 3.3 Vout1, 1.8
Vout2, Iout2 = 75 mA
35
25
115
105
95
85
75
65
55
3.3 Vin, 1.8 Vout1, 1.0
Vout2, Iout2 = 0 mA
45
3.3 Vin, 1.8 Vout1, 1.0
Vout2, Iout2 = 75 mA
35
25
0
30
60
90
IOUT1 (mA)
120
150
0
Figure 28. Maximum Ambient Temperature vs Output
Current
(VIN = 5 V, VOUT1 = 3.3 V, VOUT2 = 1.8 V)
30
60
90
120
IOUT1 (mA)
C014
150
C014
Figure 29. Maximum Ambient Temperature vs Output
Current
(VIN = 3.3 V, VOUT1 = 1.8 V, VOUT2 = 1 V)
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11 Device and Documentation Support
11.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TLV716
Click here
Click here
Click here
Click here
Click here
TLV716P
Click here
Click here
Click here
Click here
Click here
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
16
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLV716120275PDPQR
ACTIVE
X2SON
DPQ
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
EI
TLV716120275PDPQT
ACTIVE
X2SON
DPQ
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
EI
TLV7162818PDPQR
ACTIVE
X2SON
DPQ
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CW
TLV7162818PDPQT
ACTIVE
X2SON
DPQ
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CW
TLV7162828PDPQR
ACTIVE
X2SON
DPQ
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CX
TLV7162828PDPQT
ACTIVE
X2SON
DPQ
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CX
TLV7163030PDPQR
ACTIVE
X2SON
DPQ
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CY
TLV7163030PDPQT
ACTIVE
X2SON
DPQ
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CY
TLV7163318PDPQR
ACTIVE
X2SON
DPQ
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CZ
TLV7163318PDPQT
ACTIVE
X2SON
DPQ
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CZ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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