ICS950602CGLFT

ICS950602 Integrated Circuit Systems, Inc. Programmable Timing Control Hub™ for PII/III™ Recommended Application: VIA Mobile PL133T and PLE133T Chipsets. Features/Benefits: • Programmable output frequency. • Programmable output divider ratios. • Programmable output rise/fall time. • Programmable output skew. • Programmable spread percentage for EMI control. • Watchdog timer technology to reset system if system malfunctions. • Programmable watch dog safe frequency. • Support I2C Index read/write and block read/write operations. • Uses external 14.318MHz crystal. GND *FS2/REF1 REF0 Vtt_PWRGD# VDDREF GND X1 X2 VDDPCI *FS4/PCICLK_F *FS3/PCICLK0 GND PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 SDRAM_IN *CPU_STOP# *PCI_STOP# *PD# **MULTISEL GND SDATA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 ICS950602 Output Features: • 2 - CPU clocks @ 2.5V • 1 - Pairs of differential CPU clocks @ 3.3V • 7 - PCI including 1 free running @ 3.3V • 7 - SDRAM @ 3.3V • 1 - 48MHz @ 3.3V fixed • 1 - 24_48MHz selectable @ 3.3V • 2 - REF @ 3.3V, 14.318MHz Pin Configuration 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 CPUCLK0 CPUCLK1 VDDCPU_2.5 VDDCPU_3.3 CPUCLKT CPUCLKC GND RESET# I REF SDRAM6 GND SDRAM0 SDRAM1 VDDSDRAM SDRAM2 SDRAM3 GND SDRAM4 SDRAM5 VDDSDRAM AVDD48 48MHz/FS0* 24_48MHz/FS1* SCLK 48-Pin SSOP & TSSOP * Internal Pull-up resistor of 120K to VDD ** these inputs have 120K internal pull-down to GND Key Specifications: • CPU Output Jitter