IDTV105ADAG

DATASHEET ADVANCE INFORMATION DUAL-CHANNEL,TRIPLE 10-BIT LVDS TRANSMITTER CONFIDENTIAL IDTV105A General Description Features The V105A LVDS display interface transmitter is designed to support pixel data transmission between a video processing engine and a digital video display. The dual channel LVDS output supports pixel rates up to 150 MHz, enabling compatibility with 1080p and WUXGA display resolutions. • Dual 32+3-bit LVTTL input supports up to 150 MHz pixel rate. • Dual pixel, LVDS output supports 150 MHz pixel rate (compatible with 1080p and WUXGA resolution) Total 67-bit LVCMOS/LVTTL input is provided. The V105A converts the 67 bit parallel input data into two 5-pair LVDS (Low Voltage Differential Signaling) serial data outputs, in odd/even pixel format. Input data can be clocked on the rising or falling edge of the input clock (selectable). In video applications the 35 data bits are normally divided into 10 bits for each R, G and B channel and 5 control bits (which includes VSYNC, HSYNC and DE). • • • • Internal PLL requires no external loop filter • • • • Single 3.3 V supply Selectable rising or falling clock edge for data alignment Compatible with Spread Spectrum clock source Reduced LVDS output voltage swing mode (selectable) to minimize EMI Low power consumption CMOS design Power down mode Available in 144 pin LQFP package (14x14mm body size) Block Diagram TXA1+ TA1[9:0] TB1[9:0] 10 TXA1TXB1+ 10 TC1[9:0] 10 RES1[2:1] 2 35 Serializer TTL Input TA2[9:0] TB2[9:0] TC2[9:0] RES2[2:1] 10 Data TXB1TXC1+ TXC1TXD1+ Data latch, TXD1- 10 Bit Mapper, TXE1+ 2 Demux TXE1- 10 TXD2+ HSYNC TXD2TXE2+ VSYNC 35 DE Data Serializer CTRL 3 TXE2TXA2+ TXA2TXB2+ MAP TXB2- R/F TXC2+ TXC2- RS PD TEST TCLK1+ CLKIN PLL and Device Timing TCLK1TCLK2+ TCLK2- DUAL-CHANNEL,TRIPLE 10-BIT LVDS TRANSMITTER 1 CONFIDENTIAL IDTV105A 7121/3 IDTV105A DUAL-CHANNEL,TRIPLE 10-BIT LVDS TRANSMITTER COMMERCIAL TEMPERATURE RANGE Pin Assignment NC TC17 TC18 TC19 Vcc GND TA20 TA21 TA22 TA23 TA24 TA25 TA26 TA27 TA28 TA29 Vcc GND TB20 TB21 TB22 TB23 TB24 TB25 TB26 TB27 TB28 TB29 Vcc GND TC20 TC21 TC22 TC23 TC24 TC25 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 TC26 TC27 Vcc GND TC28 TC29 HSYNC VSYNC DE NC NC NC Vcc GND CLKIN NC RES11 RES12 RES21 RES22 R/F RS NC MAP CTRL1 CTRL0 CTRL2 NC NC PD TEST NC NC PGND PVcc PDND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 V105A TC16 TC15 TC14 GND Vcc TC13 TC12 TC11 TC10 TB19 TB18 TB17 TB16 TB15 GND Vcc TB14 TB13 TB12 TB11 TB10 TA19 TA18 TA17 TA16 GND Vcc TA10 TA14 TA13 TA12 TA11 TA10 PGND PVcc PGND 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 LGND TXA1TXA1+ TXB1TXB1+ LVcc LGND TXC1TXC1+ TCLK1TCLK1+ LVcc LGND TXD1TXD1+ TXE1TXE1+ LVcc LGND TXA2TXA2+ TXB2TXA2+ LVcc LGND TXC2TXC2+ TCLK2TCLK2+ LVcc LGND TXD2TXD2+ TXE2TXE2+ LGND DUAL-CHANNEL,TRIPLE 10-BIT LVDS TRANSMITTER 2 CONFIDENTIAL IDTV105A 7121/3 IDTV105A DUAL-CHANNEL,TRIPLE 10-BIT LVDS TRANSMITTER COMMERCIAL TEMPERATURE RANGE Pin Descriptions Pin Number Pin Name 70, 71 TXA1+, TXA1- 68, 69 TXB1+, TXB1- 64, 65 TXC1+, TXC1- 58, 59 TXD1+, TXD1- 56, 57 TXE1+, TXE1- 52, 53 TXA2+, TXA2- 50,51 TXB2+, TXB2- 46, 47 TXC2+, TXC2- 40, 41 TXD2+, TXD2- 38,39 TXE2+, TXE2- 62, 63 TCLK1+, TCLK1- 44, 45 TCLK2+, TCLK2- 76, 77, 78, 79, 80, 81, 84, 85, 86, 87 TA10 ~TA19 88, 89, 90, 91, 92, 95, 96, 97, 98, 99 TB10 ~ TB19 100, 101, 102, 103, 106, 107, 108, 110, 111, 112 TC10 ~TC19 17, 18 RES11, RES12 115, 116,117, 118, 119, 120, 121, 122, 123, 124 TA20 ~ TA29 127, 128, 129, 130, 131, 132, 133, 134, 135, 136 TB20 ~ TB29 139, 140, 141, 142, 143, 144, 1, 2, 5, 6 TC20 ~ TC29 19, 20 Pin Type Pin Description LVDS Serial Data Output Pairs, Channel 1 LVDS OUT LVDS Serial Data Output Pairs, Channel 2 LVDS OUT LVDS Reference Clock Output Pair IN CMOS/TTL (or small signal) Data Bit Inputs, Channel 1 IN Control Input, Channel 1 IN CMOS/TTL (or small signal) Data Bit Inputs, Channel 2 RES21, RES22 IN Control Input, Channel 2 7 HSYNC IN HSYNC InputI 8 VSYNC IN VSYNC Input 9 DE IN DE Input 25, 26, 27 CTRL0 ~ CTRL2 IN MODE Selection 24 MAP IN MAP MODE Selection 30 PD IN High: Normal device operation Low: Power down; all outputs become high impedance 31 TEST IN Reserved: tie to High or Low DUAL-CHANNEL,TRIPLE 10-BIT LVDS TRANSMITTER 3 CONFIDENTIAL IDTV105A 7121/3 IDTV105A DUAL-CHANNEL,TRIPLE 10-BIT LVDS TRANSMITTER COMMERCIAL TEMPERATURE RANGE Pin Number Pin Name Pin Type Pin Description 22 RS IN Voltage level on this pin sets LVDS output swing voltage and data input swing voltage; refer to the table at the bottom of this page. 21 R/F IN Input Clock triggering edge select. High: Rising edge; Low: Falling edge. 3, 13,82, 93, 104, 113, 125, 137 VCC Power Power supply pins for TTL inputs and digital circuitry 15 CLKIN IN 4, 14, 83, 94, 105, 114, 126, 138 GND Ground Ground pins for TTL inputs and digital circuitry 43, 49, 55, 61, 67 LVCC Power Power supply pins for LVDS outputs 37, 42, 48, 54, 60, 66, 72 LGND Ground Ground pins for LVDS outputs 35, 74 PVCC Power Power supply pins for PLL circuitry 34, 36, 73, 75 PGND Ground Ground pins for PLL circuitry 10, 11, 12, 16, 23, 28, 29, 32, 33, 109 NC Clock Input Reserved RS Input Voltage LVDS Output Swing CMOS/TTL Input Configuration (Input Voltage Swing) RS Input Voltage LVDS Output Swing CMOS/TTL Input Configuration (Input Voltage Swing VCC 350 mV Standard Input and Output Configuration1 0.6 ~ 1.4 V (VREF1) 350 mV Small Input Swing, Standard Output Swing Configuration1 GND 200 mV Standard Input Swing, Reduced Output Swing Configuration1 1. Refer to DC Electrical Characteristics. DUAL-CHANNEL,TRIPLE 10-BIT LVDS TRANSMITTER 4 CONFIDENTIAL IDTV105A 7121/3 IDTV105A DUAL-CHANNEL,TRIPLE 10-BIT LVDS TRANSMITTER COMMERCIAL TEMPERATURE RANGE External Components Decoupling capacitors should be used for all power pins. Absolute Maximum Ratings Rating1 Item Supply Voltage, VCC -0.3 V to +4.0 V CMOS/TTL Input Voltage -0.3 V to VCC+0.3 V CMOS/TTL Output Voltage -0.3 V to VCC+0.3 V LVDS Driver Output Voltage -0.3 V to VCC+0.3 V Storage Temperature -55 to +150°C Junction Temperature +125°C LeadTemperature (10 seconds) +260°C Maximum Power Dissipation @ 25°C 1.15 W 1. Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability Recommended Operation Conditions Symbol Parameter VCC Power Supply Voltage TA Ambient Operating Temperature CTRL = LL (Dual-in/Dual-out) CTRL = LH (Dual-in/Single-out) CLK CTRL = HL (Single-in/Dual-out) CTRL = HH (Single-in/Single-out) DUAL-CHANNEL,TRIPLE 10-BIT LVDS TRANSMITTER Single Edge Input (CTRL = L) Double Edge Input (CTRL = H) Distribution Off (CTRL = L) Distribution On (CTRL = H) 5 CONFIDENTIAL Min. Typ. Max. Units +3 +3.3 +3.6 V 0 +70 °C Input 20 135 MHz LVDS Output 20 135 MHz Input 10 67.5 MHz LVDS Output 20 135 MHz Input 40 150 MHz LVDS Output 20 75 MHz Input 20 135 MHz LVDS Output 20 135 MHz Input 20 135 MHz LVDS Output 20 135 MHz Input 20 135 MHz LVDS Output 20 135 MHz IDTV105A 7121/3 IDTV105A DUAL-CHANNEL,TRIPLE 10-BIT LVDS TRANSMITTER COMMERCIAL TEMPERATURE RANGE DC Electrical Characteristics VDD=3.3 V ±10%, Ambient temperature 0 to +70°C Parameter Symbol Conditions Min. Typ. Max. Units CMOS/TTL Inputs, Standard Configuration Input High Voltage VIH RS=VCC or GND 2.00 VCC V Input Low Voltage VIL RS=VCC or GND GND 0.80 V Input Current IINC 0V