DATASHEET
ISL22102
32 Tap, Push-Button, Dual Audio Logarithmic Potentiometer with Buffer Amplifiers
and Audio Detection
FN6788
Rev 2.00
September 21, 2015
The ISL22102 integrates two digitally controlled
potentiometers (DCP) with buffered wiper outputs and an
internal bias voltage generator (VB) on a monolithic CMOS
integrated circuit. The wiper position is adjusted by the user
through simple Up and Down push buttons, ideal for stereo
volume control in audio applications.
Features
Each potentiometer is implemented using 31 polysilicon
resistors in a logarithmic array. Between each of the
resistors are tap points connected to the wiper terminal
through switches. When powered up, the wipers are reset to
the -20dB position.
• Zero Amplitude Wiper Switching (ZAWS)
In addition to the ISL22102’s low noise design, the ISL22102
also contains a zero-crossing detection circuitry to further
minimize click and pop noise during volume transition.
• Dual Audio Control – Two 32 Taps Log Pots
• Buffered Wiper Outputs
• Audio Detection with Threshold Input and Controlled
Delay
• Simple Push-button Interface
• Auto Increment/decrement After 1s Button Press
• Standby Mode
• Mute Function
• Total Resistance: 18.5k each DCP (Typical)
The internal VB generator of the ISL22102 provides a
precision middle scale voltage reference that reduces
external circuitry and simplifies application design.
• Voltage Operation
- VCC = 2.7V to 5.5V
- AVCC = 2.7V to 5.5V
The ISL22102 implements two power saving techniques for
power critical applications. It is a Standby Mode that can be
enabled to reduce the power consumption of the part when
DCP is not in use. The part also has Audio Detection
circuitry that provides an indication FLAG to external devices
and services. The FLAG can be delayed through D0, D1 and
D2 pin configuration. By connecting the FLAG to the standby
pin (SB), it will automatically put the part into Standby Mode.
• Temp Range = -40°C to +85°C
• Package Options
- 20 Ld TSSOP
- 20 Ld QFN
• Pb-Free (RoHS Compliant)
Audio Performance
• 0dB to -72dB Volume Control
Pinout
• -90dB Mute
ISL22102
(20 LD QFN)
TOP VIEW
• SNR: -90dB
UP
SB
FLAG
D2
D1
• THD+N: 0.01% @ 1kHz
20
19
18
17
16
• Crosstalk Rejection: -100dB @ 1kHz
• Channel-to-Channel Variation: ±0.1dB
2
14 VTH
Applications
VCC
3
13 GND
• Set Top Boxes
AVCC
4
12 HPB
• Stereo Amplifiers
LEFT_IN
5
11 HPA
• DVD Players
6
7
8
9
10
RIGHT_IN
MUTE
RIGHT_OUT
• Mid point 3dB-Cutoff: 100kHz
VB
15 D0
CB
1
LEFT_OUT
DN
FN6788 Rev 2.00
September 21, 2015
• Portable Audio Products
Page 1 of 12
ISL22102
Ordering Information
PART NUMBER
(Note)
PART MARKING
TOTAL RESISTANCE
(k)
TEMP RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG.#
ISL22102IV20Z* (No longer
available or supported)
22102 IVZ
18.5
-40 to +85
20 Ld TSSOP
M20.173
ISL22102IR20Z*
221 02IRZ
18.5
-40 to +85
20 Ld QFN
L20.4x4C
Block Diagram
AVCC
LEFT_IN
32-TAP
LOG
LEFT_OUT
+
2.5M
18.5k
+
VB
CB
2.5M
32-TAP
LOG
-
RIGHT_OUT
+
18.5k
GND
RIGHT_IN
HPA
HPB
VTH
AUDIO DETECT
AND DELAY
VCC
CONTROL UNIT
FLAG
UP
FN6788 Rev 2.00
September 21, 2015
DN
MUTE
SB
D0
D1
D2
Page 2 of 12
ISL22102
ISL22102
Pinouts
ISL22102
(20 LD TSSOP)
TOP VIEW
DN
UP
SB
FLAG
D2
D1
ISL22102
(20 LD QFN)
TOP VIEW
20
19
18
17
16
15 D0
1
MUTE
2
14 VTH
VCC
3
13 GND
AVCC
4
12 HPB
LEFT_IN
5
11 HPA
FLAG
1
20 D2
SB
2
UP
3
DN
4
19 D1 D
TE
18ORD0
P
P
SU 17 V
MUTE
5
VCC
6
7ER
NG8
LEFT_IN
LO
NO
9
LEFT_OUT
AVCC
AI
AV
E
BL
LA
O
R
8
CB
VB
9
10
RIGHT_IN
7
RIGHT_OUT
6
LEFT_OUT
CB 10
TH
16 GND
15 HPB
14 HPA
13 RIGHT_IN
12 RIGHT_OUT
11 VB
Pin Description
PIN
(QFN)
PIN
(TSSOP)
SYMBOL
1
4
DN
2
5
MUTE
3
6
VCC
Digital Power Supply.
4
7
AVCC
Analog Power Supply.
5
8
LEFT_IN
6
9
LEFT_OUT
7
10
CB
Terminal for external bypass capacitor to GND.
8
11
VB
AVCC/2 reference output. Can be used as a signal reference for other system components.
9
12
RIGHT_OUT
10
13
RIGHT_IN
FUNCTION
Active low volume decrement input with internal pull-up.
Active low mute input with internal pull-up.
Input terminal of the Left Channel Potentiometer. Referenced to VB.
Left channel output. Referenced to VB.
Right channel output. Referenced to VB.
Input terminal of the Right Channel Potentiometer. Referenced to VB.
11
14
HPA
Terminal A of audio-detector high pass filter capacitor.
12
15
HPB
Terminal B of audio-detector high pass filter capacitor.
13
16
GND
System Ground. Overall for analog and digital power supply.
14
17
VTH
Analog Input threshold for audio detection. Require an external resistor to VB.
15
18
D0
Programming bit (LSB) input for delayed FLAG low output.
16
19
D1
Programming bit input for delayed FLAG low output.
17
20
D2
Programming bit (MSB) input for delayed FLAG low output.
18
1
FLAG
Output signal indicates audio input detection.
19
2
SB
Active low Standby Mode input with internal pull-up.
20
3
UP
Active low volume increment input with internal pull-up.
EPAD*
Exposed Die Pad internally connected to GND
*Note: PCB thermal land for QFN/TDFN EPAD should be connected to GND plane or left floating. For more information refer to
http://www.intersil.com/data/tb/TB389.pdf
FN6788 Rev 2.00
September 21, 2015
Page 3 of 12
ISL22102
ISL22102
Absolute Maximum Ratings
Thermal Information
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C
Voltage on UP, DN, MUTE or SB
with Respect to GND . . . . . . . . . . . . . . . . . . . . .-0.3V to VCC + 0.3
Voltage on AVCC (referenced to GND) . . . . . . . . . . . . . -0.3V to +6V
Voltage on VCC (referenced to GND) . . . . . . . . . . . . . . -0.3V to +6V
Any Audio Inputs (referenced to VB) . . . . . . . . . . . . . ±AVCC/2 ± 0.3
Any Outputs (referenced to GND) . . . . . . . . . . .-0.3V to AVCC + 0.3
IOUT max (10s). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30mA
Latchup . . . . . . . . . . . . . . . . . . . . . . . . . . Class II, Level A at +85°C
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250V
Thermal Resistance (Typical)
JA (°C/W)
JC (°C/W)
20 Lead TSSOP (Note 1) . . . . . . . . . . .
85
N/A
20 Lead QFN (Notes 2, 3) . . . . . . . . . .
40
4
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature Range (Industrial) . . . . . . . . . . . . . . . . . . -40°C to 85°C
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Analog Supply Voltage (AVCC). . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Power Rating of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . .15mW
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
3. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Analog Specifications
SYMBOL
Over the recommended operating conditions unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
(Note 8)
TYP
(Note 4)
MAX
(Note 8)
UNIT
0
dB
DYNAMIC PERFORMANCE (Notes 5, 6)
Volume Control Range
-72
Mute Mode
@1VRMS
-90
dB
SNR
(Note 7)
Signal Noise Ratios (Unweighted)
@1VRMS @ 1kHz, AVCC = 5V
-90
dB
THD + N
(Note 7)
Total Harmonic Distortion + Noise
@1VRMS @ 1kHz, AVCC = 5V
Tap position from 0 to 10
0.01
%
XTalk
(Note 7)
DCP Isolation
@1kHz, @ tap 10
-100
dB
PSRR
(Note 7)
Power Supply Rejection
AVCC = 5V
-90
dB
(Note 7)
-3db Cutoff Frequency
Tap position from 0 to 25
100
kHz
(Note 7)
Noise
20Hz to 20kHz, VB Input
3
µVRMS
DCP ACCURACY
RTOTAL
End-to-end Resistance
18.5
End-to-end Resistance Tolerance
-20
DCP Input Resistance Matching
Wiper Step Size
Wiper Step Size Error
DCP-to-DCP Matching
-2
Tap position from 0 to 26
+2
-2
Tap position from 27 to 31
-4
Tap position from 0 to 26
±0.1
FN6788 Rev 2.00
September 21, 2015
%
dB
dB
dB
Tap position from 27 to 29
±1
dB
Tap position from 30 to 31
±2
dB
Tap position from 0 to 26
±0.5
dB
Tap position from 27 to 29
±1
dB
±2
dB
Tap position from 30 to 31
Ratiometric Temperature Coefficient
%
±0.5
Power-up Attenuation (Default Wiper
Position at Tap 10)
TCV
(Note 7)
k
+20
Tap position 15
-20
dB
±10
ppm/°C
Page 4 of 12
ISL22102
ISL22102
Analog Specifications
SYMBOL
TCR
(Note 7)
Over the recommended operating conditions unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
(Note 8)
Temperature Coefficient of End-to-end
Resistance
TYP
(Note 4)
MAX
(Note 8)
±340
UNIT
ppm/°C
DC ELECTRICAL SPECIFICATION
AVCC
Analog Power Supply
2.7
5.5
VCC
Digital Power Supply
2.7
5.5
V
AVCC and VCC Ramp Rate
0.2
50
V/ms
AVCC = 5.5V, IBIAS = 0mA, IOUT = 0mA for
both channels
750
µA
tR
V
IAVCC
Analog Supply Current
IASB
Analog Standby Current
AVCC = 5.5V, IBIAS = 0mA
360
µA
ICC1
VCC Supply Current
All Inputs = 5.5V, VCC = 5.5V, AVCC = 5.5V
60
µA
ISB
VCC Current (Standby)
VCC = 5.5V
VIN
Input Signal on LEFT_IN, RIGHT_IN
Pins
Reference to VB pin
Output Signal on LEFT_OUT,
RIGHT_OUT Pins
Reference to GND
VOUT
IOUT
(Note 5)
ROUT
35
µA
-AVCC/2
AVCC/2
V
0
AVCC
V
-15
15
mA
25
LEFT_OUT, RIGHT_OUT Buffer Current VCC = 5.5V
Buffer Output Impedance
CIN (Note 7) Input Capacitance LEFT_IN, RIGHT_IN
VB
Bias Output Voltage
VB Accuracy
IBIAS
VB Output Current
VCC = 5.5V
10
pF
AVCC/2
V
-50
50
mV
-5
5
mA
20
VB Output Impedance
Digital Specifications
SYMBOL
Over the recommended operating conditions unless otherwise specified.
PARAMETER
ILkg
Input Leakage Current
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
TEST CONDITIONS
For D0, D1, and D2
MIN
(Note 8)
-0.3
tWRPO
(Note 7)
tDB
UNITS
0.3
µA
V
VCC x 0.1
V
1.5
2.75
µA
TYP
(Note 4)
MAX
(Note 8)
UNITS
Over recommended operating conditions
SYMBOL
tPU (Note 7)
MAX
(Note 8)
VCC x 0.7
Ics
Internal Pull-up Current Source on UP, DN,
(Notes 6, 7) MUTE, SB Pins
AC Timing
TYP
(Note 4)
PARAMETER
MIN
(Note 8)
Power-up Time to Wiper Stable
10
ms
Wiper Response Time (include tDB and tZAWS )
35
ms
Auto Increment Starts after UP or DN Input is Keeping Low
1
s
Auto Increment Rate for the First 4s
4
Hz
Auto Increment Rate After 4s
8
Hz
Debounce Time
50
ms
tLOCK
(Note 7)
Lockout Time after Debounce Time, when any New Command will be Ignored
40
ms
tFLAG_HIGH
(Note 7)
FLAG Delay Time from when Audio Input is Detected to FLAG Asserted HIGH
1
µs
FN6788 Rev 2.00
September 21, 2015
Page 5 of 12
ISL22102
ISL22102
AC Timing
Over recommended operating conditions (Continued)
MIN
(Note 8)
TYP
(Note 4)
MAX
(Note 8)
SYMBOL
PARAMETER
tFLAG_LOW
FLAG Delay Time Interval Step Size, from D2:D0 = 001b to 111b.
FLAG is Asserted LOW when Audio Input is Below Threshold. (See Table 1, page 7)
30
s
Zero Amplitude Detection Time for Wiper Switching
32
ms
tZAWS
(Note 7)
UNITS
tLOW
Active LOW PU, DN or MUTE Pulse
20
ms
tGAP
Time Between Two Separate Push-Button Events
80
ms
NOTES:
4. Typical values are for AVCC = VCC = 2.7V to 5.0V, TA = +25°C.
5. TA = +25°C, AVCC = 5.0V; 2Hz to 20kHz Measurement Bandwidth, input signal 1VRMS, 1kHz Sine Wave.
6. When pin is open, voltage is pulled up through current source to VCC.
7. Limits should be considered typical and are not production tested.
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Timing Diagrams
tLOW
tGAP
UP
(DN, MUTE)
tWRPO
MI (Note 9)
VW
FIGURE 1. DIGITAL INPUT TIMING
UP
tDB + tZAWS
VW
MI (Note 9)
1s
AUTO INCREMENT 4Hz RATE
AUTO INCREMENT 8Hz RATE
4s
FIGURE 2. AUTO INCREMENT TIMING
NOTE:
9. MI in these timing diagrams refers to the minimum incremental change of the output (wiper) voltage.
FN6788 Rev 2.00
September 21, 2015
Page 6 of 12
ISL22102
ISL22102
Pin Descriptions
LEFT_IN, RIGHT_IN
The LEFT_IN and RIGHT_IN pins of the ISL22102 are
equivalent to the fixed terminals of a mechanical
potentiometer. The stereo audio signal applied to these pins
are referenced to VB and may have ±AVCC/2 maximum
amplitude.
SB
The active low SB input allows totally disconnect DCP arrays
from their LEFT_IN and RIGHT_IN pins, and move both wipers
to position closest to VB pin (as shown in Figure 3). It also sets
ISL22102 in low power Standby mode. When SB will be
released, the both wipers will be set at position they have prior
Standby.
.
LEFT_OUT, RIGHT_OUT
LEFT_IN
(RIGHT_IN)
The LEFT_OUT and RIGHT_OUT pins are the buffered wiper
terminals of the potentiometers which are equivalent to the
movable terminals of a mechanical potentiometers with
attached unity gain operational amplifiers (Op Amp). The
default output position of wiper terminals preset to -20dB
attenuation of input signals.
WIPER_LEFT
(WIPER_RIGHT)
VB
FIGURE 3. DCP CONNECTION IN STANDBY MODE
VB
This is reference voltage output equal AVCC/2. It is used as
common point for audio inputs, as well as reference signal for
other system components.
UP
The debounced active low UP input is increment the wipers
position of both channels. An on-chip 2µA current source pullup holds the UP input High. A switch closure to ground or a
Low logic level will after a debounce time and Zero Amplitude
Crossing Detection, move the wiper to the next adjacent higher
tap position. If the UP input signal is held down for 1s, the
wipers will auto increment their position with a 4Hz frequency
rate for 4s, and then a 8Hz frequency rate (see Figure 2).
When the wipers reach their top position of 0dB attenuation,
they will stay at this position ignoring any further Up
commands.
FLAG
This output pin provides status information to the rest of the
system about audio activity. It is High when at least one audio
input exceeds VTH threshold, otherwise its output level is Low.
The FLAG output can be directly connected to SB pin for
automatical setting the ISL22102 in Standby mode.
D0-D2
These three digital input pins allow to program a delay time for
FLAG Low output up to 240s. Table 1 lists the D0-D2 settings
and corresponding delay times (typical values).
TABLE 1. FLAG PROGRAMMED DELAY SETTINGS
D2
D1
D0
DELAY, (s)
0
0
0
0
DN
0
0
1
60
The debounced DN input is decrement the wipers position of
both channels. An on-chip 2µA current source pull-up holds the
DN input High. A switch closure to ground or a Low logic level
will, after a debounce time and Zero Amplitude Crossing
Detection, move the wiper to the next adjacent lower tap
position. If DN input signal is held down for 1s, the wipers will
auto decrement their position with a 4Hz frequency rate for 4s,
and then a 8Hz frequency rate. When the wipers reach their
bottom position of -90dB attenuation, they will stay at this
position ignoring any further Down or Mute commands.
0
1
0
90
0
1
1
120
1
0
0
150
1
0
1
180
1
1
0
210
1
1
1
240
MUTE
The first active low MUTE input pulse allows both wipers to
move, after a debounce time and Zero Amplitude Crossing
Detection, to the highest attenuation level of -90dB in one step.
The second active low MUTE pulse will return both wipers to
their original position, prior to MUTE command. An on-chip
2µA current source pull-up holds the MUTE input High.
FN6788 Rev 2.00
September 21, 2015
CB
This low pass filter terminal requires an external capacitor to
GND. The value of this capacitor, together with 5Minternal
resistor divider, directly determines the PSRR (Power Supply
Rejection Ratio) of audio and VB outputs. A 1µF to 10µF
capacitor is recommended.
HPA, HPB
These two high pass filter terminals require an external
capacitor of 100nF or higher in-between.
Page 7 of 12
ISL22102
ISL22102
VTH
This terminal allows to set up the threshold level of audio input
to be detected. When audio input to either Left or Right
channel is below this threshold - the FLAG output is Low; when
audio input is above this threshold - the FLAG output is High.
The threshold level is maintained over an external resistor RTH
placed between VTH pin, which is a source of ±10µA current,
and VB pin. To calculate the actual threshold we need to
multiply 10µA by a resistor value and divide the result by 1000.
For example, a 100k resistor is a subject of 1mV audio
detection threshold, e.g. 10µA*100k/1000 = 1mV. Note, the VTH
threshold multiplied by 1000 should not exceed 1/2 of AVCC. The
maximum resistor value for detection threshold can be found in
Table 2.
TABLE 2. RTH vs AVCC
AVCC (V)
MAX RTH (k)
5.5
188
5.25
177
5.0
167
4.75
156
4.5
146
4.25
135
4.0
125
3.75
115
3.5
104
3.25
94
3.0
83
2.75
73
pull-up so that they normally remain High. When pulled Low by
an external push button switch or a logic Low level input, the
wipers will be switched to the next adjacent tap position.
Internal debounce circuitry prevents inadvertent switching of
the wipers position if UP or DN remain Low for less than 15ms,
typical. Each of the buttons can be pushed either once for a
single increment/decrement or continuously for a multiple
increments/decrements. When making a continuous push,
after the first second, the device is going to auto
increment/decrement mode. If the button is held for longer than
1s, the wiper position will be auto incremented/decremented
with a rate of 4Hz for 4s, and with a rate of 8Hz after that. As
soon as the button is released, the ISL22102 will return to a
low power standby condition.
Each wiper acts like its mechanical equivalent and does not
move beyond the last position. That is, the counter does not
wrap around when clocked to either extreme.
Table 3 contains information about attenuation level for each
tap position.
TABLE 3. WIPER TAP POSITION vs ATTENUATION
TAP POSITION
ATTENUATION
0
0
1
-2dB
2
-4dB
3
-6dB
4
-8dB
5
-10dB
6
-12dB
7
-14dB
8
-16dB
Device Operation
9
-18dB
There are four sections in the ISL22102: the input control,
counter and decode section, two resistor arrays with buffered
wiper outputs, reference voltage generator of VB output, and
audio detection block with programmable delay FLAG output.
The input control section operates just like an up/down
counter. The output of this counter is decoded to turn on a
single electronic switch, connecting a point on the resistor
array to the wiper output. Each resistor array is comprised of
31 individual resistors connected in series and its wiper output
pass an attenuated audio input to the power amplifier. Both
resistor arrays have logarithmic taper with -72dB dynamic
range as shown in Table 2.
10
-20dB
11
-22dB
12
-24dB
13
-26dB
14
-28dB
15
-30dB
16
-32dB
17
-34dB
18
-36dB
19
-38dB
The ISL22102 is designed to interface directly to two
push-button switches for effectively moving the wipers up or
down. The UP and DN inputs increment or decrement 5-bit
counters respectively. The output of these counters are
decoded to select one of the thirty-two wiper positions along
the resistive array. The wiper increment input, UP, and the
wiper decrement input, DN, are both connected to an internal
20
-40dB
21
-42dB
22
-44dB
23
-46dB
24
-48dB
25
-50dB
FN6788 Rev 2.00
September 21, 2015
Page 8 of 12
ISL22102
ISL22102
TABLE 3. WIPER TAP POSITION vs ATTENUATION (Continued)
TAP POSITION
ATTENUATION
26
-52dB
27
-56dB
28
-60dB
29
-64dB
30
-68dB
31
-72dB
32
MUTE (-90dB)
Crossing. When either audio input exhibits a zero crossing
prior to 32ms, that command is immediately applied to
appropriate wiper. If the zero crossing does not occur before
the end of 32ms, the command is executed at the end of
32ms period. Zero crossing determines for each channel
independently.
There is a 40ms lockout time after any of the UP, DN or
MUTE button has been validly pushed, when any new
command is ignored. If two or more buttons are pressed
simultaneously, all commands are ignored upon release of
ALL buttons.
Once an UP, DN or MUTE button has been validly pushed,
the left and right inputs are examined for Zero Amplitude
Typical Application Diagram
VCC
VB
LEFT_IN
VB
RIGHT_IN
AVCC
LEFT_OUT
TO POWER AMPLIFIER
RIGHT_OUT
VB
RTH
VTH
FLAG
CB
SB
1µF
HPA
100nF
HPB
VCC*
UP
D2
DN
D1
MUTE
D0
*FLAG LOW OUTPUT DELAY IS 240s
FN6788 Rev 2.00
September 21, 2015
Page 9 of 12
ISL22102
ISL22102
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make
sure that you have the latest revision.
DATE
REVISION
September 21, 2015
FN6788.2
CHANGE
- Updated Ordering Information Table on page 2.
- Added Revision History.
- Added About Intersil Verbiage.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
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FN6788 Rev 2.00
September 21, 2015
Page 10 of 12
ISL22102
ISL22102
Package Outline Drawing
L20.4x4C
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 0, 11/06
4X
4.00
2.0
16X 0.50
A
B
16
6
PIN #1 INDEX AREA
20
6
PIN 1
INDEX AREA
1
4.00
15
2 .70 ± 0 . 15
11
(4X)
5
0.15
6
10
0.10 M C A B
4 20X 0.25 +0.05 / -0.07
20X 0.4 ± 0.10
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
0 . 90 ± 0 . 1
C
BASE PLANE
( 3. 8 TYP )
(
2. 70 )
SEATING PLANE
0.08 C
( 20X 0 . 5 )
SIDE VIEW
( 20X 0 . 25 )
C
0 . 2 REF
5
( 20X 0 . 6)
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
FN6788 Rev 2.00
September 21, 2015
Page 11 of 12
ISL22102
ISL22102
Thin Shrink Small Outline Plastic Packages (TSSOP)
N
INDEX
AREA
E
0.25(0.010) M
E1
2
INCHES
3
0.05(0.002)
-A-
20 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
GAUGE
PLANE
-B1
M20.173
B M
A
D
-C-
e
A2
A1
b
0.10(0.004) M
0.25
0.010
SEATING PLANE
L
c
0.10(0.004)
C A M
B S
NOTES:
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.047
-
1.20
-
A1
0.002
0.006
0.05
0.15
-
A2
0.031
0.051
0.80
1.05
-
b
0.0075
0.0118
0.19
0.30
9
c
0.0035
0.0079
0.09
0.20
-
D
0.252
0.260
6.40
6.60
3
E1
0.169
0.177
4.30
4.50
4
e
0.026 BSC
E
0.246
L
0.0177
N
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AC, Issue E.
MILLIMETERS
0.65 BSC
0.256
6.25
0.0295
0.45
20
0o
-
0.75
6
20
8o
0o
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
-
6.50
7
8o
Rev. 1 6/98
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
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FN6788 Rev 2.00
September 21, 2015
Page 12 of 12
