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ISL22511WFB8Z

ISL22511WFB8Z

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    SOICN8_150MIL

  • 描述:

    IC DGTL POT 10KOHM 32TAP 8SOIC

  • 数据手册
  • 价格&库存
ISL22511WFB8Z 数据手册
Datasheet ISL22511 Low Noise, Low Power, 32 Taps, Up/Down, Single Push-Button Controlled Potentiometer (XDCP™) Features The ISL22511 is a three-terminal digitally-controlled potentiometer (XDCP) implemented by a resistor array composed of 31 resistive elements and a wiper switching network. The ISL22511 features a push-button control, a Shutdown mode, and an industry-leading UTQFN package. • Solid-state non-volatile potentiometer • Push button controlled • Single or auto increment/decrement ○ Fast mode after 1s button press The push-button control has individual PU and PD inputs for adjusting the wiper. To eliminate redundancy, the wiper position automatically increments or decrements if one of these inputs is held longer than one second. • AUTOSTORE of last wiper position or manual store of wiper position • Shutdown mode • 32 wiper tap points Forcing both PU and PD low for more than two seconds activates shutdown mode. Shutdown mode disconnects the top of the resistor chain and moves the wiper to the lowest position to minimize power consumption. ○ Max scale wiper position on power-up • Low power CMOS ○ VCC = 2.7V to 5.5V ○ Terminal voltage, 0V to VCC The three terminals accessing the resistor chain naturally configure the ISL22511 as a voltage divider. A rheostat is easily formed by floating an end terminal or connecting it to the wiper. ○ Standby current, 3µA max • RTOTAL value = 10kΩ • High reliability ○ Endurance: 1000000 data changes per bit per register Related Literature For a full list of related documents, visit our website: ○ Register data retention: 50 years at T  +55°C • ISL22511 device page • 10 Ld UTQFN (2.1mmx1.6mm) package Applications • Pb-free (RoHS compliant) • Volume control • LED/LCD brightness control • Contrast control • Programming bias voltages • Ladder networks VCC (Supply Voltage) PD Control Block RW 9 VCC UTQFN 8 ASE (Top View) 7 RL RH 3 PU 1 PD 2 VSS 4 ASE RL 5 RH PU 10 NC O 6 RW NC VSS (Ground) FN6678 Rev.6.01 Jun.9.20 Page 1 of 15 ISL22511 1. 1. Overview Overview 1.1 Block Diagrams General Detailed VCC (Supply Voltage) 5-Bit Up/Down Counter PU PD RH 31 30 29 RH PU PD Control and Memory 5-Bit Nonvolatile Memory RW Store and Control Recall Circuitry ASE RL 28 One of 32 Decoders ASE Transfer Gates Resistor Array RW 2 1 0 VSS (Ground) RL Figure 1. Block Diagrams 1.2 Ordering Information Part Number (Notes 2, 3) ISL22511WFRU10Z-TK Part Marking Tape and Reel Temp. Range (°C) (Units) (Note 1) RTOTAL (kΩ) GD 10 -40 to +125 1k Package (RoHS Compliant) Pkg. Dwg. # 10 Ld UTQFN L10.2.1x1.6A Notes: 1. See TB347 for details about reel specifications. 2. These Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu-Ag plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J-STD-020. 3. For Moisture Sensitivity Level (MSL), see the ISL22511 device page. For more information about MSL, see TB363. 1.3 Pin Configuration 10 Ld UTQFN Top View 10 NC O 1 9 VCC PD 2 8 ASE RH 3 7 RL VSS 4 6 RW 5 PU NC FN6678 Rev.6.01 Jun.9.20 Page 2 of 15 ISL22511 1.4 1. Overview Pin Descriptions Pin Number Symbol Description 1 PU Falling-edge triggered input with internal pull-up. Toggle PU to move the wiper close to the RH terminal. The debounced PU input increments the wiper position. An on-chip pull-up holds the PU input HIGH. A switch closure to ground or a LOW logic level moves the wiper to the next adjacent higher tap position after a debounce time. 2 PD Falling-edge triggered input with internal pull-up. Toggle PD to move the wiper close to the RL terminal. The debounced PD input decrements the wiper position. An on-chip pull-up holds the PD input HIGH. A switch closure to ground or a LOW logic level moves the wiper to the next adjacent lower tap position after a debounce time. 3 RH The RH and RL pins are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum voltage is VCC. The terms RH and RL refer to the relative position of the terminal in relation to the wiper movement direction selected by the PU/PD input. 4 VSS Ground 5, 10 NC No connection 6 RW Wiper terminal of the potentiometer, which is equivalent to the movable terminal of a mechanical potentiometer. 7 RL The RH and RL pins are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum voltage is VCC. The terms RH and RL refer to the relative position of the terminal in relation to the wiper movement direction selected by the PU/PD input. 8 ASE Active low AUTOSTORE enable input or Manual Store active low input. The debounced ASE pin can be in one of two states: • AUTOSTORE is enabled if ASE is held LOW during power up. • AUTOSTORE is disabled if ASE is held HIGH during power-up. A LOW to HIGH transition initiates a manual store operation to enable connection of a push-button switch to this pin. For every valid push, the ISL22511 stores the current wiper position to the EEPROM. 9 VCC FN6678 Rev.6.01 Jun.9.20 Supply voltage Page 3 of 15 ISL22511 2. 2. Specifications Specifications 2.1 Absolute Maximum Ratings Minimum Maximum Unit Storage Temperature Parameter -65 +150 °C Voltage at PU and PD pin with respect to GND -0.3 VCC + 0.3 V VCC -0.3 +6 V Voltage at any DCP pin with respect to GND -0.3 VCC V ±6 mA IW (10s) ESD Rating Value Unit 4 kV Human Body Model (Tested per JS-001-2017) Machine Model 300 V Latch-Up (Tested per JESD78E; Class 2, Level A) 100 mA CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions can adversely impact product reliability and result in failures not covered by warranty. 2.2 Thermal Information Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 150 76 10 Lead UTQFN Package (Notes 4, 5) Notes: 4. θJA is measured in free air with the component mounted on a high-effective thermal conductivity test board. See TB379. 5. For θJC, the case temperature location is taken at the package top center.. Parameter Minimum Maximum Unit +150 °C Maximum Junction Temperature (Plastic Package) Pb-Free Reflow Profile 2.3 see TB493 Recommended Operation Conditions Parameter Minimum Maximum Unit Temperature Range (Extended Industrial) -40 +125 °C VCC 2.7 5.5 V Power Rating 15 mW Wiper Current ±3.0 mA 2.4 Electrical Specifications 2.4.1 Potentiometer Specifications Over recommended operating conditions, unless otherwise specified. Parameter RH to RL Resistance Symbol Test Conditions Min (Note 19) -20 End-to-End Temperature Coefficient VRH and VRL Terminal Voltages FN6678 Rev.6.01 Jun.9.20 Max (Note 19) 10 RTOTAL RH to RL Resistance Tolerance Wiper Resistance Typ (Note 6) kΩ +20 ±80 RW VRH, VRL VCC = 3.3V, wiper current IRW = VCC/RTOTAL VRH and VRL to GND 130 0 Unit % ppm/°C (Note 17) 500 Ω VCC V Page 4 of 15 ISL22511 2. Specifications Over recommended operating conditions, unless otherwise specified. (Continued) Parameter Symbol Test Conditions Noise on Wiper Terminal Potentiometer Capacitance (Note 18) Leakage on DCP Pins Min (Note 19) From 0Hz to 10MHz CH/CL/CW ILkgDCP Voltage at pin from GND to VCC Typ (Note 6) Max (Note 19) Unit -80 dBV 10/10/25 pF 0.05 0.4 µA -1 1 LSB (Note 7) -0.5 0.5 LSB (Note 7) Voltage Divider Mode (0V at RL; VCC at RH; measured at RW unloaded) Integral Non-Linearity INL (Note 11) Differential Non-Linearity DNL (Note 10) Zero-Scale Error ZSerror (Note 8) 0 0.1 2 LSB (Note 7) Full-Scale Error FSerror (Note 9) -2 -0.1 0 LSB (Note 7) Ratiometric Temperature Coefficient TCV (Note 12) 3dB Cutoff Frequency fCUTOFF Monotonic over all tap positions Wiper from 5 hex to 1F hex ±25 ppm/°C Wiper at the middle scale 500 kHz Resistor Mode (Measurements between RW and RL with RH not connected, or between RW and RH with RL not connected) Integral Non-Linearity RINL (Note 16) Differential Non-Linearity RDNL (Note 15) Offset Roffset (Note 14) DCP register set between 1 hex and 1F hex; monotonic over all tap positions -1.5 1.5 MI (Note 13) -0.5 0.5 MI (Note 13) 2 MI (Note 13) W option 0 1 2.4.2 DC Electrical Specifications Over recommended operating conditions unless otherwise specified. Parameter Symbol Test Conditions VCC Active Current ICC VCC = 5.5V, perform wiper move operation VCC Current During Store Operation ICC VCC = 5.5V, perform non-volatile store operation Standby Current ISB PU, PD Input Leakage Current ILkg PU, PD Input HIGH Voltage VIH PU, PD input LOW Voltage VIL PU, PD Input Capacitance (Note 18) CIN Pull-Up Resistor for PU and PD (Note 18) Min (Note 19) Typ (Note 6) 0.6 VIN = VSS to VCC -2 Max (Note 19) Unit 150 µA 2 mA 3 µA +2 µA VCC x 0.7 V VCC x 0.1 VCC = 3.3V, TA = +25°C, f = 1MHz Rpull_up V 10 pF 1 MΩ EEPROM Specifications EEPROM Endurance EEPROM Retention FN6678 Rev.6.01 Jun.9.20 Temperature 55°C 1000000 Cycles 50 Years Page 5 of 15 ISL22511 2. Specifications 2.4.3 AC Electrical Specifications Over recommended operating conditions unless otherwise specified. Symbol Min (Note 19) Time Between Two Separate Push-Button Events tGAP 2 Debounce Time tDB Parameter Typ (Note 6) Max (Note 19) Unit ms 15 28 ms Wiper Change on a Slow Mode tS SLOW 100 250 390 ms Wiper Change on a Fast Mode tS FAST 20 50 78 ms Time to Enter Shutdown Mode (keep PU and PD LOW) (Note 18) tstdn Power-Up to Wiper Stable tPU VCC Power-Up Rate tR VCC 2 0.2 s 6.5 ms 50 V/ms Notes: 6. Typical values are for TA = +25°C and 3.3V supply voltage. 7. LSB: [V(RW)31 – V(RW)0]/31. V(RW)31 and V(RW)0 are the voltage on the RW pin for the DCP register set to 1F hex and 00 hex, respectively. LSB is the incremental voltage when changing from one tap to an adjacent tap. 8. ZS error = V(RW)0/LSB. 9. FS error = [V(RW)31 – VCC]/LSB. 10. DNL = [V(RW)i – V(RW)i-1]/LSB -1, for i = 1 to 31; i is the DCP register setting. 11. INL = [V(RW)i – i • LSB – V(RW)]/LSB for i = 1 to 31 12. See Equation 1. (EQ. 1) Max  V  RW  i  – Min  V  RW  i  10 6 TC V = ---------------------------------------------------------------------------------------------  ------------------- Max  V  RW  i  + Min  V  RW  i    2 +165°C for i = 5 to 31 decimal, T = -40°C to +125°C. Max ( ) is the maximum value of the wiper voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range. 13. MI = |RW31 – RW0|/31. MI is a minimum increment. RW31 and RW0 are the measured resistances for the DCP register set to 1F hex and 00 hex, respectively. 14. Roffset = RW0/MI when measuring between RW and RL. Roffset = RW31/MI when measuring between RW and RH. 15. RDNL = (RWi – RWi-1)/MI for i = 1 to 31. 16. RINL = [RWi – (MI • i) – RW0]/MI for i = 1 to 31. 17. See Equation 2. (EQ. 2) 6  Max  Ri  – Min  Ri   10 TC R = ---------------------------------------------------------------  -------------------+165°C  Max  Ri  + Min  Ri    2 for i = 5 to 31 decimal, T = -40°C to +125°C. Max ( ) is the maximum value of the wiper voltage and Min ( ) is the minimum value of the resistance over the temperature range. 18. Limits should be considered typical and are not production tested. 19. Parameters with Min and/or Max limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. FN6678 Rev.6.01 Jun.9.20 Page 6 of 15 ISL22511 3. 3.1 3. Timing Diagrams Timing Diagrams Slow Mode Timing tDB tGAP PU MI* VW *MI is the minimum incremental change in the wiper voltage. 3.2 Fast Mode Timing tDB PU tS FAST tS SLOW MI* VW 1s * MI is the minimum incremental change in the wiper voltage. 3.3 Shutdown Mode Timing tDB 2s Shutdown Mode PU PD VW FN6678 Rev.6.01 Jun.9.20 Page 7 of 15 ISL22511 3.4 3. Timing Diagrams AUTOSTORE Mode Timing TDB 250ms 2s 20ms PU Memory Write Cycle PD (HIGH) ASE (LOW) Wiper Position N FN6678 Rev.6.01 Jun.9.20 N+1 N+2 Page 8 of 15 ISL22511 4. 4. Typical Performance Curves Typical Performance Curves 550 Vcc = 2.7V, T = -40°C Vcc = 2.7V, T = +25°C Vcc = 2.7V, T = +125°C 500 Vcc = 5.5V, T = -40°C Vcc = 5.5V, T = +25°C Vcc = 5.5V, T = +125°C 1,000 400 Standby ICC (nA) Wiper Resistance (Ω) 450 350 300 250 200 150 100 10 T = +25°C T = -40°C T = +125°C 100 50 1 0 0 5 10 15 20 25 2.7 30 3.2 3.7 Figure 2. Wiper Resistance vs Tap Position [ I(RW) = VCC/RTOTAL ] for 10kΩ 0.020 Vcc = 2.7V, T = -40°C Vcc = 2.7V, T = +25°C Vcc = 2.7V, T = +125°C 0.015 5.2 0.03 Vcc = 5.5V, T = -40°C Vcc = 5.5V, T = +25°C Vcc = 5.5V, T = +125°C 0.02 Vcc = 2.7V, T = -40°C Vcc = 2.7V, T = +25°C Vcc = 2.7V, T = +125°C Vcc = 5.5V, T = -40°C Vcc = 5.5V, T = +25°C Vcc = 5.5V, T = +125°C 5 20 0.01 INL (LSB) DNL (LSB) 4.7 Figure 3. Standby ICC vs Temperature 0.010 0.005 0.000 0.00 -0.01 -0.005 -0.02 -0.010 -0.015 -0.03 0 5 10 15 20 25 30 0 10 15 Tap Position (DEC) 30 Figure 5. INL vs Tap Position in Voltage Divider Mode for 10kΩ 0.008 0.0 Vcc = 2.7V Vcc = 5.5V Vcc = 2.7V 0.007 25 Tap Position (DEC) Figure 4. DNL vs Tap Position in Voltage Divider Mode for 10kΩ Vcc = 5.5V -0.1 FS Error (LSB) 0.006 ZS Error (LSB) 4.2 VCC (V) Tap Position (DEC) 0.005 0.004 0.003 0.002 -0.2 -0.3 -0.4 0.001 0.000 -0.5 -40 -20 0 20 40 60 80 100 Temperature (°C) Figure 6. ZS Error vs Temperature for 10kΩ FN6678 Rev.6.01 Jun.9.20 120 -40 -20 0 20 40 60 80 100 120 Temperature (°C) Figure 7. FS Error vs Temperature for 10kΩ Page 9 of 15 ISL22511 4. Typical Performance Curves 1.2 0.3 Vcc = 2.7V, T = -40°C Vcc = 2.7V, T = +25°C Vcc = 2.7V, T = +125°C Vcc = 5.5V, T = -40°C Vcc = 5.5V, T = +25°C Vcc = 5.5V, T = +125°C 1.0 Vcc = 2.7V, T = -40°C Vcc = 2.7V, T = +25°C Vcc = 2.7V, T = +125°C Vcc = 5.5V, T = -40°C Vcc = 5.5V, T = +25°C Vcc = 5.5V, T = +125°C 5 20 0.2 0.8 RINL (MI) RDNL (MI) 0.1 0.0 0.6 0.4 0.2 -0.1 0.0 -0.2 -0.2 0 5 10 15 20 25 30 0 10 Tap Position (DEC) 15 25 30 Tap Position (DEC) Figure 8. DNL vs Tap Position in Rheostat Mode for 10kΩ Figure 9. INL vs Tap Position in Rheostat Mode for 10kΩ (Wiper) 40 300 35 Vcc = 2.7V Vcc = 5.5V 250 TCr (ppm/°C) TCv (ppm/°C) 30 25 20 15 200 150 100 10 50 Vcc = 2.7V Vcc = 5.5V 5 0 0 5 10 15 20 25 30 5 10 15 Tap Position (DEC) Figure 10. TC for Voltage Divider Mode 100,000 Vcc = 3.3V, T = +25°C 0 Wiper Noise (nV/√Hz) Normalized Gain (dB) 25 30 Figure 11. TC for Rheostat Mode in ppm 4 2 20 Tap Position (DEC) -2 -4 -6 -8 -10 Vcc = 3.3V 10,000 1,000 100 10 -12 -14 1E+01 1 1E+02 1E+03 1E+04 1E+05 1E+06 Frequency (Hz) Figure 12. Frequency Response FN6678 Rev.6.01 Jun.9.20 1E+07 0.1 1 10 100 1000 10000 100000 Frequency (Hz) Figure 13. Frequency vs Noise on Wiper Terminal (Mid-Scale) Page 10 of 15 ISL22511 3.0 3.0 T = +25°C T = -40°C T = +125°C T = +25°C T = -40°C T = +125°C 2.5 Wiper Voltage (V) 2.5 Wiper Voltage (V) 4. Typical Performance Curves 2.0 1.5 1.0 0.5 2.0 1.5 1.0 0.5 0.0 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 0.5 1.0 Time (s) Figure 14. PU Held Continuously Low, Fast Mode Timing (VCC = 2.7V) 2.0 2.5 3.0 Figure 15. PD Held Continuously Low, Fast Mode Timing (VCC = 2.7V) 6 6 T = +25°C T = -40°C T = +125°C 5 Wiper Voltage (V) 5 Wiper Voltage (V) 1.5 Time (s) 4 3 2 4 3 2 T = +25°C T = -40°C T = +125°C 1 1 0 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 Time (s) Time (s) Figure 16. PU Held Continuously Low, Fast Mode Timing (VCC = 5.5V) Figure 17. PD Held Continuously Low, Fast Mode Timing (VCC = 5.5V) End-to-End RTOTAL % Change (%) 0.16 0.12 0.08 0.04 0.00 Vcc = 2.7V Vcc = 5.5V -0.04 -0.08 -40 -20 0 20 40 60 80 100 120 Temperature (°C) Figure 18. End to End RTOTAL % Change vs Temperature FN6678 Rev.6.01 Jun.9.20 Page 11 of 15 ISL22511 5. 5.1 5. Device Overview Device Overview Power-Up and Power-Down Requirements There are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins if VCC is always more positive than or equal to VRH and VRL, (VCC  VRH,VRL). The VCC ramp rate specification is always in effect. 5.2 Operating the Device The ISL22511 consists of three sections: • Input control, counter, and decode section • EEPROM memory • Resistor array The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch and connects a point on the resistor array to the wiper output. Under the proper conditions, the contents of the counter can be stored in EEPROM memory and retained for future use. The resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. Note: The ISL22511 is programmed from the factory with the wiper set to the highest position: 0x1Fh. The ISL22511 interfaces directly to two push-button switches to effectively move the wiper up or down. The PU input increments a 5-bit counter and the PD input decrements a 5-bit counter. The output of this counter is decoded to select one of the 32 wiper positions along the resistive array. The wiper increment input (PU) and the wiper decrement input (PD) are both connected to an internal pull-up so that they normally remain HIGH. When pulled LOW by an external push-button switch or a logic LOW level input, the wiper is switched to the next adjacent tap position. Internal debounce circuitry prevents inadvertent switching of the wiper position if PU or PD remain LOW for less than 15ms, typical. Each of the buttons can be pushed either once for a single increment/decrement or continuously for multiple increments/decrements. The number of increments/decrements of the wiper position depends on how long the button is pushed. When making a continuous push, the increment/decrement speed increases after the first second. The device is in Slow Scan mode for the first second. If the button is held for longer than one second, the device goes into Fast Scan mode. The ISL22511 returns to the standby condition as soon as the button is released. If two or more buttons are pressed simultaneously, all commands are ignored upon release of ALL buttons, except the Shutdown mode condition. When the wiper is at either fixed terminal, it acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. 5.3 AUTOSTORE The counter value is stored in EEPROM memory after two seconds of no activity on the PU or PD inputs while ASE is enabled (held LOW). When power is restored, the content of the memory is recalled and the counter resets to the last value stored. If AUTOSTORE is implemented, ASE is typically hard-wired to VSS. If ASE is held HIGH during power-up and then taken LOW, the wiper does not respond to the PU or PD inputs until ASE is brought HIGH and held HIGH. FN6678 Rev.6.01 Jun.9.20 Page 12 of 15 ISL22511 5.4 5. Device Overview Manual (Push Button) Store When ASE is not enabled (held HIGH), a push-button switch can be used to pull ASE LOW for more than 15ms and released to perform a manual store of the wiper position. Note: If ASE is pulled LOW while either the PU or PD inputs are held LOW continuously, no store to the EEPROM occurs. During memory write cycles, all inputs are ignored. 5.5 Shutdown Mode The ISL22511 enters Shutdown mode if both the PU and PD inputs are kept LOW for two seconds. In Shutdown mode, the resistors array is totally disconnected from its RH pin and the wiper is moved to the position closest to the RL pin, as shown in Figure 19. Note: The PU and PD inputs must be pulled LOW within the tDB time window of 15ms, otherwise, all commands are ignored until both inputs are released. See “Shutdown Mode Timing” on page 7 for more information. RH RW RL Figure 19. DCP Connection in Shutdown Mode Holding either the PU, PD, or ASE input LOW for more than 15ms causes the ISL22511 to exit Shutdown mode and return the wiper to the prior shutdown position. If PU or PD are held LOW for more than 250ms, the ISL22511 starts auto-incrementing or auto-decrementing the wiper position. 5.6 RTOTAL with VCC Removed The end-to-end resistance of the array fluctuates when VCC is removed. FN6678 Rev.6.01 Jun.9.20 Page 13 of 15 ISL22511 6. 6. Revision History Revision History Rev. Date 6.01 Jun.9.20 6.00 Feb.13.20 Changed EEPROM Endurance Minimum spec from 200000 to 1000000 cycles on page 1 (features bullet) and page 5 in Electrical Specification table. 5.00 Nov.14.19 Changed EEPROM Endurance Minimum spec from 1000000 to 200000 cycles on page 1 (features bullet) and page 5 in Electrical Specification table. 4.00 Sep.24.19 Removed SOIC information from document. Changed maximum limit for Wiper Resistance specification from 400Ω to 500Ω. Changed minimum limit for Wiper Change on a FAST mode from 25ms to 20 ms. Changed maximum limit for Power-up to Wiper Stable from 500µs to 6.5ms. Replaced Figures 2 through 18. 3.00 May.13.19 Applied new format. Updated ordering Information table by removing all 50k parts, adding tape and reel column, and updated notes. Added Related Literature section on page 1. Updated Figures 10, 11, and 12 removing the information for 50k parts. Removed all references to U option on page 5 Added Figures 14 and 15 on page 11. Under Features Section changed “Middle Scale Wiper Position on Power-up” with “Max Scale Wiper Position on Power-Up”. Under device overview in page 12 replace “Note the ISL22511 is programmed from the factory with the wiper set to RH tap” with “Note: The ISL22511 is programmed from the factory with the wiper set to the highest position 0x1Fh.” 2.00 Sep.9.15 - Ordering Information Table on page 2. - Added About Intersil section. - Updated POD L10.2.1X1.6A to latest revision changes are as follow: Updated to new POD format by removing table listing dimensions and moving dimensions onto drawing. Added Typical Recommended Land Pattern. Removed package option. - Updated POD M8.15 to latest revision changes are as follow: Changed Note 1 "1982" to "1994" Changed in Typical Recommended Land Pattern the following: 2.41(0.095) to 2.20(0.087) 0.76 (0.030) to 0.60(0.023) 0.200 to 5.20(0.205) Updated to new POD format by removing table and moving dimensions onto drawing and adding land pattern. 1.00 Jul.6.09 Added reliability information on page 1 under Features and EEPROM Specifications in DC Electrical Spec Table. 0.00 Mar.24.08 FN6678 Rev.6.01 Jun.9.20 Description Updated Notes 4 and 5. Updated Theta JC from 48.3° (Bottom) to 76° (Top). Initial release Page 14 of 15 ISL22511 7. 7. Package Outline Drawings Package Outline Drawings For the most recent package outline drawing, see L10.2.1x1.6A. L10.2.1x1.6A 10 Lead Ultra Thin Quad Flat No-Lead Plastic Package Rev 5, 3/10 8. PIN 1 INDEX AREA 2.10 A B PIN #1 ID 1 0.05 MIN. 1 8. 4 4X 0.20 MIN. 1.60 0.10 MIN. 10 5 0.80 10X 0.40 0.10 6 9 2X 6X 0.50 10 X 0.20 4 TOP VIEW 0.10 M C A B M C BOTTOM VIEW (10 X 0.20) SEE DETAIL "X" (0.05 MIN) PACKAGE OUTLINE 1 MAX. 0.55 0.10 C (10X 0.60) C (0.10 MIN.) (2.00) SEATING PLANE 0.08 C SIDE VIEW (0.80) (1.30) C 0 . 125 REF (6X 0.50 ) (2.50) 0-0.05 TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: FN6678 Rev.6.01 Jun.9.20 1. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 2. All Dimensions are in millimeters. Angles are in degrees. Dimensions in ( ) for Reference Only. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Lead width dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Maximum package warpage is 0.05mm. 6. Maximum allowable burrs is 0.076mm in all directions. 7. Same as JEDEC MO-255UABD except: No lead-pull-back, MIN. Package thickness = 0.45 not 0.50mm Lead Length dim. = 0.45mm max. not 0.42mm. 8. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. Page 15 of 15 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only for development of an application that uses Renesas products. Other reproduction or use of these resources is strictly prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property. Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products. (Rev.1.0 Mar 2020) Corporate Headquarters Contact Information TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku, Tokyo 135-0061, Japan www.renesas.com For further information on a product, technology, the most up-to-date version of a document, or your nearest sales office, please visit: www.renesas.com/contact/ Trademarks Renesas and the Renesas logo are trademarks of Renesas Electronics Corporation. All trademarks and registered trademarks are the property of their respective owners. © 2020 Renesas Electronics Corporation. All rights reserved.
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