ISL23710WIU10Z-T

DATASHEET NOT RECOMMENDED FOR NEW DESIGNS RECOMMENDED REPLACEMENT PART X9015 ISL23710 FN6126 Rev 0.00 August 22, 2005 Volatile Digitally Controlled Potentiometer (XDCP™) Terminal Voltage ±3V or ±5V, 128 Taps Up/Down Interface The Intersil ISL23710 is a digitally controlled potentiometer (XDCP). The device consists of a resistor array, wiper switches, and a control section. The wiper position is controlled by a Up/Down interface. Features The potentiometer is implemented by a resistor array composed of 127 resistive elements and a wiper switching network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the wiper element is controlled by the CS, U/D, and INC inputs. The wiper register is volatile and is reset to midscale on power up. The wiper position can be locked while powered up to prevent inadvertent changes. • 127 Resistive Elements - Typical RTOTAL tempco ±50ppm/°C - Ratiometric tempco ±4ppm/°C - End to end resistance range ±20% - Wiper resistance = 70 typ at VCC = 3.3V The device can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including: • DCP Terminal Voltage from ±2.7V to ±5V • Low Power CMOS - V- = -2.7V to -5.5V - VCC = 2.7V to 5.5V - Active current, 1mA max - Standby current, 500nA max • RTOTAL Values = 10k50k • Industrial and Automotive Control • Volatile Wiper Storage with Wiper Locking • Parameter and Bias Adjustments • Packages - 10 Ld MSOP • Pb-Free Plus Anneal Available (RoHS Compliant) • Amplifier Bias and Control Ordering Information TEMP RANGE (°C) PKG. DWG. # PART NUMBER (BRAND) RESISTANCE OPTION () ISL23710WIU10Z (AOG) (Notes 1, 2) 10K -40 to +85 10 Ld MSOP M10.118 (Pb-Free) ISL23710UIU10Z (AOF) (Notes 1, 2) 50K -40 to +85 10 Ld MSOP M10.118 (Pb-Free) PACKAGE NOTES: 1. Add “-T” suffix for tape and reel. 2. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. FN6126 Rev 0.00 August 22, 2005 • Up/Down Interface with Chip Select Enable Pinout ISL23710 (10 LD MSOP) TOP VIEW U/D 1 10 INC V- 2 9 VCC GND 3 8 RL CS 4 7 RW NC 5 6 RH Page 1 of 8 ISL23710 Block Diagram U/D INC VCC V- CS UP/DOWN 7-BIT UP/DOWN COUNTER 126 125 RH (U/D) INCREMENT INTERFACE AND CONTROL (INC) 124 RW ONE OF 128 DEVICE SELECT (CS) RH 127 TRANSFER GATES RESISTOR ARRAY DECODER RL 2 GND SIMPLE BLOCK DIAGRAM RECALL CONTROL CIRCUITRY 1 0 RL RW DETAILED BLOCK DIAGRAM Pin Descriptions PIN NUMBER SYMBOL DESCRIPTION 1 U/D Controls the direction of wiper movement and whether the counter is incremented or decremented. 2 V- 3 GND 4 CS Chip Select. The device is selected when the CS input is LOW. 5 NC No Connect. Pin is to be left unconnected. 6 RH A fixed terminal for one end of the potentiometer resistor. 7 RW The wiper terminal which is equivalent to the movable terminal of a potentiometer. 8 RL A fixed terminal for one end of the potentiometer resistor. 9 VCC Positive logic supply voltage. 10 INC Increment input; negative edge triggered. FN6126 Rev 0.00 August 22, 2005 Negative supply voltage for the potentiometer wiper control. Ground. Should be connected to a digital ground. Page 2 of 8 ISL23710 Absolute Maximum Ratings Thermal Information Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65C to +135C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Voltage on CS, INC, U/D and VCC with Respect to GND . . . . . . . . . . . . . . . . . . . . -0.3V to VCC+0.3V Voltage on V- (Referenced to GND) . . . . . . . . . . . . . . . . . . . . . . -6V V = |V(RH)-V(RL)| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . . 300°C IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V RH, RL, RW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to VCC ESD Rating (MIL-STD-883, Method 3015.7) . . . . . . . . . . . . . . .>2kV Thermal Resistance (Typical, Note 1) JA (°C/W) MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 Recommended Operating Conditions Temperature Range (Industrial) . . . . . . . . . . . . . . . . .-40°C to +85°C VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.7V to -5.5V CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. NOTE: 1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Analog Specifications SYMBOL RTOTAL VRH,VRL RW CH/CL/CW ILkgDCP Over recommended operating conditions unless otherwise stated. PARAMETER RH to RL Resistance TEST CONDITIONS MIN TYP (Note 1) MAX UNIT W option 10 k U option 50 k RH to RL Resistance Tolerance -20 +20 % RH, Rl Terminal Voltage V- VCC V 200  Wiper Resistance V- = -5.5V; VCC = +5.5V, wiper current = (VCC - V-)/RTOTAL 70 Potentiometer Capacitance (Note 13) Leakage on DCP Pins 10/10/ 25 Voltage at pin from V- to VCC -1 pF 0.1 1 µA -1 1 LSB (Note 2) -0.5 0.5 LSB (Note 2) 4 LSB (Note 2) VOLTAGE DIVIDER MODE (0V @ RL; V+ @ RH; measured at RW, unloaded) INL (Note 6) Integral Non-linearity DNL (Note 5) Differential Non-linearity W, U options ZSerror (Note 3) Zero-Scale Error W option FSerror (Note 4) Full-Scale Error U option TCV Ratiometric Temperature Coefficient (Note 7,13) 0 1 U option 0 0.5 2 W option -4 -1 0 -2 -0.5 0 DCP register set to i = 16 to 120d, T = -40°C to 85°C ±4 LSB (Note 2) ppm/°C RESISTOR MODE (Measurements between RW and RL with RH not connected, or between RW and RH with RL not connected) RINL (Note 11) Integral Non-linearity RDNL (Note 10) Differential Non-linearity Roffset (Note 9) Offset TCR Resistance Temperature Coefficient (Notes 12,13) FN6126 Rev 0.00 August 22, 2005 DCP register set between 16 and 127d Monotonic over all tap positions -1 1 MI (Note 8) -0.5 0.5 MI (Note 8) DCP register set to 0d, W option 0 2 5 MI (Note 8) DCP register set to 0d, U option 0 0.5 2 MI (Note 8) DCP register set to i = 16 to 127d, T = -40°C to +85°C ±50 ppm/°C Page 3 of 8 ISL23710 Operating Specifications Over the recommended operating conditions unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS MIN TYP (Note 1) VCC Supply Current, Volatile Write/Read CS = VIL, U/D = VIL or VIH and INC = 0.4V/2.4V min. tCYC RL, RH, RW not connected ICC1 MAX UNITS 500 µA IV- V- Supply Current, Volatile Write/Read CS = VIL, U/D = VIL or VIH and INC = 0.4V/2.4V min. tCYC RL, RH, RW not connected ISB VCC Current (Standby) VCC = +5.5V, 3 Wire Interface in Standby State 500 nA VCC = +2.7V, 3 Wire Interface in Standby State 300 nA V- Current (Standby) IV-SB ILkgDig Vpor -100 V- = -5.5V, 3 Wire Interface in Standby State -500 nA V- = -2.7V, 3 Wire Interface in Standby State -300 nA Leakage Current, at Pins INC, CS, U/D, Voltage at pin from GND to VCC A0, and A1 Power-on Recall Voltage µA -10 Minimum VCC at which the wiper is Reset 10 2.5 µA V SERIAL INTERFACE SPECS VIL INC, CS, and U/D Input Buffer LOW Voltage -0.3 0.3*VCC V VIH INC, CS, and U/D Input Buffer HIGH Voltage 0.7*VCC VCC+0.3 V Hysteresis (Note 13) INC, CS, and U/D Input Buffer Hysteresis Cpin (Note 13) INC, CS, and U/D Pin Capacitance AC Electrical Specifications 0.15* VCC V 10 pF VCC = 5V ±10%, TA = Full Operating Temperature Range unless otherwise stated SYMBOL PARAMETER MIN TYP (Note 1) MAX UNIT tCl CS to INC Setup 100 ns tlD INC HIGH to U/D Change 100 ns tDI U/D to INC Setup 1 µs tlL INC LOW Period 1 µs tlH INC HIGH Period 1 µs tICL Lock Setup Time, INC High to CS High 1 µs tIW (Note 13) INC to RW Change tCYC INC Cycle Time tR , tF INC Input Rise and Fall Time FN6126 Rev 0.00 August 22, 2005 1 µs 2 µs 500 µs Page 4 of 8 ISL23710 NOTES: 1. Typical values are for TA = 25°C and 3.3V supply voltage. 2. LSB: [V(RW)127 – V(RW)0]/127. V(RW)127 and V(RW)0 are V(RW) for the DCP register set to 7F hex and 00 hex respectively. LSB is the incremental voltage when changing from one tap to an adjacent tap. 3. ZS error = V(RW)0/LSB. 4. FS error = [V(RW)127 – VCC]/LSB. 5. DNL = [V(RW)i – V(RW)i-1]/LSB-1, for i = 1 to 127. i is the DCP register setting. 6. INL = V(RW)i – (i • LSB – V(RW)0) for i = 1 to 127. Max  V  RW  i  – Min  V  RW  i  10 6 7. TC V = ----------------------------------------------------------------------------------------------x ---------------- Max  V  RW  i  + Min  V  RW  i    2 125°C Max( ) is the maximum value of the wiper voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range. 8. MI = |R127 – R0| /127. R127 and R0 are the measured resistances for the DCP register set to 7F hex and 00 hex respectively. 9. Roffset = R0/MI, when measuring between RW and RL. Roffset = R127/MI, when measuring between RW and RH. 10. RDNL = (Ri – Ri-1)/MI, for i = 16 to 127d. 11. RINL = [Ri – (MI • i) – R0]/MI, for i = 16 to 127d. 6  Max  Ri  – Min  Ri   10 12. TC = ----------------------------------------------------------------  ----------------R  Max  Ri  + Min  Ri    2 125°C Max( ) is the maximum value of the resistance and Min ( ) is the minimum value of the resistance over the temperature range. 13. This parameter is not 100% tested. Symbol Table WAVEFORM FN6126 Rev 0.00 August 22, 2005 INPUTS OUTPUTS Must be steady Will be steady May change from Low to High Will change from Low to High May change from High to Low Will change from High to Low Don’t Care: Changes Allowed Changing: State Not Known N/A Center Line is High Impedance Page 5 of 8 ISL23710 AC Timing CS tCYC tCI tIL tIH tICL 90% 90% 10% INC tID tDI tF tR U/D tIW RW MI (3) Power Up and Down Requirements Chip Select (CS) In order to prevent unwanted tap position changes, bring the CS and INC high before or concurrently with the VCC pin on power-up. The potentiometer voltages must be applied after this sequence is completed. During power-up, the data sheet parameters for the DCP do not fully apply until 1ms after VCC reaches its final value. The wiper will be set to its initial value (64d) once VCC exceeds VPOR. The device is selected when the CS input is LOW. Pin Descriptions RH and RL The high (RH) and low (RL) terminals of the ISL23710 are equivalent to the fixed terminals of a mechanical potentiometer. The terminology of RL and RH references the relative position of the terminal in relation to wiper movement direction selected by the U/D input and not the voltage potential on the terminal. Principles of Operation There are three sections of the ISL23710: the input control, counter and decode section, and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. The resistor array is comprised of 127 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. Up/Down (U/D) The electronic switches on the device operate in a “make before break” mode when the wiper changes tap positions. If the wiper is moved several positions, multiple taps are connected to the wiper for tIW (INC to VW change). The RTOTAL value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. The U/D input controls the direction of the wiper movement and whether the counter is incriminated or decremented. Instructions and Programming RW Rw is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. The position of the wiper within the array is determined by the control inputs. Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. FN6126 Rev 0.00 August 22, 2005 The INC, U/D and CS inputs control the movement of the wiper along the resistor array. With CS set LOW the device is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a seven bit counter. The output of this counter is decoded to select one of onehundred twenty-eight wiper positions along the resistive array. Page 6 of 8 ISL23710 Bringing CS HIGH after INC is HIGH will cause the wiper value to be locked until power down (further changes in CS and INC will not change the wiper position). Otherwise, INC should be brought HIGH after CS to allow continued wiper changes. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. During initial power-up CS must go high along with or before VCC to avoid an accidental tap position change. TABLE 1. MODE SELECTION CS INC U/D MODE L H Wiper Up L L Wiper Down X Lock Wiper Value X Standby L X Standby H X Standby L H Wiper up One Position (not recommended) L L Wiper Down One Position (not recommended) H H H © Copyright Intersil Americas LLC 2005. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6126 Rev 0.00 August 22, 2005 Page 7 of 8 ISL23710 Mini Small Outline Plastic Packages (MSOP) N M10.118 (JEDEC MO-187BA) 10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE E1 INCHES E -B- INDEX AREA 1 2 0.20 (0.008) A B C TOP VIEW 4X  0.25 (0.010) R1 R GAUGE PLANE SEATING PLANE -CA 4X  A2 A1 b -H- 0.10 (0.004) L SEATING PLANE C D 0.20 (0.008) MAX MIN MAX NOTES 0.037 0.043 0.94 1.10 - A1 0.002 0.006 0.05 0.15 - A2 0.030 0.037 0.75 0.95 - b 0.007 0.011 0.18 0.27 9 c 0.004 0.008 0.09 0.20 - D 0.116 0.120 2.95 3.05 3 E1 0.116 0.120 2.95 3.05 4 0.020 BSC C a CL E1 0.20 (0.008) C D -B- 0.50 BSC - E 0.187 0.199 4.75 5.05 - L 0.016 0.028 0.40 0.70 6 0.037 REF N C SIDE VIEW MIN A L1 -A- e SYMBOL e L1 MILLIMETERS 0.95 REF 10 R 0.003 R1 - 10 - 0.07 0.003 -  5o 15o  0o 6o 7 - - 0.07 - - 5o 15o - 0o 6o Rev. 0 12/02 END VIEW NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-187BA. 2. Dimensioning and tolerancing per ANSI Y14.5M-1994. 3. Dimension “D” does not include mold flash, protrusions or gate burrs and are measured at Datum Plane. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions and are measured at Datum Plane. - H - Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. Formed leads shall be planar with respect to one another within 0.10mm (.004) at seating Plane. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Datums -A -H- . and - B - to be determined at Datum plane 11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only FN6126 Rev 0.00 August 22, 2005 Page 8 of 8