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ISL28258FBZ-T7

ISL28258FBZ-T7

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    SOIC8_150MIL

  • 描述:

    IC OPAMP GP 2 CIRCUIT 8SOIC

  • 数据手册
  • 价格&库存
ISL28258FBZ-T7 数据手册
DATASHEET ISL28158, ISL28258 FN6377 Rev 5.00 October 12, 2015 Micro-power Single and Dual Precision Rail-to-Rail Input-Output (RRIO) Low Input Bias Current Op Amps The ISL28158 and ISL28258 are micro-power precision operational amplifiers optimized for single supply operation at 5.5V and can operate down to 2.4V. These devices feature an Input Range Enhancement Circuit (IREC), which enables them to maintain CMRR performance for input voltages greater than the positive supply. The input signal is capable of swinging 0.25V above the positive supply and to 100mV below the negative supply with only a slight degradation of the CMRR performance. The output operation is rail-to-rail. The ISL28158 and ISL28258 draw minimal supply current while meeting excellent DC-accuracy noise and output drive specifications. Competing devices seriously degrade these parameters to achieve micro-power supply current. Offset current, voltage and current noise, slew rate, and gain bandwidth product are all two to ten times better than on previous micro-power op amps. The 1/f corner of the voltage noise spectrum is at 100Hz. This results in low frequency noise performance, which can only be found on devices with an order of magnitude higher supply current. ISL28158 and ISL28258 can be operated from one lithium cell or two Ni-Cd batteries. The input range includes both positive and negative rail. The output swings to both rails. Features • 34µA typical supply current (ISL28158) • 68µA typical supply current (ISL28258) • 300µV maximum offset voltage (8 Ld SOIC) • 1pA typical input bias current • 200kHz gain bandwidth product • 2.4V to 5.5V single supply voltage range • Rail-to-rail input and output • Enable pin (ISL28158 only) • Pb-free (RoHS compliant) Applications • Battery- or solar-powered systems • 4mA to 20mA current loops • Handheld consumer products • Medical devices • Sensor amplifiers • ADC buffers • DAC output amplifiers Pinouts ISL28158 (8 LD SOIC) TOP VIEW ISL28158 (6 LD SOT-23) TOP VIEW OUT 1 V- 2 + - IN+ 3 6 V+ NC 1 5 EN IN- 2 4 IN- IN+ 3 8 EN + V- 4 IN-_A 2 IN+_A 3 V- 4 FN6377 Rev 5.00 October 12, 2015 8 V+ 7 OUT_B - + + - 6 OUT 5 NC ISL28258 (8 LD MSOP) TOP VIEW ISL28258 (8 LD SOIC) TOP VIEW OUT_A 1 7 V+ 6 IN-_B 5 IN+_B OUT_A 1 8 E V+ BL LA I A IN-_A 2 7 OUT_B - + AV D R E E T G IN+_A 3 LON 6 IN-_B OR PP+ U NO S V- 4 OR 5 IN+_B Page 1 of 19 ISL28158, ISL28258 Ordering Information PART NUMBER (Note 2) PART MARKING PACKAGE (Pb-free) PKG. DWG. # ISL28158FHZ-T7 (Note 1) GABW (Note 3) 6 Ld SOT-23 P6.064A ISL28158FHZ-T7A (Note 1) GABW (Note 3) 6 Ld SOT-23 P6.064A ISL28158FBZ 28158 FBZ 8 Ld SOIC M8.15E ISL28158FBZ-T7 (Note 1) 28158 FBZ 8 Ld SOIC M8.15E ISL28258FBZ (No longer available, recommended replacement: ISL28158FBZ-T7) 28258 FBZ 8 Ld SOIC M8.15E ISL28258FBZ-T7 (Note 1) (No longer available, recommended replacement: ISL28158FBZ-T7 28258 FBZ 8 Ld SOIC M8.15E ISL28258FUZ (No longer available, recommended replacement: ISL28158FBZ-T7 8258Z 8 Ld MSOP M8.118A ISL28258FUZ-T7 (Note 1) (No longer available, recommended replacement: ISL28158FBZ-T7 8258Z 8 Ld MSOP M8.118A ISL28158EVAL1Z Evaluation Board NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. The part marking is located on the bottom of the part. FN6377 Rev 5.00 October 12, 2015 Page 2 of 19 ISL28158, ISL28258 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . V- -0.5V to V+ +0.5V ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V Charge Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1500V Thermal Resistance (Typical, Note 4) JA (°C/W) 6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 120 8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 160 Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C Pb-Free Reflow Profilesee link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 4. qJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, RL = OpenTA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. PARAMETER DESCRIPTION CONDITIONS MIN (Note 5) TYP MAX (Note 5) UNIT -300 3.1 300 µV DC SPECIFICATIONS VOS Input Offset Voltage 8 Ld SOIC -650 6 Ld SOT-23 -550 650 5 -750 8 Ld MSOP -350 Input Offset Voltage vs Temperature IOS Input Offset Current 3 -35 Input Bias Current TA = -40°C to +85°C -30 ±5 µV/°C 35 ±1 30 80 5 Common-Mode Voltage Range Guaranteed by CMRR 0 CMRR Common-Mode Rejection Ratio VCM = 0V to 5V 75 pA 80 -80 VCM µV 700 -80 IB 350 0.3 TA = -40°C to +85°C µV 750 -700 V OS --------------T 550 pA V 98 dB 98 dB 220 V/mV 45 V/mV 70 PSRR Power Supply Rejection Ratio V+ = 2.4V to 5.5V 80 75 AVOL Large Signal Voltage Gain VO = 0.5V to 4.5V, RL = 100kto VCM 100 75 VO = 0.5V to 4.5V, RL = 1kto VCM FN6377 Rev 5.00 October 12, 2015 Page 3 of 19 ISL28158, ISL28258 Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, RL = OpenTA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. (Continued) PARAMETER VOUT DESCRIPTION Maximum Output Voltage Swing CONDITIONS MIN (Note 5) Output low, RL = 100kto VCM TYP MAX (Note 5) UNIT 5.3 6 mV 20 Output low, RL = 1kto VCM 135 150 mV 250 Output high, RL = 100kto VCM 4.992 4.996 V 4.874 V 4.990 Output high, RL = 1kto VCM 4.84 4.77 IS,ON IS,OFF IO+ Quiescent Supply Current V+ = 5V, Enable (ISL28158) 34 V+ = 5V (ISL28258) 68 µA 55 86 µA 110 Quiescent Supply Current, Disabled (ISL28158) Short-Circuit Output Source Current 43 10 14 µA 19 RL = 10to VCM 27 30 mA 20 IO- Short-Circuit Output Sink Current RL = 10to VCM -25 -22 mA -15 VSUPPLY Supply Operating Range VENH EN Pin High Level (ISL28158) VENL EN Pin Low Level (ISL28158) IENH EN Pin Input High Current (ISL28158) VEN = V+ EN Pin Input Low Current (ISL28158) VEN = V- IENL V+ to V- 2.4 5.5 2 V V 1 0.8 V 1.5 µA 1.6 12 25 nA 30 AC SPECIFICATONS GBW Gain Bandwidth Product AV = 100, RF = 100kRG = 1k RL = 10kto VCM 200 kHz Unity Gain Bandwidth -3dB Bandwidth AV =1, RF = 0VOUT = 10mVP-P 420 kHz eN Input Noise Voltage Peak-to-Peak f = 0.1Hz to 10Hz 1.4 µVP-P Input Noise Voltage Density fO = 1kHz 64 nV/Hz iN Input Noise Current Density fO = 10kHz 0.19 pA/Hz CMRR @ 60Hz Input Common Mode Rejection Ratio VCM = 1VP-P, RL = 10kto VCM -70 dB PSRR+ @ 120Hz Power Supply Rejection Ratio (V+) V+, V- = ±1.2V and ±2.5V, VSOURCE = 1VP-P, RL = 10kto VCM -64 dB PSRR- @ 120Hz Power Supply Rejection Ratio (V-) V+, V- = ±1.2V and ±2.5V VSOURCE = 1VP-P, RL = 10kto VCM -85 dB 0.1 V/µs TRANSIENT RESPONSE SR Slew Rate FN6377 Rev 5.00 October 12, 2015 Page 4 of 19 ISL28158, ISL28258 Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, RL = OpenTA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. (Continued) PARAMETER tr, tf, Large Signal tr, tf, Small Signal tEN DESCRIPTION CONDITIONS MIN (Note 5) TYP MAX (Note 5) UNIT Rise Time, 10% to 90% VOUT AV = +2, VOUT = 1VP-P, Rg = Rf = 10k RL = 10kto VCM 10 µs Fall Time, 90% to 10% VOUT AV = +2, VOUT = 1VP-P, Rg = Rf = 10k RL = 10kto VCM 9 µs Rise Time, 10% to 90% VOUT AV = +2, VOUT = 10mVP-P, Rg = Rf = RL = 10kto VCM 650 ns Fall Time, 90% to 10% VOUT AV = +2, VOUT = 10mVP-P, Rg = Rf = RL = 10kto VCM 640 ns Enable to Output Turn-on Delay Time, 10% VEN = 5V to 0V, AV = +2, EN to 10% VOUT Rg = Rf = RL = 1k to VCM 15 µs Enable to Output Turn-off Delay Time, 10% VEN = 0V to 5V, AV = +2, Rg = Rf = RL = 1k to VCM EN to 10% VOUT 0.5 µs NOTE: 5. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. FN6377 Rev 5.00 October 12, 2015 Page 5 of 19 ISL28158, ISL28258 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. 1 -1 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 0 Rf = Rg = 499 -2 Rf = Rg = 1k -3 -4 -5 V+ = 5V RL = 1k CL = 16.3pF AV = +2 VOUT = 10mVP-P -6 -7 -8 -9 10 100 Rf = Rg = 10k Rf = Rg = 4.99k 1k 10k 100k 1M 4 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 1k VOUT = 10mV VOUT = 50mV VOUT = 100mV V+ = 5V RL = 1k CL = 16.3pF AV = +1 VOUT = 10mVP-P 10k FREQUENCY (Hz) 1M 1 0 0 -1 -1 -2 VOUT = 10mV -3 VOUT = 50mV -4 VOUT = 100mV -5 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 1 VOUT = 1V V+ = 5V RL = 10k CL = 16.3pF AV = +1 VOUT = 10mVP-P -6 -7 -8 1k 10k 100k FREQUENCY (Hz) 1M FIGURE 3. GAIN vs FREQUENCY vs VOUT, RL = 10k VOUT = 1V -5 V+ = 5V = 100k R L -6 CL = 16.3pF -7 AV = +1 -8 V OUT = 10mVP-P -9 1k 10k 100k FREQUENCY (Hz) AV = 1001 50 1 RL = 10k GAIN (dB) 0 -1 -2 -5 VOUT = 100mV -4 60 RL = 1k 2 -4 VOUT = 50mV -3 70 3 -3 VOUT = 10mV -2 V+ = 5V CL = 16.3pF AV = +1 VOUT = 10mVP-P -6 1k RL = 100k 10k 100k FREQUENCY (Hz) FIGURE 5. GAIN vs FREQUENCY vs RL FN6377 Rev 5.00 October 12, 2015 40 AV = 101 AV = 1, Rg = INF, Rf = 0 AV = 10, Rg = 1k, Rf = 9.09k AV = 101, Rg = 1k, Rf = 100k AV = 1001, Rg = 1k, Rf = 1M V+ = 5V CL = 16.3pF RL = 10k VOUT = 10mVP-P 30 20 10 0 1M 1M FIGURE 4. GAIN vs FREQUENCY vs VOUT, RL = 100k 4 NORMALIZED GAIN (dB) 100k FREQUENCY (Hz) FIGURE 2. GAIN vs FREQUENCY vs VOUT, RL = 1k FIGURE 1. GAIN vs FREQUENCY vs FEEDBACK RESISTOR VALUES Rf/Rg -9 VOUT = 1V -10 10 AV = 10 AV = 1 100 1k 10k FREQUENCY (Hz) 100k 1M FIGURE 6. FREQUENCY RESPONSE vs CLOSED LOOP GAIN Page 6 of 19 ISL28158, ISL28258 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. 8 1 V+ = 5V -1 V+ = 2.4V -2 -3 -4 -6 -7 RL = 10k CL = 16.3pF AV = +1 VOUT = 10mVP-P -8 1k 10k 100k FREQUENCY (Hz) CL = 98.3pF CL = 72.3pF CL = 55.3pF 6 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 0 -5 4 2 0 -2 CL = 43.3pF -4 CL = 34.3pF V+ = 5V -6 RL = 10k AV = +1 -8 V OUT = 10mVP-P -10 1k 1M FIGURE 7. GAIN vs FREQUENCY vs SUPPLY VOLTAGE 0 -10 -10 PSRR (dB) CMRR (dB) 1M PSRR- -20 -20 -30 -40 -50 V+ = 2.4V, 5V RL = 10k CL = 16.3pF AV = +1 VCM = 1VP-P -60 -70 -80 100 1k 10k FREQUENCY (Hz) 100k -30 PSRR+ -40 -50 V+ = 2.4V RL = 10k CL = 16.3pF AV = +1 VCM = 1VP-P -60 -70 -80 -90 -100 10 1M FIGURE 9. CMRR vs FREQUENCY, V+ = 2.4V AND 5V 100 1k 10k FREQUENCY (Hz) 100k 1M FIGURE 10. PSRR vs FREQUENCY, V+, V- = ±1.2V 10 1000 -10 INPUT VOLTAGE NOISE (nV/Hz) 0 PSRR- -20 -30 PSRR+ -40 -50 -60 V+ = 5V RL = 10k CL = 16.3pF AV = +1 VCM = 1VP-P -70 -80 -90 -100 10 10k 100k FREQUENCY (Hz) 10 0 -90 10 CL = 16.3pF FIGURE 8. GAIN vs FREQUENCY vs CL 10 PSRR (dB) (Continued) 100 1k 10k 100k FREQUENCY (Hz) FIGURE 11. PSRR vs FREQUENCY, V+, V- = ±2.5V FN6377 Rev 5.00 October 12, 2015 1M V+ = 5V RL = 10k CL = 16.3pF AV = +1 100 10 1 10 100 1k 10k 100k FREQUENCY (Hz) FIGURE 12. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY Page 7 of 19 ISL28158, ISL28258 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. 0 V+ = 5V RL = 10k CL = 16.3pF AV = +1 1 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 1 10 100 1k FREQUENCY (Hz) 10k -1.6 100k 0.4 0.018 SMALL SIGNAL (V) 0.020 0.2 V+, V- = ±2.5V RL = 10k CL = 16.3pF Rg = Rf = 10k AV = 2 VOUT = 1VP-P -0.2 -0.4 -0.6 0 50 100 150 1 2 300 350 5 6 TIME (s) 7 8 9 V+, V- = ±2.5V RL = 10k CL = 16.3pF Rg = Rf = 10k AV = 2 VOUT = 10mVP-P 0.012 0.010 0 50 100 150 200 250 TIME (µs) 300 350 FIGURE 16. SMALL SIGNAL STEP RESPONSE 6 1.2 V-OUT V-ENABLE 5 1.0 4 0.8 V+ = 5V Rg = Rf = 10k CL = 16.3pF AV = +2 VOUT = 1VP-P 3 2 1 0.6 0.4 0.2 RL = 10k 0 0 0 50 100 150 200 250 TIME (µs) 300 350 -0.2 400 FIGURE 17. ENABLE TO OUTPUT RESPONSE FN6377 Rev 5.00 October 12, 2015 10 0.014 0.006 400 FIGURE 15. LARGE SIGNAL STEP RESPONSE -1 4 0.016 0.008 200 250 TIME (µs) V-ENABLE (V) 3 FIGURE 14. INPUT VOLTAGE NOISE 0.1Hz TO 10Hz 0.6 0 0 OUTPUT (V) 0.1 FIGURE 13. INPUT CURRENT NOISE DENSITY vs FREQUENCY LARGE SIGNAL (V) RL = 10k V+ = 5V CL = 16.3pF AV = 1000 Rg = 100, Rf = 100k -0.2 INPUT NOISE (µV) INPUT CURRENT NOISE (pA/Hz) 10 (Continued) Page 8 of 19 400 ISL28158, ISL28258 500 100 400 80 300 60 200 40 I-BIAS (pA) VOS (µV) Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. 100 0 -100 V+ = 5V RL = OPEN Rf = 100k, Rg = 100 AV = +1000 -200 -300 -400 -500 -1 0 1 2 20 0 V+ = 5V RL = OPEN Rf = 100k, Rg = 100 AV = +1000 -20 -40 -60 -80 3 VCM (V) 4 5 6 FIGURE 18. INPUT OFFSET VOLTAGE vs COMMON MODE INPUT VOLTAGE 50 (Continued) -100 -1 0 1 2 3 VCM (V) 4 5 6 FIGURE 19. INPUT BIAS CURRENT vs COMMON MODE INPUT VOLTAGE 80 N = 1000 N = 12 75 45 CURRENT (µA) CURRENT (µA) MAX 40 MEDIAN 35 MIN 30 MAX 65 MEDIAN 60 MIN 55 25 20 -40 70 -20 0 20 40 60 80 100 50 -40 120 -20 0 20 FIGURE 20. SUPPLY CURRENT ENABLED (SINGLE) vs TEMPERATURE, V+, V- = ±2.5V 14 13 80 100 120 500 N = 1000 MAX 300 11 MAX 100 VOS (µV) CURRENT (µA) 60 FIGURE 21. SUPPLY CURRENT (DUAL) vs TEMPERATURE, V+, V- = ±2.5V N = 1000 12 10 MEDIAN 9 8 MEDIAN -100 MIN -300 MIN 7 -500 6 5 -40 40 TEMPERATURE (°C) TEMPERATURE (°C) -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 22. SUPPLY CURRENT DISABLED (SINGLE) vs TEMPERATURE, V+, V- = ±2.5V FN6377 Rev 5.00 October 12, 2015 -700 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 23. VOS (SOIC PKG) vs TEMPERATURE, VIN = 0V, V+, V- = ±2.75V Page 9 of 19 ISL28158, ISL28258 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. 500 700 N = 1000 N = 1000 500 300 MAX MEDIAN VOS (µV) VOS (µV) MAX 300 100 -100 MIN 100 MEDIAN -100 MIN -300 -300 -500 -700 -40 (Continued) -500 -20 0 20 40 60 80 100 -700 -40 120 -20 0 TEMPERATURE (°C) FIGURE 24. VOS (SOIC PKG) vs TEMPERATURE, VIN = 0V, V+, V- = ±2.5V 800 MAX 200 VOS (µV) VOS (µV) -200 -200 -400 -600 -600 MIN -800 MIN -800 -20 0 20 40 60 80 100 120 -1000 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 26. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V, V+, V- = ±2.75V FIGURE 27. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V, V+, V- = ±2.5V 600 N = 1000 N = 12 400 MAX 600 400 200 200 VOS (µV) VOS (µV) 120 MEDIAN 0 -400 MEDIAN 0 -200 MAX MEDIAN 0 -200 -400 MIN -600 MIN -400 -800 -1000 -40 100 400 MEDIAN 0 800 80 MAX 600 200 1000 60 N = 1000 800 400 -1000 -40 40 FIGURE 25. VOS (SOIC PKG) vs TEMPERATURE, VIN = 0V, V+, V- = ±1.2V 1000 N = 1000 600 20 TEMPERATURE (°C) -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 28. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V, V+, V- = ±1.2V FN6377 Rev 5.00 October 12, 2015 -600 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 29. VOS (MSOP PKG) vs TEMPERATURE, VIN = 0V, V+, V- = ±2.5V Page 10 of 19 ISL28158, ISL28258 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. 600 250 N = 12 MAX N = 1000 400 200 200 MEDIAN 0 -200 MEDIAN 150 MAX IBIAS+ (pA) VOS (µV) (Continued) 100 MIN 50 MIN -400 0 -600 -40 -20 0 20 40 60 80 100 -50 -40 120 -20 0 TEMPERATURE (°C) N = 1000 300 IBIAS+ (pA) IBIAS- (pA) 120 250 MEDIAN 250 200 150 MIN 100 MEDIAN 200 150 100 MIN 50 50 0 0 -50 -40 -20 0 20 40 60 80 100 -50 -40 120 -20 0 FIGURE 32. IBIAS- vs TEMPERATURE, V+, V- = ±2.5V MAX 60 80 100 120 N = 1000 0 350 -20 300 MEDIAN -40 IOS (pA) 250 200 150 MAX -60 -80 MEDIAN -100 MIN 100 -120 50 MIN -140 0 -50 -40 40 FIGURE 33. IBIAS+ vs TEMPERATURE, V+, V- = ±1.2V 20 N = 1000 20 TEMPERATURE (°C) TEMPERATURE (°C) IBIAS- (pA) 100 MAX 300 MAX 350 400 80 350 400 450 60 FIGURE 31. IBIAS+ vs TEMPERATURE, V+, V- = ±2.5V N = 1000 450 40 TEMPERATURE (°C) FIGURE 30. VOS (MSOP PKG) vs TEMPERATURE, VIN = 0V, V+, V- = ±1.2V 500 20 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 34. IBIAS- vs TEMPERATURE, V+, V- = ±1.2V FN6377 Rev 5.00 October 12, 2015 -160 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 35. IOS vs TEMPERATURE, V+, V- = ±2.5 Page 11 of 19 ISL28158, ISL28258 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. 30 140 N = 1000 10 (Continued) N = 1000 130 MAX -10 120 CMRR (dB) IOS (pA) -30 MAX -50 -70 MEDIAN -90 110 MEDIAN 100 90 -110 MIN -130 -150 -40 -20 0 20 40 60 80 80 100 MIN 70 -40 120 -20 0 TEMPERATURE (°C) FIGURE 36. IOS vs TEMPERATURE, V+, V- = ±1.2V 140 AVOL (V/mV) PSRR (dB) 110 100 MEDIAN 90 20 40 60 80 TEMPERATURE (°C) 100 4.92 N = 1000 MAX MEDIAN MIN -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 N = 1000 4.91 4.90 VOUT (V) AVOL (V/mV) 250 FIGURE 39. AVOL vs TEMPERATURE, V+, V- = ±2.5V, VO = -2V TO +2V, RL = 100k 55 MEDIAN 45 40 MIN MAX 4.89 4.88 MEDIAN 4.87 4.86 30 MIN 4.85 25 20 -40 300 100 -40 120 60 35 MAX 150 FIGURE 38. PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.75V 70 120 200 MIN 0 100 N = 1000 350 120 50 80 400 MAX 65 60 450 130 -20 40 FIGURE 37. CMRR vs TEMPERATURE, VCM = -2.5V TO +2.5V, V+, V- = ±2.5V N = 1000 80 -40 20 TEMPERATURE (°C) -20 0 20 40 60 80 TEMPERATURE (°C) 100 FIGURE 40. AVOL vs TEMPERATURE, V+, V- = ±2.5V, VO = -2V TO +2V, RL = 1k FN6377 Rev 5.00 October 12, 2015 120 4.84 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 41. VOUT HIGH vs TEMPERATURE, V+, V- =±2.5V, RL = 1k Page 12 of 19 ISL28158, ISL28258 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. 4.9980 190 N = 1000 180 4.9975 N = 1000 MAX 170 VOUT (mV) MAX VOUT (V) (Continued) 4.9970 MEDIAN 4.9965 MIN 4.9960 160 150 140 MEDIAN 130 120 MIN 110 4.9955 -40 -20 0 20 40 60 80 100 100 -40 120 -20 0 N = 1000 7.0 MAX VOUT (mV) 6.5 6.0 5.5 MEDIAN 5.0 MIN 4.5 4.0 -40 -20 0 20 40 60 80 100 120 45 60 80 100 120 N = 1000 40 MAX 35 MEDIAN 30 25 MIN 20 -40 -20 0 TEMPERATURE (°C) FIGURE 44. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V, RL = 100k IO- SHORT CIRCUIT CURRENT (mA) 40 FIGURE 43. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V, RL = 1k IO+ SHORT CIRCUIT CURRENT (mA) FIGURE 42. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V, RL = 100k 7.5 20 TEMPERATURE (°C) TEMPERATURE (°C) 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 45. IO+ SHORT CIRCUIT OUTPUT CURRENT vs TEMPERATURE VIN = -2.55V, RL = 10k, V+, V- = ±2.5V -20 N = 1000 MAX -22 -24 MEDIAN -26 MIN -28 -30 -32 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 46. IO- SHORT CIRCUIT OUTPUT CURRENT vs TEMPERATURE VIN = +2.55V, RL = 10k, V+, V- = ±2.5V FN6377 Rev 5.00 October 12, 2015 Page 13 of 19 ISL28158, ISL28258 Pin Descriptions ISL28158 (6 Ld SOT-23) ISL28158 (8 Ld SOIC) 4 ISL28258 (8 Ld SOIC) (8 Ld MSOP) PIN NAME FUNCTION 1, 5 NC Not connected 2 ININ- (A) IN- (B) inverting input 2 (A) 6 (B) EQUIVALENT CIRCUIT V+ IN- IN+ VCircuit 1 3 2 3 (A) 5 (B) IN+ IN+ (A) IN+ (B) 4 V- 3 4 Non-inverting input Negative supply See Circuit 1 V+ CAPACITIVELY COUPLED ESD CLAMP VCircuit 2 1 6 1 (A) 7 (B) OUT OUT (A) OUT (B) Output V+ OUT VCircuit 3 6 7 5 8 8 V+ Positive supply EN Chip enable See Circuit 2 V+ LOGIC PIN VCircuit 3 © Copyright Intersil Americas LLC 2007-2015. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6377 Rev 5.00 October 12, 2015 Page 14 of 19 ISL28158, ISL28258 Applications Information Introduction The ISL28158 is a single CMOS rail-to-rail input, output (RRIO) operational amplifier with an enable feature. The ISL28258 is a dual version without the enable feature. Both devices are designed to operate from single supply (2.4V to 5.5V) or dual supplies (±1.2V to ±2.75V). Rail-to-Rail Input/Output These devices feature PMOS inputs with an input common mode range that extends up to 0.3V beyond the V+ rail, and to 0.1V below the V- rail. The CMOS output features excellent drive capability, typically swinging to within 6mV of either rail with a 100k load. Results of Over-Driving the Output Caution should be used when over-driving the output for long periods of time. Over-driving the output can occur in two ways 1) The input voltage times the gain of the amplifier exceeds the supply voltage by a large value or, 2) the output current required is higher than the output stage can deliver. These conditions can result in a shift in the Input Offset Voltage (VOS) as much as 1µV/hr. of exposure under these conditions. IN+ and IN- Input Protection All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. They also contain back-to-back diodes across the input terminals (see “Pin Descriptions” on page 14 - Circuit 1). For applications where the input differential voltage is expected to exceed 0.5V, an external series resistor must be used to ensure the input currents never exceed 5mA (Figure 47). RIN VIN + VOUT RL implementation is best suited for small signal applications. If large signals are required, use series IN+ resistors, or large value RF, to keep the feed through current low enough to minimize the impact on the active channel. See “Limitations of the Differential Input Protection” on page 15 for more details. The EN pin also has an internal pull-down. If left open, the EN pin will pull to the negative rail and the device will be enabled by default. When not used, the EN pin should either be left floating or connected directly to the -V pin. Limitations of the Differential Input Protection If the input differential voltage is expected to exceed 0.5V, an external current limiting resistor must be used to ensure the input current never exceeds 5mA. For non-inverting unity gain applications, the current limiting can be via a series IN+ resistor, or via a feedback resistor of appropriate value. For other gain configurations, the series IN+ resistor is the best choice, unless the feedback (RF) and gain setting (RG) resistors are both sufficiently large to limit the input current to 5mA. Large differential input voltages can arise from several sources: 1) During open loop (comparator) operation. Used this way, the IN+ and IN- voltages don’t track, so differentials arise. 2) When the amplifier is disabled but an input signal is still present. An RL or RG to GND keeps the IN- at GND, while the varying IN+ signal creates a differential voltage. Mux Amp applications are similar, except that the active channel VOUT determines the voltage on the IN- terminal. 3) When the slew rate of the input pulse is considerably faster than the op amp’s slew rate. If the VOUT can’t keep up with the IN+ signal, a differential voltage results, and visible distortion occurs on the input and output signals. To avoid this issue, keep the input slew rate below 0.1V/µs, or use appropriate current limiting resistors. Large (>2V) differential input voltages can also cause an increase in disabled ICC. FIGURE 47. INPUT CURRENT LIMITING Enable/Disable Feature The ISL28158 offers an EN pin that disables the device when pulled up to at least 2.0V. In the disabled state (output in a high impedance state), the part consumes typically 10µA at room temperature. By disabling the part, multiple ISL28158 parts can be connected together as a MUX. In this configuration, the outputs are tied together in parallel and a channel can be selected by the EN pin. The loading effects of the feedback resistors of the disabled amplifier must be considered when multiple amplifier outputs are connected together. Note that feed through from the IN+ to IN- pins occurs on any Mux Amp disabled channel where the input differential voltage exceeds 0.5V (e.g., active channel VOUT = 1V, while disabled channel VIN = GND), so the mux FN6377 Rev 5.00 October 12, 2015 Page 15 of 19 ISL28158, ISL28258 Using Only One Channel The ISL28258 is a dual op amp. If the application only requires one channel, the user must configure the unused channel to prevent it from oscillating. The unused channel will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 48). temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 1: T JMAX = T MAX +   JA xPD MAXTOTAL  (EQ. 1) where: • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) • PDMAX for each amplifier can be calculated using Equation 2: - V OUTMAX PD MAX = 2*V S  I SMAX +  V S - V OUTMAX   ---------------------------R + L FIGURE 48. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Current Limiting These devices have no internal current-limiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. (EQ. 2) where: • TMAX = Maximum ambient temperature • JA = Thermal resistance of the package • PDMAX = Maximum power dissipation of 1 amplifier • VS = Supply voltage (Magnitude of V+ and V-) Power Dissipation • IMAX = Maximum supply current of 1 amplifier It is possible to exceed the +125°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION October 12, 2015 FN6377.5 CHANGE Updated Ordering Information Table on page 2. Added Revision History and About Intersil sections. About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support FN6377 Rev 5.00 October 12, 2015 Page 16 of 19 ISL28158, ISL28258 Package Outline Drawing P6.064A 6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 0, 2/10 1.90 0-3° 0.95 D 0.08-0.20 A 5 6 4 PIN 1 INDEX AREA 2.80 3 1.60 3 0.15 C D 2x 1 (0.60) 3 2 0.20 C 2x 0.40 ±0.05 B 5 SEE DETAIL X 3 0.20 M C A-B D TOP VIEW 2.90 5 END VIEW 10° TYP (2 PLCS) 0.15 C A-B 2x H 1.14 ±0.15 C SIDE VIEW 0.10 C 0.05-0.15 1.45 MAX SEATING PLANE DETAIL "X" (0.25) GAUGE PLANE 0.45±0.1 4 (0.60) (1.20) NOTES: (2.40) (0.95) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 3. Dimension is exclusive of mold flash, protrusions or gate burrs. 4. Foot length is measured at reference to guage plane. 5. This dimension is measured at Datum “H”. 6. Package conforms to JEDEC MO-178AA. (1.90) TYPICAL RECOMMENDED LAND PATTERN FN6377 Rev 5.00 October 12, 2015 Page 17 of 19 ISL28158, ISL28258 Package Outline Drawing M8.15E 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09 4 4.90 ± 0.10 A DETAIL "A" 0.22 ± 0.03 B 6.0 ± 0.20 3.90 ± 0.10 4 PIN NO.1 ID MARK 5 (0.35) x 45° 4° ± 4° 0.43 ± 0.076 1.27 0.25 M C A B SIDE VIEW “B” TOP VIEW 1.75 MAX 1.45 ± 0.1 0.25 GAUGE PLANE C SEATING PLANE 0.10 C 0.175 ± 0.075 SIDE VIEW “A 0.63 ±0.23 DETAIL "A" (1.27) (0.60) NOTES: (1.50) (5.40) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. The pin #1 identifier may be either a mold or mark feature. 6. Reference to JEDEC MS-012. TYPICAL RECOMMENDED LAND PATTERN FN6377 Rev 5.00 October 12, 2015 Page 18 of 19 ISL28158, ISL28258 Package Outline Drawing M8.118A 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP) Rev 0, 9/09 3.0±0.1 8 A 0.25 CAB 3.0±0.1 4.9±0.15 DETAIL "X" 1.10 Max PIN# 1 ID B SIDE VIEW 2 1 0.18 ± 0.05 2 0.65 BSC TOP VIEW 0.95 BSC 0.86±0.09 H GAUGE PLANE C 0.25 SEATING PLANE 0.33 +0.07/ -0.08 0.08 C A B 0.10 ± 0.05 3°±3° 0.10 C 0.55 ± 0.15 DETAIL "X" SIDE VIEW 1 5.80 NOTES: 4.40 3.00 1. Dimensions are in millimeters. 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSE Y14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. 4. Plastic interlead protrusions of 0.25mm max per side are not included. 5. Dimensions “D” and “E1” are measured at Datum Plane “H”. 6. This replaces existing drawing # MDP0043 MSOP 8L. 0.65 0.40 1.40 TYPICAL RECOMMENDED LAND PATTERN FN6377 Rev 5.00 October 12, 2015 Page 19 of 19
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