ISL32740EIBZ

DATASHEET ISL32740E FN8857 Rev.4.00 Nov 30, 2017 Isolated 40Mbps RS-485 PROFIBUS Transceiver The ISL32740E is a galvanically isolated high-speed differential bus transceiver, designed for bidirectional data communication on balanced transmission lines. The device uses Giant Magnetoresistance (GMR) as its isolation technology. Features • 40Mbps data rate • 2.5kVRMS isolation/600VRMS working voltage • 3V to 5V power supplies The part is available in a 16 Ld QSOP package offering unprecedented miniaturization, and in a 16 Ld SOICW package providing a true 8mm creepage distance. • 20ns propagation delay The ISL32740E is PROFIBUS compliant, including the rigorous PROFIBUS differential output voltage specifications. • 50kV/µs (typical), 30kV/µs (minimum) common-mode transient immunity A unique ceramic/polymer composite barrier provides excellent isolation and 44,000 years of barrier life. • Low EMC footprint The device is compatible with 3V as well as 5V input supplies, allowing an interface to standard microcontrollers without additional level shifting. Current limiting and thermal shutdown features protect against output short circuits and bus contention that may cause excessive power dissipation. Receiver inputs are a full fail-safe design, ensuring a logic high R-output if A/B are floating or shorted. Applications • Equipment covered under IEC 61010-1 Edition 3 1 2,8 • -40°C to +85°C (EIBZ) • -40°C to +125°C (EFBZ) • Meets or exceeds ANSI RS-485 and ISO 8482:1987(E) • PROFIBUS compliant • 16 Ld QSOP or 0.3” true 8mm 16 Ld SOICW packages • For a full list of related documents, visit our website • Industrial/process control networks VDD1 3 R 4 RE 5 DE 6 D GND1 • Temperature ranges available Related Literature • Building environmental control systems ISOLATION BARRIER 5V • Thermal shutdown protection • VDE V 0884-10 certified • Factory automation 3.3V • 15kV ESD protection • UL 1577 recognized • PROFIBUS-DP and RS-485 networks 100n • 5ns pulse skew • ISL32740E product page 100n 16 100n 16 542R VDD2 12 A 13 B 10 ISODE 135R VDD2 12 A 13 B 10 ISODE 120R 542R GND2 GND2 9,15 9,15 ISL32740EIBZ ISOLATION BARRIER 3.3V 5V 100n 1 VDD1 2 R 4 RE 5 D 6 E D GND1 3 14 ISL32740EIAZ 100n 1 VDD1 3 R 4 RE 5 DE 6 D GND1 2,8 ISL32740EIBZ 100n 100n 16 VDD2 10 VDD2X 15 ISORI 12 ISORO 11 A 9 B 13 ISODE GND2 ISOLATION BARRIER 5V 3.3V ISOLATION BARRIER 5V 3.3V 16 VDD2 542R 135R 542R 120R 10 VDD2X 15 ISORI 12 ISORO 11 A 9 B 13 ISODE GND2 14 100n 1 VDD1 2 R 4 RE 5 DE 6 D GND1 3 ISL32740EIAZ Figure 1. Typical PROFIBUS Application FN8857 Rev.4.00 Nov 30, 2017 Page 1 of 20 ISL32740E 1. 1. Overview Overview 1.1 Typical Operating Circuits 100n 3.3V ISOLATION 5V BARRIER 1 VDD1 100n 3.3V ISOLATION 5V BARRIER 1 16 VDD1 VDD2 100n 10 16 VDD2X VDD2 5 DE ISODE 13 5 DE 1.09k ISODE 10 1.09k A 11 6 D 100n A 12 6 D 127R 2 R 4 RE 3 R ISORO 12 ISORI 15 GND1 B 13 4 RE 1.09k GND2 3 GND1 1.09k GND2 2,8 14 ISL32740EIAZ 1.2 127R B 9 9,15 ISL32740EIBZ Figure 2. Typical Operating Circuits Ordering Information Part Number (Notes 3, 4) Temp. Range (°C) Part Marking Package (RoHS Compliant) Pkg. Dwg. # ISL32740EIBZ (Note 1) 32740EIBZ -40 to +85 16 Ld SOICW M16.3A ISL32740EFBZ (Note 1) 32740EFBZ -40 to +125 16 Ld SOICW M16.3A ISL32740EIAZ (Note 2) 32740EIAZ -40 to +85 16 Ld QSOP M16.15B ISL32740EVAL1Z Evaluation board for ISL32740EIBZ ISL32740EVAL2Z Evaluation board for ISL32740EIAZ Notes: 1. Add “-T” suffix for 1k unit or “-T7A” suffix for 250 unit tape and reel options. Refer to TB347 for details on reel specifications. 2. Add “-T” suffix for 2.5k unit or “-T7A” suffix for 250 unit tape and reel options. Refer to TB347 for details on reel specifications. 3. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. For Moisture Sensitivity Level (MSL), see the product information page for the ISL32740E. For more information on MSL, see TB363. Table 1. Key Differences Between Family of Parts Full/Half Duplex VDD1 (V) VDD2 (V) Data Rate (Mbps) Isolation Voltage (kVRMS) ISL32704E Half 3.0 – 5.5 4.5 – 5.5 4 2.5 ISL32705E Full 3.0 – 5.5 4.5 – 5.5 4 2.5 ISL32740E Half 3.0 – 5.5 4.5 – 5.5 40 2.5 ISL32741E Half 3.0 – 5.5 4.5 – 5.5 40 6 Part Number FN8857 Rev.4.00 Nov 30, 2017 Page 2 of 20 ISL32740E 1.3 1. Overview Pin Configurations ISL32740E (16 Ld QSOP) Top View ISL32740E (16 Ld SOICW) Top View VDD1 1 16 VDD2 VDD1 1 16 VDD2 GND1 2 15 GND2 R 2 15 ISORI GND1 3 14 GND2 R 3 14 NC RE 4 13 B RE 4 13 ISODE DE 5 12 A DE 5 12 ISORO D 6 11 NC NC 7 D 6 NC 7 10 VDD2X 9 GND2 NC 8 9 B GND1 8 DE ISODE D D ISODE DE B A R B A R RE 1.4 11 A 10 ISODE ISORO ISORI RE Truth Tables Transmitting Inputs Outputs RE DE D ISODE B A X 1 1 1 0 1 X 1 0 1 1 0 0 0 X 0 High-Z High-Z 1 0 X 0 High-Z* High-Z* Receiving Inputs RE DE Output A-B RO 0 0 VAB ≥ -0.05V 1 0 0 -0.05 > VAB > -0.2V Undetermined 0 0 VAB ≤ -0.2V 0 0 0 Inputs Open/Shorted 1 1 1 X High-Z 1 0 X High-Z* Note: *Transceiver shutdown mode FN8857 Rev.4.00 Nov 30, 2017 Page 3 of 20 ISL32740E 1.5 1. Overview Pin Descriptions Pin Number 16 Ld SOICW 16 Ld QSOP Pin Name 1 1 VDD1 3 2 R 2, 8 3 GND1 4 4 RE Receiver output enable. R is enabled when RE is low; R is high impedance when RE is high. If the Rx enable function is not required, connect RE directly to GND1. 5 5 DE Driver output enable. The driver outputs, A and B, are enabled by bringing DE high. They are high impedance when DE is low. If the Tx enable function is not required, connect DE to VDD1 through a 1kΩ or greater resistor. 6 6 D Driver input. A low on D forces output A low and output B high. Similarly, a high on D forces output A high and output B low. 7, 11, 14 7, 8 NC 12 11 A ±15kV IEC61000 ESD protected RS-485/RS422 level, noninverting receiver input if DE = 0 and noninverting driver output if DE = 1. 13 9 B ±15kV IEC61000 ESD protected RS-485/RS422 level, inverting receiver input if DE = 0 and inverting driver output if DE = 1. - 10 VDD2X Transceiver power supply. Connect to VDD2 (Pin 16). - 12 ISORO Isolated receiver output. This pin must be connected to Pin 15. - 15 ISORI Isolated receiver input. This pin must be connected to Pin 12. 9, 15 14 GND2 Output power supply ground return. Dual ground pins are connected internally. 10 13 ISODE Isolated DE output for use in PROFIBUS applications where the state of the isolated drive enable node needs to be monitored. 16 16 VDD2 FN8857 Rev.4.00 Nov 30, 2017 Function Input power supply. Receiver output: If A-B ≥-50mV, R is high; If A-B ≤-200mV, R is low; R = High if A and B are unconnected (floating) or shorted, or connected to a terminated bus that is not driven. Input power supply ground return. Pin 2 is internally connected to Pin 8 (for SOIC package). No internal connection. Output power supply. Page 4 of 20 ISL32740E 2. 2. Specifications Specifications 2.1 Absolute Maximum Ratings Parameter (Note 5) Minimum Maximum Unit -0.5 +7 V 7 V -0.5 VDD1 + 0.5 V -9 +13 V Supply Voltages (Note 8) VDD1 to GND1 VDD2 to GND2 Input Voltages D, DE, RE Input/Output Voltages A, B -0.5 R VDD1 + 1 Short-Circuit Duration A, B V Continuous ESD Rating V See “Electrical Specifications” table on page 7 Note: 5. Absolute Maximum specifications mean the device will not be damaged if operated under these conditions. It does not guarantee performance. CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. 2.2 Thermal Information JA (°C/W) JC (°C/W) 16 Ld SOICW Package (Notes 6, 7) 43 20 16 Ld QSOP Package (Notes 6, 7) 77 41 Thermal Resistance (Typical) Notes: 6. JA is measured in free air with the component soldered to a double-sided board. 7. For JC, the “case temp” location is the center of the package top side. Parameter Minimum Maximum Unit Maximum Junction Temperature (Plastic Package) -55 +150 °C Maximum Storage Temperature Range -55 +150 °C 800 mW Maximum Power Dissipation Pb-Free Reflow Profile 2.3 see TB493 Recommended Operation Conditions Parameter Minimum Maximum Unit VDD1 3.0 5.5 V VDD2 4.5 5.5 V VDD1 = 3.3V 2.4 VDD1 V VDD1 = 5.0V 3.0 VDD1 V 0 0.8 V Supply Voltages High-Level Digital Input Voltage, VIH Low-Level Digital Input Voltage, VIL FN8857 Rev.4.00 Nov 30, 2017 Page 5 of 20 ISL32740E 2. Specifications Parameter Minimum Maximum Unit Differential Input Voltage (Note 9), VID -7 12 V High-Level Output Current (Driver), IOH 60 mA High-Level Digital Output Current (Receiver), IOH 8 mA Low-Level Output Current (Driver), IOL -60 mA Low-Level Digital Output Current (Receiver), IOL -8 mA -40 +110 °C ISL32740EIBZ, ISL32740EIAZ -40 +85 °C ISL32740EFBZ -40 +125 Junction Temperature, TJ Ambient Operating Temperature, TA Digital Input Signal Rise and Fall Times, tIR, tIF 2.4 DC Stable Electrical Specifications Test conditions: Tmin to Tmax, VDD1 = VDD2 = 4.5V to 5.5V; unless otherwise stated. (Note 8) Parameter Symbol Test Conditions Min Typ (Note 12) Max Unit - - VDD2 V DC Characteristics Driver Line Output Voltage (VA, VB) (Note 8) VO No load Driver Differential Output Voltage (Note 9) VOD1 No load - - VDD2 V Driver Differential Output Voltage (Note 9) VOD2 RL = 54Ω 2.1 2.8 VDD2 V Driver Differential Output Voltage (Notes 9, 13) VOD3 RL = 60Ω 1.9 2.7 - V Change in Magnitude of Differential Output Voltage (Note 14) VOD RL = 54Ω or 100Ω - 0.01 0.20 V VOC RL = 54Ω or 100Ω - - 3 V VOC RL = 54Ω or 100Ω - 0.01 0.20 V - 220 µA Driver Common-Mode Output Voltage Change in Magnitude of Driver Common-Mode Output Voltage (Note 14) Bus Input Current (A, B) (Notes 11, 15) IIN2 DE = 0V VIN = 12V VIN = -7V -160 µA High-Level Input Current (DI, DE, RE) IIH VI = 3.5V - - 10 µA Low-Level Input Current (DI, DE, RE) IIL VI = 0.4V -10 - - µA Absolute Short-Circuit Output Current IOS DE = VDD1, -7V ≤ VA or VB ≤ 12V - - ±250 mA Supply Current IDD1 VDD1 = 5V - 4 6 mA VDD1 = 3.3V - 3 4 mA VTH+ -7V ≤ VCM ≤ 12V - - -50 mV Negative-Going Input Threshold Voltage VTH- -7V ≤ VCM ≤ 12V -200 - - mV Receiver Input Hysteresis VHYS VCM = 0V - 28 - mV - 9 12 pF VCC - 0.2 - - V Positive-Going Input Threshold Voltage Differential Bus Input Capacitance CD Receiver Output High Voltage VOH IO = -20µA, VID = -50mV Receiver Output Low Voltage VOL IO = +20µA, VID = -200mV - - 0.2 V High impedance Output Current IOZ 0.4V ≤ VO ≤ (VDD2 - 0.5) -1 - 1 µA Receiver Input Resistance RIN -7V ≤ VCM ≤ 12V 54 80 - kΩ Supply Current IDD2 DE = VDD1, no load - 5 16 mA FN8857 Rev.4.00 Nov 30, 2017 Page 6 of 20 ISL32740E 2. Specifications Test conditions: Tmin to Tmax, VDD1 = VDD2 = 4.5V to 5.5V; unless otherwise stated. (Note 8) (Continued) Parameter Test Conditions Min Typ (Note 12) Max Unit IEC61000-4-2, air-gap discharge to GND2 - ±15 - kV IEC61000-4-2, contact discharge to GND2 - ±8 - kV Human Body Model discharge (HBM) to GND2 - ±16.5 - kV Human Body Model discharge (HBM) to GND1 - ±2 - kV 40 - - Mbps Symbol ESD Performance RS-485 Bus Pins (A, B) All Pins (R, RE, D, DE) Switching Characteristics VDD1 = 5V, VDD2 = 5V Data Rate DR RL = 54Ω, CL = 50pF Propagation Delay (Notes 9, 16) tPD VO = -1.5V to 1.5V, CL = 15pF - 20 30 ns tSK (P) VO = -1.5V to 1.5V, CL = 15pF - 1 5 ns Pulse Skew (Notes 9, 17) tSK (LIM) RL = 54Ω, CL = 50pF - 2 10 ns tPZH CL = 15pF - 15 30 ns Output Enable Time to Low Level tPZL CL = 15pF - 15 30 ns Output Disable Time from High Level tPHZ CL = 15pF - 15 30 ns Skew Limit (Note 10) Output Enable Time to High Level Output Disable Time from Low Level tPLZ CL = 15pF - 15 30 ns Common-Mode Transient Immunity CMTI VCM = 1500 VDC, tTRANSIENT = 25ns 30 50 - kV/µs RL = 54Ω, CL = 50pF 40 - - Mbps VDD1 = 3.3V, VDD2 = 5V Data Rate Propagation Delay (Notes 9, 3) DR tPD VO = -1.5V to 1.5V, CL = 15pF - 25 35 ns tSK (P) VO = -1.5V to 1.5V, CL = 15pF - 2 5 ns tSK (LIM) RL = 54Ω, CL = 50pF - 4 10 ns tPZH CL = 15pF - 17 30 ns Output Enable Time to Low Level tPZL CL = 15pF - 17 30 ns Output Disable Time from High Level tPHZ CL = 15pF - 17 30 ns Output Disable Time from Low Level tPLZ CL = 15pF - 17 30 ns Common-Mode Transient Immunity CMTI VCM = 1500 VDC, tTRANSIENT = 25ns 30 50 - kV/µs Pulse Skew (Notes 9, 4) Skew Limit (Note 10) Output Enable Time to High Level Notes: (apply to both driver and receiver sections) 8. All voltages on the isolator primary side are with respect to GND1. All line voltages and common-mode voltages on the isolator secondary or bus side are with respect to GND2. 9. Differential I/O voltage is measured at the noninverting bus Terminal A with respect to the inverting Terminal B. 10. Skew limit is the maximum propagation delay difference between any two devices at +25°C. 11. The power-off measurement in ANSI Standard EIA/TIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs. 12. All typical values are at VDD1, VDD2 = 5V or VDD1 = 3.3V and TA = +25°C. 13. -7V < VCM < 12V; 4.5 < VDD < 5.5V. 14. VOD and VOC are the changes in magnitude of VOD and VOD respectively, that occur when the input is changed from one logic state to the other. 15. This applies for both power-on and power-off; refer to ANSI standard RS-485 for the exact condition. The EIA/TIA-422 -B limit does not apply for a combined driver and receiver terminal. 16. Includes 10ns read enable time. Maximum propagation delay is 25ns after read assertion. 17. Pulse skew is defined as |tPLH - tPHL| of each channel. FN8857 Rev.4.00 Nov 30, 2017 Page 7 of 20 ISL32740E 2.5 2. Specifications Insulation Specifications Parameter Symbol Creepage Distance (external) Test Conditions Per IEC 60601 Min Typ Max Unit SOICW 8.03 8.3 - mm QSOP 3.2 - - mm - 13 - µm Total Barrier Thickness (internal) Barrier Resistance RIO 500V - >1014 - Ω Barrier Capacitance CIO f = 1MHz - 7 - pF 240VRMS, 60Hz - 0.2 - µARMS Leakage Current Comparative Tracking Index CTI Per IEC 60112 ≥600 - - VRMS High Voltage Endurance (Maximum Barrier Voltage for Indefinite Life) VIO At maximum operating temperature 1000 - - VRMS 1500 - - VDC - 44000 - Years Min Typ Max Unit Barrier Life 2.6 100°C, 1000VRMS, 60% CL activation energy Magnetic Field Immunity Parameter (Note 18) Symbol Test Conditions VDD1 = 5V, VDD2 = 5V Power Frequency Magnetic Immunity HPF 50Hz/60Hz - 3500 - A/m Pulse Magnetic Field Immunity HPM tP = 8µs - 4500 - A/m 0.1Hz to 1MHz - 4500 - A/m - 2.5 - A/m Damped Oscillatory Magnetic Field Cross-Axis Immunity Multiplier (Note 19) HOSC KX VDD1 = 3.3V, VDD2 = 5V Power Frequency Magnetic Immunity HPF 50Hz/60Hz - 1500 - A/m Pulse Magnetic Field Immunity HPM tP = 8µs - 2000 - A/m 0.1Hz to1MHz - 2000 - A/m - 2.5 - A/m Damped Oscillatory Magnetic Field Cross-Axis Immunity Multiplier (Note 19) HOSC KX Notes: 18. The relevant test and measurement methods are given in the “Electromagnetic Compatibility” on page 10. 19. External magnetic field immunity is improved by this factor if the field direction is “end-to-end” rather than “pin-to-pin” see (“Electromagnetic Compatibility” on page 10). FN8857 Rev.4.00 Nov 30, 2017 Page 8 of 20 ISL32740E 3. 3. Safety and Approvals Safety and Approvals 3.1 VDE V 0884-10 Basic Isolation; VDE File Number 5016933-4880-0001/229067 • Working voltage (VIORM) 600VRMS (848VPK); Basic insulation, Pollution degree 2 • Transient overvoltage (VIOTM) 4000VPK • Each part tested at 1590VPK for 1s, 5pC partial discharge limit • Samples tested at 4000VPK for 60s, then 1358VPK for 10s with 5pC partial discharge limit Symbol 3.2 Value Unit TS Safety Rating Ambient Temperature Safety-limiting Values 180 °C PS Safety Rating Power (+180°C) 270 mW IS Supply Current Safety Rating (total of supplies) 54 mA UL 1577 Component Recognition Program File Number: E483309 • Working voltage (VIORM) 600VRMS (848VPK); basic insulation, pollution degree 2 • Transient overvoltage (VIOTM) 4000VPK • Each part tested at 3000VRMS (4243VPK) for 1s • Each lot of samples tested at 2500VRMS (3536VPK) for 60s FN8857 Rev.4.00 Nov 30, 2017 Page 9 of 20 ISL32740E 4. 4. Electromagnetic Compatibility Electromagnetic Compatibility The ISL32740E is fully compliant with generic EMC standards EN50081, EN50082-1, and the umbrella line-voltage standard for Information Technology Equipment (ITE) EN61000. The isolator’s Wheatstone bridge configuration and differential magnetic field signaling ensure excellent EMC performance against all relevant standards. Compliance tests have been conducted in the following categories: Table 2. Compliance Test Categories EN50081-1 Residential, Commercial, and Light Industrial: Methods EN55022, EN55014 EN50082-2 Industrial Environment EN61000-4-2 (ESD) EN61000-4-3 (Electromagnetic Field Immunity) EN61000-4-4 (EFT) EN61000-4-6 (RFI Immunity) EN61000-4-8 (Power Frequency Magnetic Field immunity) EN61000-4-9 (Pulsed Magnetic Field) EN61000-4-10 (Damped Oscillatory Magnetic Field) EN50204 Radiated field from digital telephones Immunity to external magnetic fields is even higher if the field direction is “end-to-end” rather than “pin-to-pin” as shown on the right. FN8857 Rev.4.00 Nov 30, 2017 Page 10 of 20 ISL32740E 5. 5. Application Information Application Information The ISL32740E is an isolated PROFIBUS transceiver specifically designed for PROFIBUS-DP applications. 5.1 PROFIBUS This transceiver uses a differential input receiver for maximum noise immunity and common-mode rejection. PROFIBUS (Process Field Bus) is specified in IEC61158 as a standard for field bus communication in automation technology. Two versions of PROFIBUS exist: PROFIBUS - PA for Process Automation and PROFIBUS-DP for Decentralized Peripherals. The most commonly used version, PROFIBUS-DP, is a protocol for deterministic communication between PROFIBUS masters and their remote I/O slaves. While the physical layer of PROFIBUS-DP is based on RS-485 with its differential signaling scheme, significant differences between the two physical layers exist with regard to cable type, bus termination, and minimum bus voltage, to name just a few parameters. Table 3. Main Differences Between RS-485 and PROFIBUS-DP Parameter Cable Type PROFIBUS-DP Unshielded twisted pair Shielded twisted pair Characteristic Impedance 120Ω 150Ω Minimum Driver Output Voltage 1.5V 2.1V Transceiver Input Capacitance 10 to 15pF 10pF Customer configurable (none, at single or both cable ends) Always at both cable ends Customer configurable Fixed External Fail-safe Biasing Resistor Values 5.2 RS-485 Galvanic Isolation To enable PROFIBUS transceivers operating over a wider common-mode voltage range than specified in RS-485 (7V to +12V), modern transceiver designs incorporate galvanic digital isolators with the transceiver circuitry. Here the ISL32740E uses a Giant Magnetoresistance (GMR) isolation. Figure 3 shows the principle operation of a single channel GMR isolator. EXTERNAL B-FIELD VDD2 INTERNAL B-FIELD GMR1 GMR2 IN OUT GMR3 GMR4 GND2 Figure 3. Single Channel GMR Isolator The input signal is buffered and drives a primary coil, which creates a magnetic field that changes the resistance of the GMR resistors 1 to 4. GMR1 to GMR4 form a Wheatstone bridge in order to create a bridge output voltage that reacts only to magnetic field changes from the primary coil. Large external magnetic fields however, are treated as common-mode fields, and are therefore suppressed by the bridge configuration. The bridge output is fed into a comparator with an output signal identical in phase and shape to the input signal. FN8857 Rev.4.00 Nov 30, 2017 Page 11 of 20 ISL32740E 5.3 5. Application Information GMR Resistor in Detail Figure 4 shows a GMR resistor consisting of ferromagnetic alloy layers B1 and B2 sandwiched around an ultra thin, nonmagnetic conducting middle layer A, typically copper. The GMR structure is designed so that in the absence of a magnetic field, the magnetic moments in B1 and B2 face opposite directions, thus causing heavy electron scattering across layer A, which drastically increases its resistance for current C. When a magnetic field D is applied, the magnetic moments in B1 and B2 are aligned and electron scattering is reduced. This lowers the resistance of layer A and current C increases. HIGH RESISTANCE LOW RESISTANCE B1 C A B1 C C B2 C A B2 D APPLIED MAGNETIC FIELD Figure 4. Multilayer GMR Resistor 5.4 Low Emissions Because GMR isolators do not use complex encoding schemes, such as RF carriers or high-frequency clocks, and do not include power transfer coils or transformers, their radiated emission spectrum is practically undetectable. AMPLITUDE (dBµV/m) 60 50 FCC-B < 1GHz 3m 40 EN55022 < 1GHz 3m 30 20 LABORATORY NOISE FLOOR 10 QP-MEASUREMENTS 0 10MHz 100MHz 1GHz Figure 5. Undetectable Emissions of GMR Isolators 5.5 Low EMI Susceptibility Because GMR isolators have no pulse trains or carriers to interfere with, they also have very low EMI susceptibility. For the list of compliance tests conducted on GMR isolators refer to “Electromagnetic Compatibility” on page 10. 5.6 Receiver (Rx) Features This transceiver uses a differential input receiver for maximum noise immunity and common-mode rejection. Input sensitivity is ±200mV, as required by the RS-422 and RS-485 specifications. Receiver inputs function with common-mode voltages as great as 7V outside the power supplies (for example, +12V and -7V), making them ideal for long networks, or industrial environments, where induced voltages are a realistic concern. The receiver input resistance of 54kΩ surpasses the RS-422 specification of 4kΩ and is about five times the RS-485 “Unit Load” (UL) requirement of 12kΩ minimum. Thus, the ISL32740E is known as a “one-fifth UL” transceiver, and there can be up to 160 devices on the RS-485 bus while still complying with the RS-485 loading specification. FN8857 Rev.4.00 Nov 30, 2017 Page 12 of 20 ISL32740E 5. Application Information The receiver is a “full fail-safe” version that ensures a high-level receiver output if the receiver inputs are unconnected (floating), shorted together, or connected to a terminated bus with all the transmitters disabled (terminated/undriven). Rx outputs deliver large low state currents (typically >30mA) at VOL = 1V. Receivers easily meet the 40Mbps data rate supported by the driver, and the receiver output is tri-statable using the active low RE input. 5.7 Driver (Tx) Features The RS-485/RS-422 driver is a differential output device that delivers at least 2.1V across a 54Ω load (RS-485/PROFIBUS), and at least 2.6V across a 100Ω load (RS-422) even with VCC = 4.5V. The drivers feature low propagation delay skew to maximize bit width and to minimize EMI. Outputs of the drivers are not slew rate limited, so faster output transition times allow data rates of at least 40Mbps. Driver outputs are tri-statable through the active high DE input. 5.7.1 High VOD Improves Noise Immunity and Flexibility The ISL32740E driver design delivers larger differential output voltages (VOD) than the RS-485 standard requires, or than most RS-485 transmitters can deliver. The minimum ±2.1V VOD ensures at least ±600mV more noise immunity than networks built using standard 1.5V VOD transmitters. Another advantage of the large VOD is the ability to drive more than two bus terminations, which allows for using the ISL32740E in “star” and other multi-terminated, “nonstandard” network topologies. 5.8 Built-In Driver Overload Protection As stated previously, the RS-485 specification requires that drivers survive worst case bus contentions undamaged. These transmitters meet this requirement through driver output short-circuit current limits, and on-chip thermal shutdown circuitry. The driver output stages incorporate short-circuit current limiting circuitry, which ensures that the output current never exceeds the RS-485 specification, even at the common-mode voltage range extremes. In the event of a major short-circuit condition, the device includes a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically re-enable after the die temperature drops about 15°C. If the contention persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown. 5.9 Dynamic Power Consumption The isolator within the ISL32740E achieves its low power consumption from the way it transmits data across the barrier. By detecting the edge transitions of the input logic signal and converting these to narrow current pulses, a magnetic field is created around the GMR Wheatstone bridge. Depending on the direction of the magnetic field, the bridge causes the output comparator to switch following the input signal. Because the current pulses are narrow, about 2.5ns, the power consumption is independent of the mark-to-space ratio and solely depends on frequency. Table 4. Supply Current Increase with Data Rate FN8857 Rev.4.00 Nov 30, 2017 Data Rate (Mbps) IDD1 (mA) IDD2 (mA) 1 0.15 0.15 10 1.5 1.5 20 3 3 40 6 6 Page 13 of 20 ISL32740E 5.10 5. Application Information Power Supply Decoupling Both supplies, VDD1 and VDD2, must be bypassed with 100nF ceramic capacitors. The capacitors should be placed as close as possible to the supply pins for proper operation. 5.11 DC Correctness The ISL32740E incorporates a patented refresh circuit to maintain the correct output state with respect to data input. At power-up, the bus outputs follow the truth tables on page 3. The DE input should be held low during power-up to prevent false drive data pulses on the bus. 5.12 Data Rate, Cables, and Terminations Twisted pair is the cable of choice for RS-485, RS-422, and PROFIBUS networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common-mode signals, which are effectively rejected by the differential receivers in these ICs. According to guidelines in the RS-422 and PROFIBUS specifications, networks operating at data rates in excess of 3Mbps should be limited to cable lengths of 100m (328 ft) or less and the PROFIBUS specification recommends that the more expensive “Type A” (22AWG) cable be used. The ISL32740E’s large differential output swing, fast transition times, and high drive-current output stages allow operation even at 40Mbps over standard Cat 5 cables in excess of 100m (328 ft). The ISL324740E can also be used at slower data rates over longer cables, but there are some limitations. The Rx is optimized for high-speed operation, so its output may glitch if the Rx input differential transition times are too slow. Keeping the transition times below 500ns, (which equates to the Tx driving a 1000ft (305m) Cat 5 cable) yields excellent performance across the full operating temperature range. To minimize reflections, proper termination is imperative when using this high data rate transceiver. In point-topoint, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically 100Ω for Cat 5, 120Ω for RS-485, and 150Ω for Type A) at the end farthest from the driver. In multireceiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multidriver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting transceivers to the main cable should be kept as short as possible. PROFIBUS specifies line termination with fail-safe biasing networks of fixed resistor values at both cable ends. VS VS RB 390R 390R RB RT 220R 220R RT 390R RB RB 390R Figure 6. Line Termination for PROFIBUS-DP For isolated data links meeting the requirements of EIA-485, the resistor values for the fail-safe biasing network can be calculated using (EQ. 1) through (EQ. 4). For data links longer than 100m (330ft) apply fail-safe biasing at both cable ends to compensate for the attenuation of the bus fail-safe voltage caused by the voltage divider action of the cable’s DC resistance and the remote failsafe biasing network. Use (EQ. 1) to calculate the bias resistors, RB, and (EQ. 2) to determine the termination resistors, RT. (EQ. 1) FN8857 Rev.4.00 Nov 30, 2017 VS Z0 R B  -----------  -----V AB 2 Page 14 of 20 ISL32740E (EQ. 2) 5. Application Information 2R B  Z 0 R T = -----------------------2R B – Z 0 where: • RB is the value of the biasing resistors • RT is the value of the termination resistors • VS is the minimum transceiver supply voltage • VAB is the minimum bus voltage during bus idling • Z0 is the characteristic cable impedance of 120Ω VS1 VS2 RB 1.09k 1.09k RB RT 127R 127R RT RB 1.09k 1.09k RB GND1 GND2 Figure 7. Dual Fail-Safe Biasing for Long Data Links For data links shorter than 100m, use a single fail-safe biasing network. Match the termination resistor value at the cable end without fail-safe biasing with the characteristic cable impedance: RT1 = Z0. Then calculate RB using (EQ. 3) and RT2 using (EQ. 4). (EQ. 3) VS Z0 R B  -----------  -----V AB 4 (EQ. 4) 2R B  Z 0 R T2 = -----------------------2R B – Z 0 VS RB 542R RT2 135R RB 542R 120R RT1 Figure 8. Single Fail-Safe Biasing for Short Data Links Note that the resistor values in Figures 7 and 8 have been calculated for VS = 4.5V, VAB = 0.25V, and Z0 = 120Ω. FN8857 Rev.4.00 Nov 30, 2017 Page 15 of 20 ISL32740E 5.13 5. Application Information Transient Protection Protecting the ISL32740E against transients exceeding the device’s transient immunity requires the addition of an external TVS. For this purpose, Semtech’s RClamp0512TQ was chosen due to its high transient protection levels, low junction capacitance, and small form factor. Table 5. RCLAMP0512 TVS Features Parameter Symbol Value Unit Air VESD ±30 kV Contact VESD ±30 kV VEFT ±4 kV Surge (IEC61000-4-5) VSURGE ±1.3 kV Junction Capacitance CJ 3 pF - 1 x 0.6 mm ESD (IEC61000-4-2) EFT (IEC61000-4-4) Form Factor The TVS is implemented between the bus lines and isolated ground (GND2). Because transient voltages on the bus lines are referenced to Earth potential, also known as Protective Earth (PE), a high-voltage capacitor (CHV) is inserted between GND2 and PE, providing a low-impedance path for highfrequency transients. Note that the connection from the PE point on the isolated side to the PE point on the non-isolated side (Earth) is usually made using the metal chassis of the equipment, or through a short, thick wire of low-inductance. A high-voltage resistor (RHV) is added in parallel to CHV to prevent the build-up of static charges on floating grounds (GND2) and cable shields (typically used in PROFIBUS). The bill of materials for the circuit in Figure 9 is listed in Table 6 on page 16. VS-ISO VS A MCU/ UART ISL32740E A B B Shield TVS GND PE CHV RHV PE Non-isolated Ground Isolated Ground, Floating RS-485 Common Protective Earth Ground, Equipment Safety Ground Figure 9. Transient Protection for ISL32740E Table 6. BOM for Circuit in Figure 9 Name Function Order No. Vendor TVS 170W (8, 20µs) 2-LINE PROTECTOR RCLAMP0512TQ CHV 4.7nF, 2kV, 10% CAPACITOR 1812B472K202NT NOVACAP RHV 1MΩ, 2kV, 5% RESISTOR HVC12061M0JT3 TT-ELECTRONICS FN8857 Rev.4.00 Nov 30, 2017 SEMTECH Page 16 of 20 ISL32740E 6. 6. Revision History Revision History Rev. Date 4.00 Nov 30, 2017 3.00 Oct 2, 2017 2.00 Aug 24, 2017 1.00 Jul 6, 2017 0.00 Feb 28, 2017 FN8857 Rev.4.00 Nov 30, 2017 Description Updated certification file number for VDE. Updated thermal resistance values for the QSOP package. Changed JA from “92” to “77” and JC from “37” to “41”. Updated Table 1 on page 2. Updated receiving truth table. Applied new formatting standards. Updated Title. Added ISL32740EIAZ and ISL32740EFBZ information throughout document. Updated Note 1. Updated Pin descriptions for Pins A, B, GND2, ISODE, and VDD2. Updated thermal resistance for the SOICW package. Changed JA from “60” to “43” and JC from “12” to “20”. Updated Total Barrier Thickness (internal) spec removed minimum and changed typical from “16” to “13”. Updated “Magnetic Field Immunity” on page 8, removed all MIN values. Updated POD M16.3A to the latest revision. Changes are as follows: -Revised the land pattern. Initial release Page 17 of 20 ISL32740E 7. 7. Package Outline Drawings For the most recent package outline drawing, see M16.3A. Package Outline Drawings M16.3A 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE (SOICW) Rev 1, 6/17 10.08 10.49 1 3 0.3 0.5 16 10.00 10.64 2 7.42 7.59 SEE DETAIL "X" 9 PIN #1 I.D. MARK 3 1 0.18 0.25 6.60 7.11 0.85 1.10 8 1.24 1.30 0.2 0.3 TOP VIEW END VIEW 0.05 H 2.34 2.67 C 2.0 2.5 SEATING PLANE 0.1 0.3 0.10 C GAUGE PLANE 0.25 0.3 5 0.5 0.1 M C B A 0.1 MIN 0.3 MAX SIDE VIEW 0.40 1.30 0° TO 8° DETAIL X (1.7) NOTES: 20. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. 21. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25 per side. (9.75) 22. Dimensions are measured at datum plane H. 23. Dimensioning and tolerancing per ASME Y14.5M-1994. 24. Dimension does not include dambar protrusion. 25. Dimension in ( ) are for reference only. 26. Pin spacing is a BASIC dimension; tolerances do not accumulate. 27. Dimensions are in mm. (1.27) (0.51) TYPICAL RECOMMENDED LAND PATTERN FN8857 Rev.4.00 Nov 30, 2017 Page 18 of 20 ISL32740E 7. Package Outline Drawings For the most recent package outline drawing, see M16.15B. M16.15B 16 LEAD QUARTER-SIZE SMALL OUTLINE PLASTIC PACKAGE (QSOP) Rev 0, 9/16 1 A 3 4.77 5.00 16 5.8 6.2 2 3.8 4.0 9 3 SEE DETAIL "X" PIN #1 I.D. MARK 45° NOM 1 8 0.635 0.20 0.25 B TOP VIEW END VIEW 0.05 H 1.00 REF 1.52 1.75 C SEATING PLANE 1.27 1.42 0.10 0.25 0.2 0.3 0.10 C 0.10 MIN 0.25 MAX 5 0.10 M C B A SIDE VIEW GAUGE PLANE 0.50 0.75 0.25 0° TO 8° DETAIL X (0.38) (1.53) NOTES: 1. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. 2. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25 per side. (5.30) 3. Dimensions are measured at datum plane H. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Dimension does not include dambar protrusion. 6. Dimension in ( ) are for reference only. 7. Pin spacing is a BASIC dimension; tolerances do not accumulate. (0.635) 8. Dimensions are in mm. TYPICAL RECOMMENDED LAND PATTERN FN8857 Rev.4.00 Nov 30, 2017 Page 19 of 20 ISL32740E 8. 8. About Intersil About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. For a listing of definitions and abbreviations of common terms used in our documents, visit: www.intersil.com/glossary. You can report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support. © Copyright Intersil Americas LLC 2017. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8857 Rev.4.00 Nov 30, 2017 Page 20 of 20