DATASHEET
ISL6596
FN9240
Rev.3.00
May 30, 2018
Synchronous Rectified MOSFET Driver
The ISL6596 is a high frequency, MOSFET driver optimized to
drive two N-Channel power MOSFETs in a synchronous buck
converter topology. Combine this driver with the Renesas
Multi-Phase Buck PWM controllers to form a complete
single-stage core-voltage regulator solution with high
efficiency performance at high switching frequency for
advanced microprocessors.
Features
The IC is biased by a single low voltage supply (5V), minimizing
driver switching losses in high MOSFET gate capacitance and
high switching frequency applications. Each driver can drive a
3nF load with less than 10ns rise/fall time. Bootstrapping of
the upper gate driver is implemented with an internal low
forward drop diode, reducing implementation cost, complexity,
and allowing the use of higher performance, cost effective
N-Channel MOSFETs. Adaptive shoot-through protection is
integrated to prevent both MOSFETs from conducting
simultaneously.
• Fast output rise and fall time
The ISL6596 features 4A typical sink current for the lower gate
driver, enhancing the lower MOSFET gate hold-down capability
during the PHASE node rising edge and preventing power loss
caused by the self turn-on of the lower MOSFET due to the high
dV/dt of the switching node.
• Drives two N-Channel MOSFETs
• Adaptive shoot-through protection
• 0.4Ω on-resistance and 4A sink current capability
• Supports high switching frequency
• Low tri-state hold-off time (20ns)
• Supports 3.3V and 5V PWM inputs
• Low quiescent supply current
• Power-On reset
• Expandable bottom copper pad for heat spreading
• Dual Flat No-Lead (DFN) package
- Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat No
Leads - product outline
- Near chip-scale package footprint improves PCB
efficiency and is thinner in profile
• Pb-Free (RoHS compliant)
The ISL6596 also features an input that recognizes a
high-impedance state, working with Renesas multi-phase 3.3V
or 5V PWM controllers to prevent negative transients on the
controlled output voltage when operation is suspended. This
feature eliminates the need for the Schottky diode that may be
used in a power system to protect the load from negative
output voltage damage.
Applications
• Core voltage supplies for Intel® and AMD® microprocessors
• High frequency low profile high efficiency DC/DC converters
• High current low voltage DC/DC converters
• Synchronous rectification for isolated power supplies
Related Literature
For a full list of related documents, visit our website
• ISL6596 product page
FN9240 Rev.3.00
May 30, 2018
Page 1 of 13
ISL6596
Typical Application
VIN
+5V
+3.3V
+3.3V
FB
VCTRL
VCC
VSEN
RUGPH
UGATE
PWM
PWM1
ISL6596
PWM2
PGOOD
BOOT
VCC
COMP
PHASE
LGATE
PWM
CONTROLLER
(ISL69XX)
ISEN1
VID
(OPTIONAL)
+VCORE
+5V
ISEN2
VIN
BOOT
VCC
FS/EN
VCTRL
GND
UGATE
RUGPH
PWM
ISL6596
PHASE
LGATE
RUGPH IS REQUIRED FOR SPECIAL POWER SEQUENCING APPLICATIONS
FIGURE 1. MULTI-PHASE CONVERTER USING ISL6596 GATE DRIVERS (SEE “APPLICATION INFORMATION” ON PAGE 9)
Block Diagram
VCC
BOOT
VCTRL
UGATE
7k
CONTROL
LOGIC
PWM
PHASE
SHOOTTHROUGH
PROTECTION
7k
VCC
LGATE
GND
VCTRL = CONTROLLER VCC
FN9240 Rev.3.00
May 30, 2018
FIGURE 2. BLOCK DIAGRAM
Page 2 of 13
ISL6596
Ordering Information
PART NUMBER
(Notes 2, 3)
TEMP RANGE
(°C)
TAPE AND REEL
(UNITS) (Note 1)
6596 CBZ
ISL6596CBZ
(No longer available, recommended
replacement: ISL6596CRZ)
0 to +70
-
8 Ld SOIC
M8.15
ISL6596CRZ
596Z
0 to +70
-
10 Ld 3x3 DFN
L10.3x3C
ISL6596CRZ-T
596Z
0 to +70
6k
10 Ld 3x3 DFN
L10.3x3C
ISL6596IBZ (No longer available,
recommended replacement:
ISL6596IRZ)
6596 IBZ
-40 to +85
-
8 Ld SOIC
M8.15
ISL6596IRZ
96IZ
-40 to +85
-
10 Ld 3x3 DFN
L10.3x3C
ISL6596IRZ-T
96IZ
-40 to +85
6k
10 Ld 3x3 DFN
L10.3x3C
PART MARKING
PACKAGE
(RoHS COMPLIANT)
PKG. DWG. #
1. Refer to TB347 for details about reel specifications.
2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate
plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), refer to the ISL6596 product information page. For more information about MSL, see TB363.
Pinouts
8 LD SOIC
TOP VIEW
UGATE
1
BOOT
2
PWM
3
GND 4
ER
NG
O
L
NO
LA
AI
AV
E
BL
OR
10 LD DFN
TOP VIEW
SU
ED
RT
8POPHASE
P
7
VCTRL
6
VCC
5
LGATE
UGATE
1
10 PHASE
BOOT
2
9
VCTRL
N/C
3
8
N/C
PWM
4
7
VCC
GND
5
6
LGATE
Functional Pin Descriptions
PIN NUMBER (Note 4)
PIN NAME
DESCRIPTION
1
UGATE
Upper gate drive output. Connect to the gate of the high-side N-Channel power MOSFET. A gate resistor
is never recommended on this pin because it interferes with the operation shoot-through protection
circuitry.
2
BOOT
Floating bootstrap supply pin for the upper gate drive. Connect a bootstrap capacitor between this pin
and the PHASE pin. The bootstrap capacitor provides the charge used to turn on the upper MOSFET.
See “Bootstrap Considerations” on page 7 for information about choosing the appropriate capacitor
value.
3, 8
N/C
Do not connect.
4
PWM
Driver control input. The PWM signal can enter three distinct states during operation. See “PWM Input and
Threshold Control” on page 7 for more information. Connect this pin to the controller PWM output.
5
GND
Ground pin. All signals are referenced to this node.
6
LGATE
Lower gate drive output. Connect to the gate of the low side N-Channel power MOSFET. A gate resistor
is never recommended on this pin because it interferes with the operation shoot-through protection
circuitry.
7
VCC
Connect this pin to a +5V bias supply. Bypass locally to ground with a high quality ceramic capacitor.
FN9240 Rev.3.00
May 30, 2018
Page 3 of 13
ISL6596
Functional Pin Descriptions
PIN NUMBER (Note 4)
PIN NAME
DESCRIPTION
9
VCTRL
Sets the PWM logic threshold. Connect this pin to a 3.3V source for 3.3V PWM input and pull it to a 5V
source for 5V PWM input.
10
PHASE
Provides the return path for the upper gate driver current. Connect this pin to the upper MOSFET
source.
-
Thermal Pad (DFN
package only)
The metal pad underneath the center of the IC is a thermal substrate. The PCB “thermal land” design
for this exposed die pad should include vias that drop down and connect to one or more buried
copper plane(s). This combination of vias for vertical heat escape and buried planes for heat
spreading allows the DFN to achieve its full thermal potential. This pad should be either grounded
or floating, and it should not be connected to other nodes. Refer to TB389 for design guidelines.
NOTES:
4. Pin numbers refer to the DFN package. Refer to “Pinouts” on page 3 for the corresponding SOIC pinout.
FN9240 Rev.3.00
May 30, 2018
Page 4 of 13
ISL6596
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VCC, VCTRL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input Voltage (VEN, VPWM) . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
BOOT Voltage (VBOOT-GND) . . . . . . . . . . -0.3V to 33V (DC) or 36V (
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