DATASHEET
ISL6745A
FN6703
Rev.2.00
Aug 14, 2017
Improved Bridge Controller with Precision Dead Time Control
The ISL6745A is a low-cost, double-ended, voltage-mode
PWM controller designed for half-bridge and full-bridge
power supplies and line-regulated bus converters. It
provides precise control of switching frequency, adjustable
soft-start, and overcurrent shutdown. In addition, the
ISL6745A allows for accurate adjustment of MOSFET
non-overlap time (“dead time”) with dead times as low as
35ns, allowing power engineers to optimize the efficiency
of open-loop bus converters. The ISL6745A also includes a
control voltage input for closed-loop PWM and line voltage
feed-forward functions. The ISL6745A is identical to the
ISL6745, but is optimized for higher noise environments.
Low start-up and operating currents allow for easy biasing
in both AC/DC and DC/DC applications. This advanced
BiCMOS design also features adjustable switching
frequency up to 1MHz, 1A FET drivers, and very low
propagation delays for a fast response to overcurrent faults.
The ISL6745A is available in a space-saving 10 Ld MSOP
package and is assured to meet rated specifications across a
wide -40°C to +105°C temperature range.
Related Literature
• For a full list of related documents, visit our website
• ISL6745A product page
FN6703 Rev.2.00
Aug 14, 2017
Features
• Precision duty cycle and dead time control
• 100µA start-up current
• Adjustable delayed overcurrent shutdown and restart
• Adjustable oscillator frequency up to 2MHz
• 1A MOSFET gate drivers
• Adjustable soft-start
• Internal over-temperature protection
• 35ns control to output propagation delay
• Small size and minimal external component count
• Input undervoltage protection
• Pb-free (RoHS compliant)
Applications
• Half-bridge converters
• Full-bridge converters
• Line-regulated bus converters
• AC/DC power supplies
• Telecom, datacom, and file server power
Page 1 of 13
1.1
Overview
ISL6745A
FN6703 Rev.2.00
Aug 14, 2017
1.
Internal Architecture
V DDP
FL
VBIAS
VBIAS
5.00V
V DD
OUTA
Q
+
BG
T
UVLO
Q
OUTB
PWM Toggle
Internal
OT Shutdown
130°C - 150°C
V BIAS
70µA
GND
ON
SS
VBIAS
+
-
SS Clamp
RTD
+
2.0V
IRTD
+
4.0V
SS Charged
S
VBIAS
15µA
3.9V
Q
R Q
OC Latch
160µA
ON
2.8V
+
Peak
+
Valley
S
Q
CLK
R Q
CT
I DCH= 55 x
I RTD
0.8V
Reset
Dominant
Q
50µs
Retriggerable
One Shot
SS Low
Q
Fault Latch
Set Dominant
S Q
S Q
IDCH
PWM Latch
Set Dominant
4.65V 4.80V
0.6V
+
-
SS
FL
V BIAS
VBIAS UV
CS
0.27V
R Q
R Q
ON
+
-
+
BG
OC Detect
PWM Comparator
V BIA
S
15µA
+
-
0.8
Figure 1. Internal Architecture
SS
0.8
1. Overview
Page 2 of 13
VERR
CT
ISL6745A
FN6703 Rev.2.00
Aug 14, 2017
1.2
Typical Application - Telecom DC/DC Converter
VIN+
Q1
+ VOUT
T1
C1
CR1
+
C10
CR2
36V to 75V
(100V Max.)
RETURN
L1
T2
Q2
C2
VIN-
CR4
CR3
U2
ISL2100A
C6
1 VDD
LO 8
2 HB
VSS 7
3 HO
LI 6
4 HS
HI 5
R11
C9
R1
R6
U1
ISL6745A
1 SS
R10
U3
R7
VDD 10
2 RTD VDDP 9
C8
3 VERR OUTB 8
Q3
4 CS
OUTA 7
5 CT
GND 6
R4
C7
R8
R3
VR2
VR1
C2
R2
C3
C4
C5
U4
TL431
R9
1. Overview
Page 3 of 13
Figure 2. Typical Application
R5
ISL6745A
1.3
1. Overview
Ordering Information
Part Number
(Notes 1, 2, 3)
Temp. Range
(°C)
Part Marking
ISL6745AAUZ
6745A
ISL6745ALEVAL3Z
Evaluation Board
-40 to +105
Package
(RoHS Compliant)
10 Ld MSOP
Pkg.
Dwg. #
M10.118
Notes:
1. Add “-T” suffix for 2.5k unit tape and reel option. Refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials,
and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), see the product information page for ISL6745A. For more information on MSL, refer to
TB363.
1.4
Pin Configuration
ISL6745A
(10 Ld MSOP)
Top View
SS 1
FN6703 Rev.2.00
Aug 14, 2017
10 VDD
RTD 2
9 VDDP
VERR 3
8 OUTB
CS 4
7 OUTA
CT 5
6 GND
Page 4 of 13
ISL6745A
1.5
1. Overview
Pin Descriptions
Pin
Pin
Name Number
Description
SS
1
Connect the soft-start timing capacitor between this pin and GND to control the duration of soft-start. The value of the
capacitor determines the rate of increase of the duty cycle during start-up, controls the overcurrent shutdown delay, and
the overcurrent and short-circuit hiccup restart period.
RTD
2
Oscillator timing capacitor discharge current control pin. A resistor is connected between this pin and GND. The
current flowing through the resistor determines the magnitude of the discharge current. The discharge current is
nominally 55x this current. The PWM dead time is determined by the timing capacitor discharge duration.
VERR
3
Inverting input of the PWM comparator. The error voltage is applied to this pin to control the duty cycle. Increasing
the signal level increases the duty cycle. The node may be driven with an external error amplifier or an optocoupler.
CS
4
Input to the overcurrent protection comparator. The overcurrent comparator threshold is set at 0.600V nominal. The
CS pin is shorted to GND at the end of each switching cycle. Depending on the current sensing source impedance, a
series input resistor may be required due to the delay between the internal clock and the external power switch.
Exceeding the overcurrent threshold will start a delayed shutdown sequence. When an overcurrent condition is
detected, the soft-start charge current source is disabled. The soft-start capacitor begins discharging through a 15µA
current source, and if it discharges to less than 3.9V (Sustained Overcurrent Threshold), a shutdown condition
occurs and the OUTA and OUTB outputs are forced low. When the soft-start voltage reaches 0.27V (Reset
Threshold) a soft-start cycle begins.
If the overcurrent condition ceases, and then an additional 50µs period elapses before the shutdown threshold is
reached, no shutdown occurs. The SS charging current is re-enabled and the soft-start voltage is allowed to recover.
CT
5
The oscillator timing capacitor is connected between this pin and GND.
GND
6
Reference and power ground for all functions on this device. Due to high peak currents and high frequency
operation, a low impedance layout is necessary. Ground planes and short traces are highly recommended.
OUTA
7
Alternate half cycle output stages. Each output is capable of 1A peak currents for driving power MOSFETs or
MOSFET drivers. Each output provides very low impedance to overshoot and undershoot.
OUTB
8
VDDP
9
VDDP is the separate collector supply to the gate drive. Having a separate VDDP pin helps isolate the analog
circuitry from the high power gate drive noise.
VDD
10
VDD is the power connection for the IC. To optimize noise immunity, bypass VDD to GND with a ceramic capacitor as
close to the VDD and GND pins as possible.
The total supply current, IDD, will be dependent on the load applied to outputs OUTA and OUTB. Total IDD current is
the sum of the quiescent current and the average output current. Knowing the operating frequency, fSW, and the
output loading capacitance charge, Q, per output, the average output current can be calculated from (EQ. 1):
I OUT = 2 Q f SW
FN6703 Rev.2.00
Aug 14, 2017
A
(EQ. 1)
Page 5 of 13
ISL6745A
2.
2. Specifications
Specifications
2.1
Absolute Maximum Ratings
Parameter
Minimum
Maximum
Unit
Supply Voltage, VDD
-0.3
+20.0
V
OUTA, OUTB
-0.3
VDD
V
Signal Pins
-0.3
5
V
1
A
Peak GATE Current
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may
adversely impact product reliability and result in failures not covered by warranty.
2.2
Thermal Information
JA (°C/W)
Thermal Resistance (Typical)
155
10 Ld MSOP Package (Note 4)
Notes:
4. JA is measured with the component mounted on a high-effective thermal conductivity test board in free air. Refer to TB379.
Parameter
Minimum
Maximum
Unit
Maximum Junction Temperature
-55
+150
°C
Maximum Storage Temperature Range
-65
+150
°C
Pb-Free Reflow Profile
2.3
refer to TB493
Recommended Operating
Conditions
Parameter
Temperature Range
Supply Voltage Range (Typical)
2.4
Minimum
Maximum
Unit
-40
+105
°C
9
16
V
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Figure 1 on page 2 and Figure 2 on page 3. 9V < VDD < 16V, RTD =
51.1kΩ, CT = 470pF, TA = -40°C to +105°C, typical values are at TA = +25°C.
Parameter
Test Conditions
Min
Max
(Note 5) Typ (Note 5)
Unit
Supply Voltage
Start-Up Current, IDD
VDD < START Threshold
-
-
175
µA
Operating Current, IDD
COUTA,B = 1nF
-
5
8.5
mA
UVLO START Threshold
5.9
6.3
6.6
V
UVLO STOP Threshold
5.3
5.7
6.3
V
-
0.6
-
V
0.55
0.6
0.65
V
CS to OUT Delay
-
35
-
ns
CS Sink Current
8
10
-
mA
Hysteresis
Current Sense
Current Limit Threshold
FN6703 Rev.2.00
Aug 14, 2017
Page 6 of 13
ISL6745A
2. Specifications
Recommended operating conditions unless otherwise noted. Refer to Figure 1 on page 2 and Figure 2 on page 3. 9V < VDD < 16V, RTD =
51.1kΩ, CT = 470pF, TA = -40°C to +105°C, typical values are at TA = +25°C. (Continued)
Parameter
Test Conditions
Input Bias Current
Min
Max
(Note 5) Typ (Note 5)
Unit
-1
-
1
µA
Pulse Width Modulator
Minimum Duty Cycle
VERROR < CT Offset
-
-
0
%
Maximum Duty Cycle
CT = 470pF, RTD = 51.1kΩ
-
94
-
%
CT = 470pF, RTD = 1.1kΩ
-
99
-
%
VERR to PWM Comparator Input Gain
-
0.8
-
V/V
CT to PWM Comparator Input Gain
-
1
-
V/V
SS to PWM Comparator Input Gain
-
0.8
-
V/V
143
156
170
µA
1.925
2
2.075
V
45
-
65
µA/µA
CT Valley Voltage
0.75
0.8
0.85
V
CT Peak Voltage
2.70
2.80
2.90
V
Net Charging Current
45
-
68
µA
SS Clamp Voltage
3.8
4.0
4.2
V
-
3.9
-
V
12
15
23
µA
0.25
0.27
0.31
V
Oscillator
Charge Current
TA = +25°C
RTD Voltage
Discharge Current Gain
Soft-Start
Overcurrent Shutdown Threshold Voltage
Overcurrent Discharge Current
Reset Threshold Voltage
Output
High-Level Output Voltage (VOH)
VDD - VOUTA or VOUTB, IOUT = -100mA
-
0.5
2.0
V
Low-Level Output Voltage (VOL)
IOUT = 100mA
-
0.5
1.0
V
Rise Time
CGATE = 1nF, VDD = 12V
-
17
60
ns
Fall Time
CGATE = 1nF, VDD = 12V
-
20
60
ns
Thermal Shutdown
-
145
-
°C
Thermal Shutdown Clear
-
130
-
°C
Hysteresis, Internal Protection
-
15
-
°C
Thermal Protection
Notes:
5. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
6. All voltages are to be measured with respect to GND, unless otherwise specified.
FN6703 Rev.2.00
Aug 14, 2017
Page 7 of 13
ISL6745A
3.
3. Typical Performance Curves
Typical Performance Curves
1-104
60
CT = 1000pF
Dead Time (ns)
CT Discharge Current Gain
65
55
50
CT = 680pF
CT = 470pF
1-103
CT = 270pF
CT = 100pF
100
45
40
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.10
10
RTD Current (mA)
10
Figure 3. Oscillator CT Discharge Current Gain
40
50
60
RTD (kΩ)
70
80
90
100
1.03
1.02
Normalized Charging Current
500
Oscillator Frequency (kHz)
30
Figure 4. Dead Time vs Capacitance
600
400
300
200
100
0
100
20
1.01
1.00
0.99
0.98
0.97
0.96
200
300
400
500
600
CT (pF)
700
800
900
0.95
-40
1k
-25
-10
5
20
35
50
65
80
95
110
Temperature (°C)
Figure 5. Capacitance vs Oscillator Frequency
(RTD = 49.9kΩ)
Figure 6. Charge Current vs Temperature
1.07
1.06
Normalized Voltage
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0
10
20
30
40
50
60
70
80
90
100
RTD (kΩ)
Figure 7. Timing Capacitor Voltage vs RTD
FN6703 Rev.2.00
Aug 14, 2017
Page 8 of 13
ISL6745A
4.
4. Functional Description
Functional Description
4.1
4.2
Features
The ISL6745A PWM is an excellent choice for low cost
bridge topologies for applications requiring accurate
frequency and dead time control. Among its many
features are 1A FET drivers, adjustable soft-start,
overcurrent protection, and internal thermal protection,
allowing a highly flexible design with minimal external
components.
4
T C 1.25 10 C T
s
1
T OSC = T C + T D = ---------------F OSC
s
s
where TC and TD are the approximate charge and
discharge times, respectively, TOSC is the oscillator free
running period, and FOSC is the oscillator frequency.
One output switching cycle requires two oscillator
cycles. The actual times will be slightly longer than
calculated due to internal propagation delays of
approximately 5ns/transition. This delay adds directly to
the switching duration, and also causes overshoot of the
timing capacitor peak and valley voltage thresholds,
effectively increasing the peak-to-peak voltage on the
The switching period may be considered to be the sum
of the timing capacitor charge and discharge durations.
The charge duration is determined by CT and the
internal current source (assumed to be 160µA in the
formula). The discharge duration is determined by RTD
and CT.
(EQ. 3)
(EQ. 4)
timing capacitor. Additionally, if very low charge and
discharge currents are used, there will be an increased
error due to the input impedance at the CT pin.
The above formulae help with the estimation of the
frequency. Practically, effects like stray capacitances that
affect the overall CT capacitance, variation in RTD
voltage and charge current over-temperature, etc. exist,
and are best evaluated in-circuit. (EQ. 2) follows from
the basic capacitor current equation.
dV
dt
In this case, with variation in dV with RTD (Figure 7 on
page 8), and in charge current (Figure 6 on page 8),
results from (EQ. 2) would differ from the calculated
frequency. The typical performance curves may be used
as a tool along with the previous equations as a more
D = T C T OSC
DT = 1 – D T OSC
FN6703 Rev.2.00
Aug 14, 2017
The ISL6745A has an oscillator with a frequency range
to 2MHz, programmable using a resistor RTD and
capacitor CT.
(EQ. 2)
1
T D ----------------------------------------------------------------------------- R TD C T
CTDisch arg eCurrentGain
i = C
Oscillator
accurate tool to estimate the operating frequency more
accurately.
The maximum duty cycle, D, and dead time, DT, can be
calculated from:
(EQ. 5)
s
(EQ. 6)
Page 9 of 13
ISL6745A
4.3
4. Functional Description
Soft-Start Operation
The ISL6745A features a soft-start using an external
capacitor in conjunction with an internal current source.
Soft-start reduces stresses and surge currents during
start-up.
4.7
Ground Plane Requirements
Careful layout is essential for satisfactory operation of
the device. A good ground plane must be employed.
VDD should be bypassed directly to GND with good
high-frequency capacitance.
The oscillator capacitor signal, CT, is compared to the
soft-start voltage, SS, in the SS comparator which drives
the PWM latch. While the SS voltage is less than 3.5V,
duty cycle is limited. The output pulse width increases
as the soft-start capacitor voltage increases up to 3.5V.
This has the effect of increasing the duty cycle from zero
to the maximum pulse width during the soft-start period.
When the soft-start voltage exceeds 3.5V, soft-start is
completed. Soft-start occurs during start-up and after
recovery from an overcurrent shutdown. The soft-start
voltage is clamped to 4V.
Please note the capacitance of the soft-start capacitor,
CSS. If CSS ≥ 0.1µF, the user will need to add a resistor
in series with the capacitor, 100Ω/µF (100Ω at least; 1k
at most).
4.4
Gate Drive
The ISL6745A is capable of sourcing and sinking 1A
peak current, and may also be used in conjunction with a
MOSFET driver such as the ISL6700 for level shifting.
To limit the peak current through the IC, an external
resistor may be placed between the totem-pole output of
the IC (OUTA or OUTB pin) and the gate of the
MOSFET. This small series resistor also damps any
oscillations caused by the resonant tank of the parasitic
inductances in the traces of the board and the FET’s
input capacitance.
4.5
Overcurrent Operation
Overcurrent delayed shutdown is enabled once the softstart cycle is complete. If an overcurrent condition is
detected, the soft-start charging current source is
disabled and the soft-start capacitor is allowed to
discharge through a 15µA source. At the same time a
50µs retriggerable one-shot timer is activated. It remains
active for 50µs after the overcurrent condition ceases. If
the soft-start capacitor discharges to 3.9V, the output is
disabled. This state continues until the soft-start voltage
reaches 270mV, at which time a new soft-start cycle is
initiated. If the overcurrent condition stops at least 50µs
prior to the soft-start voltage reaching 3.9V, the soft-start
charging currents revert to normal operation and the
soft-start voltage is allowed to recover.
4.6
Thermal Protection
An internal temperature sensor protects the device if the
junction temperature exceeds +145°C. There is
approximately +15°C of hysteresis.
FN6703 Rev.2.00
Aug 14, 2017
Page 10 of 13
ISL6745A
5.
5. Revision History
Revision History
Rev.
Date
2.00
Aug 14, 2017
FN6703 Rev.2.00
Aug 14, 2017
Description
Applied new formatting.
Added Related Literature section.
Updated Ordering information table.
Update Absolute Maximum Ratings minimum values for Supply Voltage, OUTA, OUTB, and Signal Pins.
Added Notes 3 and 6.
Removed old Note 3 on EC table along with references as Note 6 covers this statement.
Moved Pin Descriptions to table following Pin Configuration.
Updated the Soft-Start Operation section on page 10.
Added Revision History and About Intersil sections.
Updated POD M10.118 to the latest revision. The updates are as follows:
-Updated to new POD template. Added land pattern.
Page 11 of 13
ISL6745A
6.
6. Package Outline Drawing
Package Outline Drawing
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 4/12
M10.118
For the most recent package outline drawing, see M10.118.
5
3.0±0.05
A
DETAIL "X"
D
10
1.10 MAX
SIDE VIEW 2
0.09 - 0.20
4.9±0.15
3.0±0.05
5
0.95 REF
PIN# 1 ID
1
2
0.50 BSC
B
GAUGE
PLANE
TOP VIEW
0.55 ± 0.15
0.25
3°±3°
0.85±010
H
DETAIL "X"
C
SEATING PLANE
0.18 - 0.27
0.08 M C A-B D
0.10 ± 0.05
0.10 C
SIDE VIEW 1
(5.80)
NOTES:
(4.40)
(3.00)
1. Dimensions are in millimeters.
2. Dimensioning and tolerancing conform to JEDEC MO-187-BA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
(0.50)
(0.29)
(1.40)
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
TYPICAL RECOMMENDED LAND PATTERN
FN6703 Rev.2.00
Aug 14, 2017
Page 12 of 13
ISL6745A
ISL6745A
7.
7. About Intersil
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The
company's products address some of the largest markets within the industrial and infrastructure, mobile computing,
and high-end consumer markets.
For the most updated datasheet, application notes, related documentation, and related parts, see the respective product
information page found at www.intersil.com.
For a listing of definitions and abbreviations of common terms used in our documents, visit:
www.intersil.com/glossary.
You can report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support.
© Copyright Intersil Americas LLC 2008-2017. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice,
provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned
to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no
responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6703 Rev.2.00
Aug 14, 2017
Page 13 of 13
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