DATASHEET
ISL78235
FN8713
Rev 7.00
Sep 28, 2018
5A Automotive Synchronous Buck Regulator
The ISL78235 is a highly efficient, monolithic, synchronous
step-down DC/DC converter that can deliver 5A of continuous
output current from a 2.7V to 5.5V input supply. The device uses
peak current mode control architecture to achieve very low duty
cycle operation at high frequency with fast transient response and
excellent loop stability.
The ISL78235 integrates a low ON-resistance P-channel
(35mΩ, typical) high-side FET and N-channel (11mΩ, typical)
low-side FET to maximize efficiency and minimize external
component count. The 100% duty cycle operation allows less
than 250mV dropout voltage at 5A output current. The
operating frequency of the Pulse-Width Modulator (PWM) is
adjustable from 500kHz to 4MHz. The default switching
frequency of 2MHz is set by connecting the FS pin high.
The ISL78235 can be configured for discontinuous (PFM) or
forced continuous (PWM) operation at light load. Forced
continuous operation reduces noise and RF interference;
discontinuous mode provides higher efficiency by reducing
switching losses at light loads.
Fault protection is provided by internal hiccup mode current
limiting during short-circuit and overcurrent conditions. The
device also integrates output overvoltage and
over-temperature protections. A power-good monitor indicates
when the output is in regulation. The ISL78235 features a 1ms
Power-Good (PG) timer at power-up.
When in shutdown, the ISL78235 discharges the output
capacitor through an internal 100Ω soft-stop switch. Other
features include internal fixed or adjustable soft-start and
internal/external compensation.
The ISL78235 is available in a 3mmx3mm 16 Ld Thin Quad Flat
No-lead (TQFN) Pb-free package and in a 5mmx5mm 16 Ld
Wettable Flank Quad Flat No-Lead (WFQFN) package with an
exposed pad for improved thermal performance. The
ISL78235 is rated to operate across the temperature range of
-40°C to +105°C in the 3mmx3mm package and -40°C to
+125°C in the 5mmx5mm package.
VIN
15
PHASE
14
11
*ISL78235
10
SYNC 4
9
8
COMP
7
SS
6
FS
EN
5
• 100ns guaranteed phase minimum on time for wide output
regulation
• Adjustable switching frequency from 500kHz to 4MHz
• External synchronization from 1MHz to 4MHz
• Optional PFM mode for light-load efficiency improvement
• Very low ON-resistance HS/LS switches: 35mΩ/11mΩ
• Internal 1ms or adjustable external soft-start
• Soft-stop output discharge during disable
• OTP, OCP, output OVP, and input UVLO protections
• 1% reference accuracy over-temperature
• Up to 95% efficiency
• AEC-Q100 qualified
• Common pinout family allows migration from 3A to 5A
without PCB change:
- ISL78233 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3A
- ISL78234 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4A
- ISL78235 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5A
Applications
• DC/DC POL modules
• μC/µP, FPGA, and DSP power
• Video processor/SOC power
• Automotive infotainment power
Related Literature
For a full list of related documents, visit our website
- ISL78235 product page
100
5A LOAD
DSP, FPGA
90
13
12
PG 3
• 2MHz default switching frequency
COUT
1
VDD 2
VOUT
• 2.7V to 5.5V input voltage range
EFFICIENCY (%)
16
PHASE
VIN
CIN
PHASE
L
2.7V TO 5.5V
Features
PGND
PGND
SGND
2.5VOUT
80
3.3VOUT
1.8VOUT 1.5VOUT
70
1.2VOUT
60
FB
50
*Pin Compatible
ISL78233 - 3A BUCK
ISL78234 - 4A BUCK
40
TA = +25°C
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
OUTPUT LOAD (A)
FIGURE 1. TYPICAL APPLICATION: 5A BUCK REGULATOR
FN8713 Rev 7.00
Sep 28, 2018
FIGURE 2. EFFICIENCY vs LOAD (VIN = 5V; fsw = 2MHz; SYNC = GND)
Page 1 of 24
ISL78235
Table of Contents
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Typical Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical Operating Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PWM Control Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Skip Mode (PFM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Frequency Adjust . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Negative Current Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UVLO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soft Start-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Discharge Mode (Soft-Stop) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power MOSFETs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100% Duty Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
16
16
17
17
17
17
17
17
18
18
18
18
18
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Inductor and Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loop Compensation Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
18
18
19
19
PCB Layout Recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
L16.3x3D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
L16.5x5D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
FN8713 Rev 7.00
Sep 28, 2018
Page 2 of 24
ISL78235
Functional Block Diagram
COMP
SS
SHUTDOWN
SYNC
55pF
Soft
SOFTSTART
SHUTDOWN
VDD
100kΩ
+
BANDGAP VREF
+
EN
FS
+
COMP
-
EAMP
-
VIN
OSCILLATOR
PWM/PFM
LOGIC
CONTROLLER
PROTECTION
HS DRIVER
3pF
+
P
PHASE
LS
DRIVER
N
PGND
FB
6kΩ
SLOPE
Slope
COMP
0.8V
+
CSA
-
+
OV
0.85*VREF
PG
+
UV
+
OCP
-
+
SKIP
-
ISET
THRESHOLD
1ms
DELAY
NEG CURRENT
SENSING
SGND
ZERO-CROSS
SENSING
0.5V
SCP
+
100Ω
SHUTDOWN
FIGURE 3. FUNCTIONAL BLOCK DIAGRAM
FN8713 Rev 7.00
Sep 28, 2018
Page 3 of 24
ISL78235
Pin Configuration
16
15
14
PHASE
PHASE
PHASE
VIN
ISL78235
(16 LD TQFN, WFQFN)
TOP VIEW
13
12 PGND
VIN 1
11 PGND
VDD 2
EPAD
10 SGND
PG 3
9
5
6
7
8
EN
FS
SS
COMP
SYNC 4
FB
Pin Descriptions
PIN NUMBER
PIN NAME
1, 16
VIN
Input supply voltage. Place a minimum of two 22µF low ESR ceramic capacitors from VIN to PGND as close as
possible to the IC for decoupling.
DESCRIPTION
2
VDD
Input supply voltage for the logic circuitry. A 0.1µF high frequency decoupling ceramic capacitor should also be
placed close to the VDD and SGND pin. Connect to the VIN pin.
3
PG
PG is an open-drain output for power-good indication. Use a 10kΩ to 100kΩ pull-up resistor connected from PG to
VIN. At power-up or EN high, the PG rising edge is delayed by 1ms upon output voltage within regulation.
4
SYNC
Mode selection pin. Connect to logic high or input voltage VIN for forced PWM mode. Connect to logic low or ground
for PFM mode. Connect to an external function generator for synchronization with a positive edge trigger. In external
synchronization the ISL78235 operates in forced PWM mode. The transition to and from the internal oscillator to
external synchronization is seamless and does not require disabling the ISL78235. An internal 1MΩ pull-down
resistor to SGND prevents an undefined logic state if the SYNC pin is floating.
5
EN
Regulator enable pin. The regulator is enabled when driven logic high. The regulator is shut down and the PHASE
pin discharges the output capacitor when the enable pin is driven low.
6
FS
This pin sets the internal oscillator switching frequency using a resistor, RFS, from the FS pin to GND. The frequency
of operation may be programmed between 500kHz to 4MHz. The switching frequency is 2MHz if FS is connected
to VIN.
7
SS
SS is used to adjust the soft-start time. Connect the SS pin to SGND for an internal 1ms soft-start time. Connect a
capacitor from SS to SGND to adjust the soft-start time. Do not use more than 33nF on the SS pin.
8
COMP
COMP is the output of the error amplifier if COMP is not connected to VDD. An external compensation network must
be used if COMP is not tied to VDD. If COMP is tied to VDD, the error amplifier output is internally compensated.
External compensation network across COMP and SGND may be required to improve the loop compensation of the
amplifier.
9
FB
The feedback network of the regulator, FB, is the negative input to the transconductance error amplifier. The output
voltage is set by an external resistor divider connected to FB. With a properly selected divider, the output voltage
can be set to any voltage between the power rail (reduced by converter losses) and the 0.6V reference. In addition,
the regulator power-good and undervoltage protection circuitry use FB to monitor the regulator output voltage.
10
SGND
Signal ground. Connect to PGND.
11, 12
PGND
Power ground.
13, 14, 15
PHASE
Switching node connections. Connect to one terminal of the inductor. This pin is discharged by a 100Ω resistor
when the device is disabled. See “Functional Block Diagram” on page 3 for more detail.
Exposed Pad
EPAD
The exposed pad must be connected to the SGND pin for proper electrical performance. Place as many vias as
possible under the pad connecting to SGND plane for optimal thermal performance.
FN8713 Rev 7.00
Sep 28, 2018
Page 4 of 24
ISL78235
Ordering Information
PART NUMBER
(Note 4)
PART
MARKING
OUTPUT VOLTAGE
(V)
TEMP. RANGE (°C)
TAPE AND REEL
(UNITS)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
ISL78235ARZ (Note 2)
8235
Adjustable
-40°C to +105°C
-
16 Ld 3x3mm TQFN
L16.3x3D
ISL78235ARZ-T (Notes 1, 2)
8235
Adjustable
-40°C to +105°C
6k
16 Ld 3x3mm TQFN
L16.3x3D
ISL78235ARZ-T7A (Notes 1, 2)
8235
Adjustable
-40°C to +105°C
250
16 Ld 3x3mm TQFN
L16.3x3D
ISL78235AARZ (Note 3)
78235A ARZ
Adjustable
-40°C to +125°C
-
16 Ld 5x5mm WFQFN
L16.5x5D
ISL78235AARZ-T (Notes 1, 3)
78235A ARZ
Adjustable
-40°C to +125°C
6k
16 Ld 5x5mm WFQFN
L16.5x5D
ISL78235AARZ-T7A (Notes 1, 3) 78235A ARZ
Adjustable
-40°C to +125°C
250
16 Ld 5x5mm WFQFN
L16.5x5D
ISL78235EVAL1Z
3x3mm TQFN Evaluation Board
ISL78235EVAL2Z
5x5mm WFQFN Evaluation Board
NOTES:
1. Refer to TB347 for details about reel specifications.
2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials and 100% matte tin plate
plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. These Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb
and Pb-free soldering operations.
4. For Moisture Sensitivity Level (MSL), refer to the ISL78235 product information page. For more information about MSL, refer to TB363.
TABLE 1. KEY DIFFERENCE BETWEEN FAMILY OF PARTS
FN8713 Rev 7.00
Sep 28, 2018
PART NUMBER
IOUT MAX (A)
ISL78235
5
ISL78234
4
ISL78233
3
Page 5 of 24
ISL78235
Typical Application Diagram
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