DATASHEET
ISL78302A
FN7932
Rev 2.00
December 22, 2015
Dual LDO with Low Noise, Very High PSRR and Low IQ
ISL78302A is a high-performance dual LDO capable of
sourcing 300mA current from each output. It has a low
standby current and very high PSRR and is stable with output
capacitance of 1µF to 10µF with ESR of up to 200mΩ.
Features
The device integrates an individual Power-On Reset (POR)
function for each output. The POR delay for VO2 can be
externally programmed by connecting a timing capacitor to the
CPOR pin. The POR delay for VO1 is internally fixed at
approximately 2ms. A reference bypass pin is also provided for
connecting a noise-filtering capacitor for low noise and
high-PSRR applications.
• ±1.8% Accuracy Over All Operating Conditions
• Integrates Two 300mA High-performance LDOs
• Excellent Transient Response to Large Current Steps
• Excellent Load Regulation: < 0.1% Voltage Change Across
Full Range of Load Current
• Low Output Noise: Typically 30µVRMS at 100µA (1.5V)
• Very High PSRR: 90dB at 1kHz
• Extremely Low Quiescent Current: 47µA (Both LDOs Active)
The quiescent current is typically only 47µA with both LDOs
enabled and active. Separate Enable pins control each
individual LDO output. When both Enable pins are low, the
device is in shutdown, typically drawing less than 0.3µA.
• Wide Input Voltage Capability: 2.3V to 6.5V
The ISL78302A is AEC-Q100 qualified. The ISL78302A is rated
for the automotive temperature range (-40°C to +105°C).
• Separate Enable and POR Pins for Each LDO
• Low Dropout Voltage: Typically 230mV at 300mA
• Stable with 1µF to 10µF Ceramic Capacitors
• Soft-start and Staged Turn-on to Limit Input Current Surge
During Enable
• Current Limit and Overheat Protection
• Tiny 10 Ld 3mmx3mm DFN Package
• -40°C to +105°C Operating Temperature Range
• Pb-free (RoHS Compliant)
• AEC-Q100 Qualified
Applications
• Radio Receivers
• Camera Modules
• GPS/Navigation
• Infotainment Systems
ISL78302A
VIN (2.3 TO 6.5V)
1
ON
2
ENABLE1
OFF ON
ENABLE2
OFF
3
4
5
C1
C2
VIN
EN1
VO1
VO2
EN2
POR2
CBYP
POR1
CPOR
GND
10
VOUT1
9
VOUT2 OK
8
7
VOUT2 TOO LOW
VOUT1 OK
6
C3
C4
C5
VOUT1 TOO LOW
VOUT2
RESET2
(200ms DELAY,
C3 = 0.01µF)
RESET1
(2ms DELAY)
C1, C4, C5: 1µF X5R CERAMIC CAPACITOR
C2: 0.1µF X7R CERAMIC CAPACITOR
C3: 0.01µF X7R CERAMIC CAPACITOR
FIGURE 1. TYPICAL APPLICATION
FN7932 Rev 2.00
December 22, 2015
Page 1 of 12
ISL78302A
Block Diagram
VIN
VO1
VO2
LDO
VO1
ERROR
AMPLIFIER
~1.0V
VO2
VREF
TRIM
IS1
POR
COMPARATOR
QEN1
VOK1
1V
POR1
LDO-1
POR2
QEN2
VO2
100k
QEN1
IS2
LDO-2
IS1
VOK2
EN1
CONTROL
LOGIC
EN2
POR2
VOK2
POR2
DELAY
CBYP
VO1
BANDGAP AND
TEMPERATURE
SENSOR
VOLTAGE
REFERENCE
GENERATOR
100k
UVLO
1.00V
VOK1
0.94V
POR1
0.90V
CPOR
FN7932 Rev 2.00
December 22, 2015
POR1
DELAY
GND
Page 2 of 12
ISL78302A
Pin Configuration
ISL78302A
(10 LD 3X3 DFN)
TOP VIEW
VIN 1
10 VO1
EN1 2
9
VO2
EN2 3
8
POR2
CBYP 4
7
POR1
CPOR 5
6
GND
Pin Descriptions
PIN NUMBER PIN NAME
TYPE
DESCRIPTION
1
VIN
Analog I/O
Supply Voltage/LDO Input. Connect a 1µF capacitor to GND.
2
EN1
Low Voltage Compatible CMOS Input LDO-1 Enable
3
EN2
Low Voltage Compatible CMOS Input LDO-2 Enable
4
CBYP
Analog I/O
Reference Bypass Capacitor Pin. Optionally connect capacitor of value 0.01µF to 1µF
between this pin and GND to tune in the desired noise and PSRR performance.
5
CPOR
Analog I/O
POR2 Delay Setting Capacitor Pin. Connect a capacitor between this pin and GND to
delay the POR2 output release after LDO-2 output reaches 94% of its specified
voltage level (200ms delay per 0.01µF).
6
GND
Ground
7
POR1
Open Drain Output (1mA)
Open-drain POR Output for LDO-1 (active-low). Internally connected to VO1 through
100kΩ resistor.
8
POR2
Open Drain Output (1mA)
Open-drain POR Output for LDO-2 (active-low). Internally connected to VO2 through
100kΩ resistor.
9
VO2
Analog I/O
LDO-2 Output. Connect capacitor of value 1µF to 10µF to GND
(1µF recommended).
10
VO1
Analog I/O
LDO-1 Output. Connect capacitor of value 1µF to 10µF to GND
(1µF recommended).
Connection to system ground. Connect to PCB Ground plane.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL78302AARMMZ
PART
MARKING
DNAL
VO1 VOLTAGE
(V)
VO2 VOLTAGE
(V)
TEMP RANGE
(°C)
3.0
3.0
-40 to +105
PACKAGE
(RoHS Compliant)
10 Ld 3x3 DFN
PKG DWG. #
L10.3x3C
ISL78302AARLLZ
DNAM
2.9
2.9
-40 to +105
10 Ld 3x3 DFN
L10.3x3C
ISL78302AARJMZ
DNAN
2.8
3.0
-40 to +105
10 Ld 3x3 DFN
L10.3x3C
ISL78302AARJRZ
DNAP
2.8
2.6
-40 to +105
10 Ld 3x3 DFN
L10.3x3C
ISL78302AARJCZ
DNAK
2.8
1.8
-40 to +105
10 Ld 3x3 DFN
L10.3x3C
ISL78302AARGCZ
DNAR
2.7
1.8
-40 to +105
10 Ld 3x3 DFN
L10.3x3C
ISL78302AARPLZ
DNAS
1.85
2.9
-40 to +105
10 Ld 3x3 DFN
L10.3x3C
ISL78302AARBJZ
DNAT
1.5
2.8
-40 to +105
10 Ld 3x3 DFN
L10.3x3C
NOTES:
1. Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL78302A. For more information on MSL, please see Tech Brief TB363.
FN7932 Rev 2.00
December 22, 2015
Page 3 of 12
ISL78302A
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7.1V
VO1, VO2 Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.6V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3)V
Thermal Resistance
JA (°C/W) JC (°C/W)
10 Ld 3x3 DFN Package (Notes 4, 5). . . . .
59
18.5
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
ESD Ratings
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 3000V
Machine Model (Tested per JESD-A115-A) . . . . . . . . . . . . . . . . . . . . . . 200V
Charge Device Model (Tested per AEC-Q100-011) . . . . . . . . . . . . . . 1500V
Recommended Operating Conditions
Ambient Temperature Range (TA) . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Operating Temperature Range . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3V to 6.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature
range of the device as follows: TA = -40°C to 105°C; VIN = (VO + 0.5V) to 6.5V with a minimum VIN of 2.3V; CIN = 1µF; CO = 1µF; CBYP = 0.01µF;
CPOR = 0.01µF. Boldface limits apply over the operating temperature range, -40°C to +105°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 6) TYP
MAX
(Note 6)
UNITS
6.5
V
DC CHARACTERISTICS
Supply Voltage
2.3
VIN
Quiescent condition: IO1 = 0µA; IO2 = 0µA
Ground Current
IDD1
One LDO active
30
36
µA
IDD2
Both LDO active
47
55
µA
Shutdown Current
IDDS
0.3
2.1
µA
UVLO Threshold
VUV+
1.9
2.1
2.3
V
VUV-
1.6
1.8
2.0
V
-0.8
+0.8
%
VIN = VO + 0.5V to 5.5V, IO = 10µA to 300mA, TJ = -40°C to +125°C
-1.8
+1.8
Continuous
300
VIN = VO + 0.5V to 5.5V, IO = 10µA to 300mA, TJ = +25°C
Regulation Voltage Accuracy
IMAX
Internal Current Limit
ILIM
Dropout Voltage (Note 7)
VDO1
IO = 300mA; VO 2.5V
450
IO = 150mA; VO 2.5V
225
VDO2
IO = 300mA; 2.5V VO 2.8V
250
IO = 150mA; 2.5V VO 2.8V
125
IO = 300mA; VO > 2.8V
230
IO = 150mA; VO > 2.8V
115
VDO3
Thermal Shutdown Temperature
320
%
mA
Maximum Output Current
475
650
mA
mV
250
mV
160
mV
mV
145
mV
TSD+
145
°C
TSD-
110
°C
@ 1kHz
90
dB
@ 10kHz
70
dB
@ 100kHz
50
dB
AC CHARACTERISTICS
Ripple Rejection
FN7932 Rev 2.00
December 22, 2015
IO = 10mA, VIN = 2.8V(min), VO = 1.8V, CBYP = 0.1µF
Page 4 of 12
ISL78302A
Electrical Specifications
Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature
range of the device as follows: TA = -40°C to 105°C; VIN = (VO + 0.5V) to 6.5V with a minimum VIN of 2.3V; CIN = 1µF; CO = 1µF; CBYP = 0.01µF;
CPOR = 0.01µF. Boldface limits apply over the operating temperature range, -40°C to +105°C. (Continued) (Continued)
PARAMETER
SYMBOL
Output Noise Voltage
MIN
(Note 6) TYP
TEST CONDITIONS
MAX
(Note 6)
UNITS
IO = 100µA, VO = 1.5V, TA = +25°C, CBYP = 0.1µF
BW = 10Hz to 100kHz
30
µVRMS
250
500
µs
30
60
µs/V
DEVICE START-UP CHARACTERISTICS
Device Enable Time
tEN
Time from assertion of the ENx pin to when the output voltage
reaches 95% of the VO (nom)
LDO Soft-Start Ramp Rate
tSSR
Slope of linear portion of LDO output voltage ramp during start-up
EN1, EN2 PIN CHARACTERISTICS
Input Low Voltage
VIL
-0.3
0.5
V
Input High Voltage
VIH
1.35
VIN +
0.3
V
0.1
µA
Input Leakage Current
IIL, IIH
Pin Capacitance
CPIN
Informative
5
pF
POR1, POR2 PIN CHARACTERISTICS
POR1, POR2 Thresholds
POR1 Delay
VPOR+
As a percentage of nominal output voltage
91
94
97
%
VPOR-
87
90
93
%
tP1LH
0.5
2.0
3.2
ms
100
200
300
ms
25
tP1HL
POR2 Delay
tP2LH
CPOR = 0.01µF
25
tP2HL
POR1, POR2 Pin Output Low
Voltage
POR1, POR2 Pin Internal Pull-Up
Resistance
VOL
µs
@ IOL = 1.0mA
RPOR
78
100
µs
0.2
V
180
kΩ
NOTES:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
7. VOx = 0.98*VOx(NOM); valid for VOx greater than 1.85V.
EN1
EN2
tEN
VPOR+
VPOR-
VPOR+
VPOR-
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