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ISL78302ARWCZ-T

ISL78302ARWCZ-T

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    VFDFN10

  • 描述:

    IC REG LINEAR 1.2V/1.8V 10DFN

  • 数据手册
  • 价格&库存
ISL78302ARWCZ-T 数据手册
DATASHEET ISL78302 FN7696 Rev 6.00 November 6, 2014 Dual LDO with Low Noise, High Performance and Low IQ ISL78302 is a high performance dual LDO capable of sourcing 300mA current from each output. It has a low standby current and is stable with an output capacitance of 1µF to 10µF and an ESR of up to 200mΩ. Features The device integrates an individual Power-On-Reset (POR) function for each output. The POR delay for VO2 can be externally programmed by connecting a timing capacitor to the CPOR pin. The POR delay for VO1 is internally fixed at approximately 2ms. A reference bypass pin is also provided for connecting a noise filtering capacitor for low noise and highPSRR applications. • ±1.8% Accuracy over all operating conditions The quiescent current is typically only 47µA with both LDOs enabled and active. Separate enable pins control each individual LDO output. When both enable pins are low, the device is in shutdown, typically drawing less than 0.5µA. • Low output noise: typically 37µVRMS at 100µA (1.5V) The part operates down to 2.3V and up to 6.5V input. The typical output voltage can be as low as 1.2V and as high as 3.3V for each regulator. Please refer to the “Ordering Information” on page 3 for standard options. • Soft-start and staged turn-on to limit input current surge during enable The ISL78302 is AEC-Q100 qualified at the automotive temperature range of -40°C to +105°C. • AEC-Q100 qualified • Integrates two 300mA high performance LDOs • Excellent transient response to large current steps • Excellent load regulation: 1.25V 30 60 µs/V Slope of linear portion of LDO output voltage ramp during start-up, VOUT ≤ 1.25V 40 80 µs/V EN1, EN2 PIN CHARACTERISTICS Input Low Voltage VIL -0.3 0.5 V Input High Voltage VIH 1.35 VIN + 0.3 V 0.1 µA Input Leakage Current IIL, IIH Pin Capacitance CPIN Informative 5 pF POR1, POR2 PIN CHARACTERISTICS POR1, POR2 Thresholds POR1 Delay VPOR+ As a percentage of nominal output voltage 91 94 97 % VPOR- 87 90 93 % tP1LH 0.5 2.0 3.2 ms 25 tP1HL POR2 Delay tP2LH CPOR = 0.01µF 100 POR1, POR2 Pin Internal Pull-up Resistance VOL 300 25 tP2HL POR1, POR2 Pin Output Low Voltage 200 µs at IOL = 1.0mA RPOR 78 100 ms µs 0.2 V 180 kΩ NOTES: 6. VOx = 0.98*VOx(NOM); Valid for VOx greater than 1.85V. 7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. FN7696 Rev 6.00 November 6, 2014 Page 5 of 13 ISL78302 EN1 EN2 tEN VPOR+ VPOR- VPOR+ VPOR-
ISL78302ARWCZ-T 价格&库存

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