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ISL80101IR18Z-T

ISL80101IR18Z-T

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    VFDFN10

  • 描述:

    IC REG LINEAR 1.8V 1A 10DFN

  • 数据手册
  • 价格&库存
ISL80101IR18Z-T 数据手册
IGNS W DES E N R O DF ART MENDE ME N T P E M C O A C L E D REP N OT R ME N D E 1-ADJ R E C OM ISL8010 DATASHEET High Performance 1A LDO ISL80101 Features The ISL80101 is a low voltage, high current, single output LDO specified at 1A output current. This LDO operates from input voltages of 2.2V to 6V. Fixed output voltage options are available in 1.8V, 2.5V, 3.3V and 5.0V versions. Other custom voltage options are available upon request. For the adjustable output version of the ISL80101, please refer to the ISL80101-ADJ datasheet. • ±1.8% VOUT accuracy guaranteed over line, load and TJ = -40°C to +125°C A submicron BiCMOS process is utilized for this product family to deliver the best-in-class analog performance and overall value. This CMOS LDO consumes significantly lower quiescent current as a function of load compared to bipolar LDOs, which translates into higher efficiency and packages with smaller footprints. State-of-the-art internal compensation achieves a very fast load transient response. An external capacitor on the soft-start pin provides an adjustable soft-starting ramp. The ENABLE feature allows the part to be placed into a low quiescent current shutdown mode. A power-good logic output signals a fault condition. • Excellent 65dB PSRR Table 1 shows the differences between the ISL80101 and others in its family: • Post regulation of switched mode power supplies PART NUMBER PROGRAMMABLE ILIMIT ILIMIT (DEFAULT) ADJ or FIXED VOUT ISL80101-ADJ No 1.75A ADJ ISL80101 No 1.75A 1.8V, 2.5V, 3.3V, 5.0V ISL80101A Yes 1.62A ADJ ISL80121-5 Yes 0.75A 5.0V 5.4V ± 10% 10µF CIN 10 VIN VOUT 9 V IN 10k R3 SENSE 5.0V ± 1.8% 2 10µF COUT 3 ISL80101 7 6 0.01µF CSS VOUT 1 ENABLE PG 100k RPG 4 SS • Very fast transient response • Programmable soft-starting • Power-good output • Current limit protection • Thermal shutdown function • Available in a 10 Ld DFN package • Pb-free (RoHS compliant) Applications • DSP, FPGA and µP core power supplies • Noise-sensitive instrumentation systems • Industrial systems • Medical equipment • Telecommunications and networking equipment • Servers • Hard disk drives (HD/HDD) Related Literature • See AN1592, “ISL80101 High Performance 1A LDO Evaluation Board User Guide” 140 DROPOUT VOLTAGE (mV) TABLE 1. KEY DIFFERENCES BETWEEN FAMILY OF PARTS • Very low 130mV dropout voltage at VOUT = 2.5V 120 100 80 60 40 VOUT = 2.5V 20 GND 0 5 0 0.2 0.4 0.6 0.8 1.0 OUTPUT CURRENT (A) FIGURE 1. TYPICAL APPLICATION CIRCUIT September 25, 2015 FN6931.2 1 FIGURE 2. DROPOUT vs LOAD CURRENT CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2009, 2011, 2015. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL80101 Block Diagram VIN EN CONTROL LOGIC - REFERENCE + SOFT-START THERMAL SENSOR PG PG EA + FET DRIVER WITH CURRENT LIMIT VOUT SS + SENSE - GND Ordering Information PART NUMBER (Notes 1, 3, 4) PART MARKING VOUT VOLTAGE (Note 2) TEMP RANGE (°C) PACKAGE (RoHS Compliant) PKG DWG. # ISL80101IR18Z DZEB 1.8V -40 to +125 10 Ld 3x3 DFN L10.3x3 ISL80101IR25Z DZFB 2.5V -40 to +125 10 Ld 3x3 DFN L10.3x3 ISL80101IR33Z DZGB 3.3V -40 to +125 10 Ld 3x3 DFN L10.3x3 ISL80101IR50Z DZHB 5.0V -40 to +125 10 Ld 3x3 DFN L10.3x3 ISL80101EVAL2Z Evaluation Board NOTES: 1. Add “-T*” for Tape and Reel. Please refer to TB347 for details on reel specifications. 2. For other output voltages, contact Intersil Marketing. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. For Moisture Sensitivity Level (MSL), please see device information page for ISL80101. For more information on MSL please see Technical Brief TB363. Submit Document Feedback 2 FN6931.2 September 25, 2015 ISL80101 Pin Configurations ISL80101 (10 LD 3x3 DFN) TOP VIEW VOUT 1 10 VIN VOUT 2 SENSE 3 PG 4 GND 5 9 VIN EPAD 8 NC 7 ENABLE 6 SS Pin Descriptions PIN NUMBER PIN NAME 1, 2 VOUT 3 SENSE 4 PG 5 GND 6 SS 7 ENABLE 8 NC No connection; Leave floating. 9, 10 VIN Input supply; A minimum of 10µF X5R/X7R input capacitor is required for proper operation. See “External Capacitor Requirements” on page 8 for more details. - EPAD Submit Document Feedback DESCRIPTION Regulated output voltage. A minimum 10µF X5R/X7R output capacitor is required for stability. See “External Capacitor Requirements” on page 8 for more details. Sense is the LDO's output feedback, providing a remote voltage sensing. This is an open-drain logic output used to indicate the status of the output voltage. Logic low indicates VOUT is not in regulation. This pin must be grounded if not used. Ground External capacitor on this pin adjusts startup ramp and controls in-rush current. VIN independent chip enable. TTL and CMOS compatible. EPAD at ground potential; It is recommended to solder the EPAD to the ground plane. 3 FN6931.2 September 25, 2015 ISL80101 Absolute Maximum Ratings Thermal Information VIN Relative to GND (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V VOUT Relative to GND (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V PG, ENABLE, SENSE, SS Relative to GND (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V ESD Rating Human Body Model (Tested per JESD22 A114F) . . . . . . . . . . . . . . .2.5kV Machine Model (Tested per JESD22 A115C) . . . . . . . . . . . . . . . . . 250V Charge Device Model (Tested per JESD22-C101C). . . . . . . . . . . . . . . 2kV Latch-Up (Tested per JESD78C, Class 2, Level A) . . . . ±100mA at +125°C Thermal Resistance (Typical) JA (°C/W) JC (°C/W) 10 Ld DFN Package (Notes 6, 7) . . . . . . . . 48 7 Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 Recommended Operating Conditions (Notes 8, 9) Junction Temperature Range (TJ) (Note 8) . . . . . . . . . . . .-40°C to +125°C VIN Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.2V to 6V VOUT Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800mV to 5V PG, ENABLE, SENSE, SS relative to GND . . . . . . . . . . . . . . . . . . . . 0V to 6V PG Sink Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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