DATASHEET
ISL8012
2A Low Quiescent Current 1MHz High Efficiency Synchronous Buck Regulator
FN6616
Rev 2.00
December 1, 2011
The ISL8012 is a high efficiency, monolithic, synchronous
step-down DC/DC converter that can deliver up to 2A
continuous output current from a 2.7V to 5.5V input supply. It
uses a current control architecture to deliver very low duty
cycle operation at high frequency with fast transient response
and excellent loop stability.
Features
The ISL8012 integrates a pair of low ON-resistance P-Channel
and N-Channel internal MOSFETs to maximize efficiency and
minimize external component count. The 100% duty-cycle
operation allows less than 240mV dropout voltage at 2A
output current. High 1MHz pulse width modulation (PWM)
switching frequency allows the use of small external
components.
• 3% Output Accuracy Over-Temperature/Load/Line
The ISL8012 can be configured for discontinuous or forced
continuous operation at light load. Forced continuous
operation reduces noise and RF interference while
discontinuous mode provides high efficiency by reducing
switching losses at light loads.
• 40µA Quiescent Supply Current in PFM Mode
Fault protection is provided by internal current limiting during
short circuit and overcurrent conditions, an output overvoltage
comparator and over-temperature monitor circuit. A powergood output voltage monitor indicates when the output is in
regulation.
The ISL8012 offers a 1ms Power-good (PG) timer at power-up.
When shutdown, ISL8012 discharges the output capacitor.
Other features include internal soft-start, internal
compensation, overcurrent protection, and thermal shutdown.
The ISL8012 is offered in a space saving 3mmx3mm 10 Ld
DFN package lead free package with exposed pad lead frames
for low thermal. The complete converter occupies less than
0.35in2 area.
• High Efficiency Synchronous Buck Regulator with up to 95%
Efficiency
• Power-Good (PG) Output with a 1ms Delay
• 2.7V to 5.5V Supply Voltage
• 2A Guaranteed Output Current
• Start-up with Pre-Biased Output
• Internal Soft-Start - 1ms
• Soft-Stop Output Discharge During Disabled
• Selectable Forced PWM Mode and PFM Mode
• Less than 1µA Logic Controlled Shutdown Current
• 100% Maximum Duty Cycle
• Internal Current Mode Compensation
• Peak Current Limiting and Hiccup Mode Short Circuit
Protection
• Over-Temperature Protection
• Small 10 Ld 3mmx3mm DFN
• Pb-Free (RoHS Compliant)
Applications
• DC/DC POL Modules
• µC/µP, FPGA and DSP Power
• Plug-in DC/DC Modules for Routers and Switchers
• Portable Instruments
• Test and Measurement Systems
• Li-ion Battery Powered Devices
• Small Form Factor (SFP) Modules
• Bar Code Readers
Related Literature
• See AN1360 for “ISL8012EVAL1Z: 2A Synchronous Buck
Regulator with Integrated MOSFETs”
FN6616 Rev 2.00
December 1, 2011
Page 1 of 17
ISL8012
Pin Configuration
ISL8012
(10 LD DFN)
TOP VIEW
VIN 1
10 LX
VCC 2
EN 3
9 PGND
PD
PG 4
MODE 5
8 SGND
7 VFB
6 RSI
Pin Descriptions
SYMBOL
PIN NUMBER
VIN
1
Input supply voltage. Connect a 10µF ceramic capacitor to power ground.
VCC
2
Input supply for the logic. Connect to VIN.
EN
3
Regulator enable pin. Enable the output when driven to high. Shutdown the chip and discharge output capacitor
when driven to low. Do not leave this pin floating.
PG
4
1ms timer output. At power-up or EN HI, this output is a 1ms delayed Power-Good signal for the output voltage. This
output can be reset by a low RSI signal. 1ms starts when RSI goes to high.
MODE
5
Mode Selection pin. Connect to logic high or input voltage VIN for PFM mode; connect to logic low or ground for
forced PWM mode. Do not leave this pin floating.
RSI
6
This input resets the 1ms timer. When the output voltage is within the PGOOD window, an internal timer is started and
generates a PG signal 1ms later when RSI is low. A high RSI resets PG and RSI high to low transition restarts the
internal counter if the output voltage is within the window, otherwise the counter is reset by the output voltage
condition.
VFB
7
Buck regulator output feedback. Connect to the output through a resistor divider for adjustable output voltage
(ISL8012-ADJ). For preset output voltage, connect this pin to the output.
SGND
8
System ground for the control logic. All voltage levels are measured with respect to this pin.
PGND
9
Ground connect for the IC and thermal relief for the package. The exposed pad must be connected to PGND and
soldered to the PCB.
LX
10
Switching node connection. Connect to one terminal of inductor.
Exposed Pad
PD
The exposed pad must be connected to the PGND and SGND pin for proper electrical performance. The exposed pad
must also be connected to as much as possible for optimal thermal performance.
FN6616 Rev 2.00
December 1, 2011
DESCRIPTION
Page 2 of 17
ISL8012
Typical Application
OUTPUT
L
INPUT 2.7V TO 5.5V
1.8V/2A
LX
VIN
C2
2x10µF
C1
2x10µF
PGND
R2
124k
C3*
220pF
ISL8012
SGND
EN
R3
100k
R1
100k
PG
VFB
MODE
RSI
*C3 is optional
FIGURE 1. TYPICAL APPLICATION DIAGRAM
Block Diagram
MODE
390k
SHUTDOWN
BANDGAP
0.8V
+
EN
SHUTDOWN
27pF
SOFT-START
+
COMP
EAMP
VIN
OSCILLATOR
PWM/PFM
LOGIC
CONTROLLER
PROTECTION
DRIVER
LX
+
GND
VFB
SLOPE
COMP
+
CSA
0.864V
+
+
OCP
1V
+
0.736V
+
SKIP
PG
1ms
DELAY
RSI
0.2V
0.25V
ZERO-CROSS
SENSING
SCP
+
FIGURE 2. FUNCTIONAL BLOCK DIAGRAM
FN6616 Rev 2.00
December 1, 2011
Page 3 of 17
ISL8012
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL8012IRZ
PART
MARKING
012Z
TEMP. RANGE
(°C)
-40 to +85
PACKAGE
(Pb-Free)
10 Ld 3x3 DFN
PKG.
DWG. #
L10.3x3C
NOTES:
1. Add “-T*” or suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL8012. For more information on MSL please see techbrief TB363.
FN6616 Rev 2.00
December 1, 2011
Page 4 of 17
ISL8012
Absolute Maximum Ratings (Reference to GND)
Thermal Information
VIN, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
EN, RSI, PG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VIN+0.3V
LX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.5V (100ns)/-0.3V (DC) to 6.5V
VFB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.7V
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
10 Ld 3x3 DFN (Notes 4, 5). . . . . . . . . . .
49
5.5
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-55°C to +125°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
VIN Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Load Current Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0A to 2A
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Unless otherwise noted, all parameter limits are established over the recommended operating conditions and
the typical specifications are measured at the following conditions: TA = -40°C to +85°C, VIN = 3.6V, EN = VCC, unless otherwise noted. Typical values are
at TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 7)
TYP
MAX
(Note 7) UNITS
INPUT SUPPLY
VIN Undervoltage Lockout Threshold
VUVLO
Rising
Falling
Quiescent Supply Current
Shut Down Supply Current
IVIN
2.5
2.2
2.7
V
2.4
V
MODE = VIN, no load at the output
40
MODE = VIN, no load at the output and no switches
switching; design info only
15
MODE = SGND, no load at the output
6
8
mA
0.1
2
µA
0.8
0.816
V
ISD
VIN = 5.5V, EN = low
VFB Regulation Voltage
VVFB
TA = 0°C to +85°C
VFB Bias Current
IVFB
VFB = 0.75V
60
µA
µA
OUTPUT REGULATION
0.784
0.1
-3
µA
Output Voltage Accuracy
VIN = VO + 0.5V to 5.5V, IO = 0A to 2A (Note 6)
3
%
Line Regulation
VIN = VO + 0.5V to 5.5V (minimal 2.7V), IOUT = 400mA
0.2
%/V
Adjustable version, design info only
20
µA/V
COMPENSATION
Error Amplifier Trans-Conductance
LX
P-Channel MOSFET ON-Resistance
N-Channel MOSFET ON-Resistance
P-Channel MOSFET Peak Current Limit
VIN = 5.5V, IO = 200mA
0.12
0.22
VIN = 2.7V, IO = 200mA
0.21
0.27
VIN = 5.5V, IO = 200mA
0.11
0.22
VIN = 2.7V, IO = 200mA
0.13
0.27
3.00
3.50
A
2.65
IPK
LX Maximum Duty Cycle
PWM Switching Frequency
FN6616 Rev 2.00
December 1, 2011
100
fS
TA = 0°C to +85°C
0.840
1
1.16
MHz
Page 5 of 17
ISL8012
Electrical Specifications
Unless otherwise noted, all parameter limits are established over the recommended operating conditions and
the typical specifications are measured at the following conditions: TA = -40°C to +85°C, VIN = 3.6V, EN = VCC, unless otherwise noted. Typical values are
at TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 7)
TYP
LX Minimum On-Time
MODE = low (forced PWM mode)
80
Soft-Start-Up Time
VIN = 3.6V
1.1
MAX
(Note 7) UNITS
100
ns
ms
PG
Output Low Voltage
Sinking 1mA, VFB = 0.7V
0.3
Delay Time
PG Pin Leakage Current
1
PG = VIN = 3.6V
Minimum Supply Voltage for Valid PG Signal
0.01
V
ms
0.1
1.2
µA
V
Internal PGOOD Low Rising Threshold
Percentage of nominal regulation voltage
89
92
95
%
Internal PGOOD Low Falling Threshold
Percentage of nominal regulation voltage
85
88
91
%
Internal PGOOD High Rising Threshold
Percentage of nominal regulation voltage
107
110
113
%
Internal PGOOD High Falling Threshold
Percentage of nominal regulation voltage
104
107
110
Internal PGOOD Delay Time
30
%
µs
EN, MODE, RSI
Logic Input Low
0.4
Logic Input High
Logic Input Leakage Current
1.4
Pulled up to 5.5V
V
V
0.1
1
µA
NOTES:
6. Limits established by characterization and are not production tested.
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
FN6616 Rev 2.00
December 1, 2011
Page 6 of 17
ISL8012
Typical Operating Performance
100
100
90
90
80
80
1.5VOUT
70
EFFICIENCY (%)
EFFICIENCY (%)
(Unless otherwise noted, operating conditions are: TA = +25°C, VVIN = 2.5V to 5.5V,
EN = VIN, MODE = 0V, L = 2.2µH, C1 = 2x10µF, C2 = 2x10µF, IOUT = 0A to 2A).
1.2VOUT
60
50
40
30
20
0.00
2.5VOUT
0.50
1.5VOUT
60
50
40
0.75
1.00
1.25
1.50
1.75
20
0.1
2.00
0.2
0.3
0.5
100
100
90
90
80
80
70
1.2VOUT
1.8VOUT
2.5VOUT
60
50
40
30
3.3VOUT
20
0.00
0.25
0.50
70
0.7
0.8
2.5VOUT
3.3VOUT
1.2VOUT
50
40
30
0.75
1.00
1.25
1.50
1.75
20
0.1
2.00
0.2
0.3
0.4
0.5
0.6
OUTPUT LOAD (A)
0.7
0.8
FIGURE 6. EFFICIENCY vs LOAD (1MHz 5VIN PFM)
FIGURE 5. EFFICIENCY vs LOAD (1MHz 5VIN PWM)
1.000
160
0.875
POWER DISSIPATION (mW)
3.3VIN PWM
0.750
0.625
0.500
0.375
5VIN PFM
5VIN PWM
3.3VIN PFM
0.125
0
0.00
1.8VOUT
1.5VOUT
60
OUTPUT LOAD (A)
0.250
0.6
FIGURE 4. EFFICIENCY vs LOAD (1MHz 3.3VIN PFM)
EFFICIENCY (%)
EFFICIENCY (%)
FIGURE 3. EFFICIENCY vs LOAD (1MHz 3.3VIN PWM)
POWER DISSIPATION (W)
0.4
OUTPUT LOAD (A)
OUTPUT LOAD (A)
1.5VOUT
2.5VOUT
1.8VOUT
1.2VOUT
30
1.8VOUT
0.25
70
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
OUTPUT LOAD (A)
FIGURE 7. POWER DISSIPATION vs LOAD (1MHz, VOUT = 1.8V)
FN6616 Rev 2.00
December 1, 2011
140
120
100
80
PWM MODE
60
40
20
0
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
VIN (V)
FIGURE 8. POWER DISSIPATION WITH NO LOAD vs VIN (PWM
VOUT = 1.8V)
Page 7 of 17
ISL8012
Typical Operating Performance
0.50
1.24
0.45
1.23
OUTPUT VOLTAGE (V)
POWER DISSIPATION (mW)
(Unless otherwise noted, operating conditions are: TA = +25°C, VVIN = 2.5V to 5.5V,
EN = VIN, MODE = 0V, L = 2.2µH, C1 = 2x10µF, C2 = 2x10µF, IOUT = 0A to 2A). (Continued)
0.40
0.35
0.30
0.25
PFM
0.20
0.15
0.10
2.0
2.5
3.0
3.5
4.0
VIN (V)
4.5
5.0
5.5
1.19
1.18
OUTPUT VOLTAGE (V)
1.53
3.3VIN PWM
5VIN PWM
1.51
1.50
1.47
0.00
0.25
5VIN PFM
0.50
0.75
0.25
0.50
1.00
1.25
1.50
1.75
1.75
2.00
3.3VIN PWM
1.79
1.78 3.3VIN PFM
1.77
5VIN PFM
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
OUTPUT LOAD (A)
FIGURE 12. VOUT REGULATION vs LOAD (1MHz, VOUT = 1.8V)
3.36
2.57
3.35
5VIN PWM
2.55
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
1.50
5VIN PWM
1.80
1.75
0.00
2.00
2.59
2.53
2.51
2.49
2.43
0.00
1.25
1.76
FIGURE 11. VOUT REGULATION vs LOAD (1MHz, VOUT = 1.5V)
2.45
1.00
1.81
OUTPUT LOAD (A)
2.47
0.75
FIGURE 10. VOUT REGULATION vs LOAD (1MHz, VOUT = 1.2V)
1.82
3.3VIN PFM
5VIN PFM
OUTPUT LOAD (A)
1.54
1.48
3.3VIN PFM
1.17
1.83
1.49
3.3VIN PWM
1.20
1.55
1.52
5VIN PWM
1.21
1.16
0.00
6.0
FIGURE 9. POWER DISSIPATION WITH NO LOAD vs VIN
(PFM VOUT = 1.8V)
OUTPUT VOLTAGE (V)
1.22
3.3VIN PWM
5VIN PFM
3.3VIN PFM
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
FIGURE 13. VOUT REGULATION vs LOAD (1MHz, VOUT = 2.5V)
FN6616 Rev 2.00
December 1, 2011
4.5VIN PWM
3.34
5VIN PWM
3.33
3.32
3.31
3.30
3.29
OUTPUT LOAD (A)
5VIN PFM
3.28
0.00
4.5VIN PFM
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
OUTPUT LOAD (A)
FIGURE 14. VOUT REGULATION vs LOAD (1MHz, VOUT = 3.3V)
Page 8 of 17
ISL8012
Typical Operating Performance
(Unless otherwise noted, operating conditions are: TA = +25°C, VVIN = 2.5V to 5.5V,
EN = VIN, MODE = 0V, L = 2.2µH, C1 = 2x10µF, C2 = 2x10µF, IOUT = 0A to 2A). (Continued)
LX 2V/DIV
LX 2V/DIV
VOUT RIPPLE
20mV/DIV
VOUT RIPPLE
20mV/DIV
IL 0.5A/DIV
IL 0.5A/DIV
FIGURE 15. STEADY STATE OPERATION AT NO LOAD (PWM),
(1µs/DIV)
FIGURE 16. STEADY STATE OPERATION AT NO LOAD (PFM),
(1µs/DIV)
LX 2V/DIV
LX 2V/DIV
VOUT RIPPLE
50mV/DIV
IL 0.5A/DIV
VOUT RIPPLE
20mV/DIV
FIGURE 17. STEADY STATE OPERATION WITH FULL LOAD,
(5µs/DIV)
IL 0.5A/DIV
FIGURE 18. MODE TRANSITION CCM TO DCM, (5µs/DIV)
VOUT RIPPLE
50mV/DIV
LX 2V/DIV
VOUT RIPPLE
50mV/DIV
IL 1A/DIV
IL 0.5A/DIV
FIGURE 19. MODE TRANSITION DCM TO CCM, (50µs/DIV)
FN6616 Rev 2.00
December 1, 2011
FIGURE 20. LOAD TRANSIENT (PWM), (50µs/DIV)
Page 9 of 17
ISL8012
Typical Operating Performance
(Unless otherwise noted, operating conditions are: TA = +25°C, VVIN = 2.5V to 5.5V,
EN = VIN, MODE = 0V, L = 2.2µH, C1 = 2x10µF, C2 = 2x10µF, IOUT = 0A to 2A). (Continued)
LX 2V/DIV
EN 5V/DIV
VOUT
0.5V/DIV
VOUT RIPPLE
50mV/DIV
IL 0.5A/DIV
IL 1A/DIV
PG 5V/DIV
FIGURE 21. LOAD TRANSIENT (PFM), (500µs/DIV)
FIGURE 22. SOFT-START WITH NO LOAD (PWM), (500µs/DIV)
EN 2V/DIV
EN 2V/DIV
VOUT
0.5V/DIV
VOUT
0.5V/DIV
IL 0.5A/DIV
IL 0.5A/DIV
PG 5V/DIV
PG 5V/DIV
FIGURE 23. SOFT-START AT NO LOAD (PFM), (500µs/DIV)
FIGURE 24. SOFT-START WITH PRE-BIASED 1V, (500µs/DIV)
EN 2V/DIV
EN 5V/DIV
VOUT
0.5V/DIV
VOUT
0.5V/DIV
IL 1A/DIV
IL 1A/DIV
PG 5V/DIV
PG 5V/DIV
FIGURE 25. SOFT-START AT FULL LOAD, (2ms/DIV)
FN6616 Rev 2.00
December 1, 2011
FIGURE 26. SOFT-DISCHARGE SHUTDOWN, (2ms/DIV)
Page 10 of 17
ISL8012
Typical Operating Performance
(Unless otherwise noted, operating conditions are: TA = +25°C, VVIN = 2.5V to 5.5V,
EN = VIN, MODE = 0V, L = 2.2µH, C1 = 2x10µF, C2 = 2x10µF, IOUT = 0A to 2A). (Continued)
RSI 2V/DIV
RSI 2V/DIV
VOUT RIPPLE
20mV/DIV
VOUT RIPPLE
20mV/DIV
PG 2V/DIV
PG 2V/DIV
FIGURE 27. RSI RESET, (200µs/DIV)
FIGURE 28. RSI RESET (ZOOM OUT), (200µs/DIV)
IL 2A/DIV
IL 2A/DIV
VOUT
0.5V/DIV
VOUT
1V/DIV
LX 2V/DIV
PHASE 2V/DIV
PG 5V/DIV
PG 5V/DIV
FIGURE 29. OUTPUT SHORT CIRCUIT, (500µs/DIV)
FIGURE 30. OUTPUT SHORT CIRCUIT RECOVERY, (500µs/DIV)
OUTPUT CURRENT LIMIT (A)
3.2
5.5VIN
3.1
3.0
2.9
2.8
2.7
3.3VIN
2.6
2.5
2.4
-50
-25
0
25
50
75
100
TEMPERATURE (°C)
FIGURE 31. OUTPUT CURRENT LIMIT vs TEMPERATURE
FN6616 Rev 2.00
December 1, 2011
Page 11 of 17
ISL8012
Theory of Operation
The ISL8012 is a step-down switching regulator optimized for
battery-powered handheld applications. The regulator operates at
1MHz fixed switching frequency under heavy load conditions to
allow smaller external inductors and capacitors to be used for
minimal printed-circuit board (PCB) area. At light load, the regulator
reduces the switching frequency (unless forced to the fixed
frequency) to minimize the switching loss and to maximize the
battery life. The quiescent current when the output is not loaded is
typically only 40µA. The supply current is typically only 0.1µA when
the regulator is shut down.
VEAMP
VCSA
DUTY
CYCLE
IL
VOUT
PWM Control Scheme
Pulling the MODE pin LOW (
