DATASHEET
ISL8026, ISL8026A
FN8736
Rev 2.00
October 28, 2016
Compact Synchronous Buck Regulators
Features
The ISL8026, ISL8026A are highly efficient, monolithic,
synchronous step-down DC/DC converters that can deliver 6A of
continuous output current from a 2.5V to 5.5V input supply. The
devices use current mode control architecture to deliver a very low
duty cycle operation at high frequency with fast transient
response and excellent loop stability.
• 2.5V to 5.5V input voltage range
• Very low ON-resistance FETs - P-channel 36mΩ and
N-channel 13mΩ typical values
• High efficiency synchronous buck regulator with up to 95%
efficiency
The ISL8026, ISL8026A integrate a very low ON-resistance
P-channel (36mΩ) high-side FET and N-channel (13mΩ)
low-side FET to maximize efficiency and minimize external
component count. The 100% duty-cycle operation allows less
than 180mV dropout voltage at 6A output current. The
operation frequency of the Pulse-width Modulator (PWM) is
adjustable from 500kHz to 4MHz. The default switching
frequency, which is set by connecting the FS pin high, is 1MHz
for the ISL8026 and 2MHz for the ISL8026A.
• 1.0% reference accuracy over load/line/temperature (-40°C
to +85°C)
• 1.5% reference accuracy over load/line/temperature (-40°C
to +125°C)
• Internal soft-start: 1ms or adjustable
• Soft-stop output discharge during disable
• Adjustable frequency from 500kHz to 4MHz - default at
1MHz (ISL8026) or 2MHz (ISL8026A)
The ISL8026, ISL8026A can be configured for discontinuous or
forced continuous operation at light load. Forced continuous
operation reduces noise and RF interference, while
discontinuous mode provides higher efficiency by reducing
switching losses at light loads.
• External synchronization up to 4MHz
• Over-temperature, overcurrent, overvoltage and negative
overcurrent protection
Fault protection is provided by internal hiccup mode current
limiting during short-circuit and overcurrent conditions. Other
protection, such as overvoltage and over-temperature, are also
integrated into the device. A power-good output voltage
monitor indicates when the output is in regulation.
Applications
The ISL8026, ISL8026A offer a 1ms Power-Good (PG) timer at
power-up. When in shutdown, the ISL8026, ISL8026A
discharge the output capacitor through an internal soft-stop
switch. Other features include internal fixed or adjustable
soft-start and internal/external compensation.
• Li-ion battery powered devices
The ISL8026, ISL8026A are offered in a space saving 16 Ld
3x3 Pb-free TQFN package with an exposed pad for improved
thermal performance and 0.8mm maximum height. The
complete converter occupies less than 142mm2.
• Industrial PCs
13
PHASE
• Routers and switchers
• Portable instruments
• Test and measurement systems
Related Literature
• UG033, “ISL8026xEVAL3Z Evaluation Board User Guide”
100
VOUT
PG
PGND/
SGND
SYNC
R2
200k :
C3*
22pF
R3
100k :
FB
17
5
EN
*C3 IS OPTIONAL. IT IS
RECOMMENDED TO PUT A
PLACEHOLDER FOR IT AND CHECK
LOOP ANALYSIS BEFORE USE.
VO
R 2 = R 3 ------------ – 1
VFB
80
3.3VOUT PWM
70
60
50
40
(EQ. 1)
FIGURE 1. TYPICAL APPLICATION CIRCUIT CONFIGURATION (INTERNAL
COMPENSATION OPTION)
FN8736 Rev 2.00
October 28, 2016
3.3VOUT PFM
90
EFFICIENCY (%)
14
PHASE
15
PGND
EN
4
• Video processor/SOC power
PAD
3
• μC/µP, FPGA and DSP power
GND
VIN
COMP
2
8
R1
100k:
+1.8V/6A
PGND
ISL8026
SS
C1
2 x 22μF
VIN
7
PG
1
FS
GND
+2.5V …+5.5V
6
VIN
PHASE
VIN
16
L1
1.0μH
C2
2 x 22μF
• DC/DC POL modules
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
FIGURE 2. EFFICIENCY vs LOAD 1MHz 5VIN
Page 1 of 23
ISL8026, ISL8026A
Table of Contents
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Typical Operating Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PWM Control Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SKIP Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Frequency Adjust . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Negative Current Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UVLO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soft Start-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Discharge Mode (Soft-Stop) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power MOSFETs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100% Duty Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Derating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
17
17
18
18
18
18
18
18
18
18
18
18
18
19
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Inductor and Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loop Compensation Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
19
19
19
19
PCB Layout Recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
FN8736 Rev 2.00
October 28, 2016
Page 2 of 23
ISL8026, ISL8026A
Pin Configuration
VIN
PHASE
PHASE
PHASE
ISL8026, ISL8026A
(16 LD TQFN)
TOP VIEW
16
15
14
13
VIN 1
12
PGND
11
PGND
PG 3
10
PGND/SGND
SYNC 4
9
FB
VIN 2
6
7
FS
SS
8
COMP
5
EN
EPAD
Pin Descriptions
PIN NUMBER
SYMBOL
DESCRIPTION
1, 2, 16
VIN
Input supply voltage. Place a minimum of two 22µF ceramic capacitors from VIN to PGND as close as possible to the IC
for decoupling.
3
PG
Power-good is an open-drain output. Use a 10kΩ to 100kΩ pull-up resistor connected between VIN and PG. At power-up or
EN HI, PG rising edge is delayed by 1ms once the output voltage reaches regulation.
4
SYNC
5
EN
Regulator enable pin. Enable the output when driven high. Shut down the chip and discharge output capacitor when driven
low.
6
FS
This pin sets the oscillator switching frequency using a resistor, RFS, from the FS pin to GND. The frequency of operation
may be programmed between 500kHz to 4MHz. The default frequency is 1MHz (ISL8026), 2MHz (ISL8026A) if FS is
connected to VIN.
7
SS
SS is used to adjust the soft-start time. Connect to SGND for internal 1ms rise time. Connect a capacitor from SS to SGND to
adjust the soft-start time. Do not use more than 33nF per IC.
8, 9
COMP, FB
10
Mode Selection pin. Connect to logic high or input voltage VIN for PWM mode. Connect to logic low or ground for PFM
mode. Connect to an external function generator for synchronization with the positive edge trigger. There is an internal
1MΩ pull-down resistor to prevent an undefined logic state in case the SYNC pin is floating.
The feedback network of the regulator, FB, is the negative input to the transconductance error amplifier. The output
voltage is set by an external resistor divider connected to FB. With a properly selected divider, the output voltage can be
set to any voltage between the power rail (reduced by converter losses) and the 0.6V reference.
COMP is the output of the amplifier if COMP is not tied to VIN. Otherwise, COMP is disconnected through a MOSFET for
internal compensation. Must connect COMP to VIN in internal compensation mode to meet a typical application.
Additional external networks across COMP and SGND might be required to improve the loop compensation of the amplifier
operation.
In addition, the regulator power-good and undervoltage protection circuitry use FB to monitor the regulator output voltage.
PGND/SGND Power/signal ground
11, 12
PGND
Power ground
13, 14, 15
PHASE
Switching node connections. Connect to one terminal of the inductor. This pin is discharged by a 100Ω resistor when the
device is disabled. See “Block Diagram” on page 5 for more detail.
Exposed Pad
-
The exposed pad must be connected to the SGND pin for proper electrical performance. Place as many vias as possible
under the pad connecting to the SGND plane for optimal thermal performance.
FN8736 Rev 2.00
October 28, 2016
Page 3 of 23
ISL8026, ISL8026A
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
OPERATION FREQUENCY
(MHz)
TEMP. RANGE
(°C)
PACKAGE
(RoHS COMPLIANT)
PKG.
DWG. #
ISL8026IRTAJZ
026A
1
-40 to +85
16 Ld 3x3 TQFN
L16.3x3D
ISL8026AIRTAJZ
26AA
2
-40 to +85
16 Ld 3x3 TQFN
L16.3x3D
ISL8026FRTAJZ
026F
1
-40 to +125
16 Ld 3x3 TQFN
L16.3x3D
ISL8026AFRTAJZ
026AF
2
-40 to +125
16 Ld 3x3 TQFN
L16.3x3D
ISL8026EVAL3Z
Evaluation board for ISL8026
ISL8026AEVAL3Z
Evaluation board for ISL8026A
NOTES:
1. Add “-T” suffix for 6k unit or “-T7A” suffix for 250 unit Tape and Reel options. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL8026, ISL8026A. For more information on MSL please see techbrief
TB363.
TABLE 1. SUMMARY OF KEY DIFFERENCES
PART
NUMBER
IOUT (MAX)
(A)
ISL8026
6
ISL8026A
fSW RANGE
(MHz)
VIN RANGE
(V)
VOUT RANGE
(V)
PART SIZE
(mm)
2.5 to 5.5
0.6 to 5.5
3x3
Programmable 0.5MHz to 4MHz
Programmable 1MHz to 4MHz
TABLE 2. ISL8026 COMPONENT SELECTION
VOUT
0.8V
1.2V
1.5V
1.8V
2.5V
3.3V
3.6V
C1
2 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
C2
4 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
C3
22pF
22pF
22pF
22pF
22pF
22pF
22pF
L1
0.47~1µH
0.47~1µH
0.47~1µH
0.68~1.5µH
0.68~1.5µH
1~2.2µH
1~2.2µH
R2
33kΩ
100kΩ
150kΩ
200kΩ
316kΩ
450kΩ
500kΩ
R3
100kΩ
100kΩ
100kΩ
100kΩ
100kΩ
100kΩ
100kΩ
TABLE 3. ISL8026A COMPONENT SELECTION
VOUT
0.8V
1.2V
1.5V
1.8V
2.5V
3.3V
3.6V
C1
22µF
22µF
22µF
22µF
22µF
22µF
22µF
C2
3 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
2 x 22µF
C3
22pF
22pF
22pF
22pF
22pF
22pF
22pF
L1
0.22~0.47µH
0.22~0.47µH
0.22~0.47µH
0.33~0.68µH
0.33~0.68µH
0.47~1µH
0.47~1µH
R2
33kΩ
100kΩ
150kΩ
200kΩ
316kΩ
450kΩ
500kΩ
R3
100kΩ
100kΩ
100kΩ
100kΩ
100kΩ
100kΩ
100kΩ
FN8736 Rev 2.00
October 28, 2016
Page 4 of 23
ISL8026, ISL8026A
Block Diagram
COMP
SS
SHUTDOWN
FS
SYNC
55pF
Soft
SOFTSTART
SHUTDOWN
100kΩ
+
BANDGAP VREF
+
EN
+
COMP
-
EAMP
-
VIN
OSCILLATOR
PWM/PFM
LOGIC
CONTROLLER
PROTECTION
HS DRIVER
3pF
+
P
PHASE
LS
DRIVER
N
PGND
FB
6kΩ
SLOPE
Slope
COMP
0.8V
+
CSA
-
+
OV
0.85*VREF
PG
+
UV
+
OCP
-
+
SKIP
-
ISET
THRESHOLD
1ms
DELAY
NEG CURRENT
SENSING
SGND
ZERO-CROSS
SENSING
0.5V
SCP
+
100Ω
SHUTDOWN
FIGURE 3. FUNCTIONAL BLOCK DIAGRAM
FN8736 Rev 2.00
October 28, 2016
Page 5 of 23
ISL8026, ISL8026A
Absolute Maximum Ratings
Thermal Information
(Reference to GND)
Thermal Resistance
JA (°C/W) JC (°C/W)
16 LD TQFN Package (Notes 4, 5) . . . . . . .
47
6.5
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-55°C to +125°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.8V (DC) or 7V (20ms)
EN, FS, PG, SYNC, VFB . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VIN + 0.3V
PHASE . . . . . . . . . . . . -1.5V (100ns)/-0.3V (DC) to 6.5V (DC) or 7V (20ms)
COMP, SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.7V
ESD Ratings
Human Body Model (Tested per JESD22-A114) . . . . . . . . . . . . . . . . . 3kV
Charged Device Model (Tested per JESD22-C101E). . . . . . . . . . . . . . 2kV
Machine Model (Tested per JESD22-A115). . . . . . . . . . . . . . . . . . . . 200V
Latch-Up (Tested per JESD-78A; Class 2, Level A) . . . . . 100mA at +85°C
Recommended Operating Conditions
VIN Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5V to 5.5V
Load Current Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0A to 6A
Ambient Temperature Range (Industrial) . . . . . . . . . . . . . . -40°C to +85°C
Ambient Temperature Range (Full-Range Industrial) . . .-40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. JC, “case temperature” location is at the center of the exposed metal pad on the package underside.
Electrical Specifications Unless otherwise noted, all parameter limits are established across the recommended operating conditions
and are measured at the following conditions: VIN = 3.6V, EN = VIN, unless otherwise noted. Typical values are at TA = +25°C. Unless otherwise noted,
Boldface limits apply across the operating temperature range, -40°C to +125°C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNIT
2.3
2.5
V
INPUT SUPPLY
VIN Undervoltage Lockout Threshold
VUVLO
Rising, no load
Falling, no load
Quiescent Supply Current
Shutdown Supply Current
IVIN
ISD
2.10
2.25
V
SYNC = GND, no load at the output
50
µA
SYNC = GND, no load at the output and no switching
50
62
µA
SYNC = VIN, fSW = 1MHz, no load at the output (ISL8026)
9
16
mA
SYNC = VIN, fSW = 2MHz, no load at the output (ISL8026A)
16
23
mA
SYNC = GND, VIN = 5.5V, EN = low
5
8
µA
OUTPUT REGULATION
Reference Voltage
VFB Bias Current
VREF
IVFB
-40°C < TJ < +85°C
0.594
0.600
0.606
V
-40°C < TJ < +125°C
0.591
0.600
0.606
V
VFB = 0.75V
0.1
µA
Line Regulation
VIN = VO + 0.5V to 5.5V (minimal 2.5V)
0.2
%/V
Soft-Start Ramp Time Cycle
SS = SGND
1
ms
Soft-Start Charging Current
ISS
VSS = 0.1V
1.45
1.85
2.25
µA
OVERCURRENT PROTECTION
Current Limit Blanking Time
tOCON
17
Clock
pulses
Overcurrent and Auto Restart Period
tOCOFF
8
SS cycle
Positive Peak Current Limit
IPLIMIT
Peak Skip Limit
ISKIP
Zero Cross Threshold
Negative Current Limit
FN8736 Rev 2.00
October 28, 2016
6A application
6A application (See “Application Information” on page 19
for more detail)
7.5
9
11
A
1
1.3
1.8
A
300
mA
-1.5
A
-300
INLIMIT
-4.5
-3.0
Page 6 of 23
ISL8026, ISL8026A
Electrical Specifications Unless otherwise noted, all parameter limits are established across the recommended operating conditions
and are measured at the following conditions: VIN = 3.6V, EN = VIN, unless otherwise noted. Typical values are at TA = +25°C. Unless otherwise noted,
Boldface limits apply across the operating temperature range, -40°C to +125°C (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNIT
COMPENSATION
Error Amplifier Transconductance
Transresistance
Rt
Internal compensation
60
µA/V
External compensation
120
µA/V
6A application (test at 3.6V)
-40°C < TJ < +85°C
0.119
0.140
0.166
Ω
0.110
0.140
0.170
Ω
VIN = 5V, IO = 200mA
36
63
mΩ
VIN = 2.7V, IO = 200mA
52
89
mΩ
VIN = 5V, IO = 200mA
13
30
mΩ
VIN = 2.7V, IO = 200mA
17
36
mΩ
6A application (test at 3.6V)
-40°C < TJ < +125°C
PHASE
P-Channel MOSFET ON-Resistance
N-Channel MOSFET ON-Resistance
PHASE Maximum Duty Cycle
100
PHASE Minimum On-Time
SYNC = High
%
140
ns
OSCILLATOR
Nominal Switching Frequency
fSW
fSW = VIN, ISL8026A. -40°C < TJ < +85°C
1600
2000
2400
kHz
fSW = VIN, ISL8026A. -40°C < TJ < +125°C
1550
2000
2450
kHz
780
1000
1200
kHz
fSW = VIN, ISL8026
fSW with RS = 402kΩ
490
kHz
fSW with RS = 42.2kΩ
4200
kHz
SYNC Logic LOW to HIGH Transition Range
0.70
SYNC Hysteresis
SYNC Logic Input Leakage Current
0.75
0.80
V
0.15
VIN = 3.6V
3.6
V
5
µA
0.3
V
1
2
ms
0.01
0.10
µA
PG
Output Low Voltage
Delay Time (Rising Edge)
Time from VOUT reached regulation
PG Pin Leakage Current
PG = VIN
0.5
OVP PG Rising Threshold
0.80
UVP PG Rising Threshold
80
85
V
90
%
UVP PG Hysteresis
30
mV
PGOOD Delay Time (Falling Edge)
7.5
µs
EN
Logic Input Low
0.4
Logic Input High
V
0.9
V
EN Logic Input Leakage Current
Pulled up to 3.6V
0.1
1
µA
Thermal Shutdown
Temperature Rising
150
°C
Thermal Shutdown Hysteresis
Temperature Falling
25
°C
NOTE:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
FN8736 Rev 2.00
October 28, 2016
Page 7 of 23
ISL8026, ISL8026A
Typical Operating Performance
100
100
90
90
0.8VOUT
0.9VOUT
80
1.2VOUT
70
1.5VOUT
60
1.8VOUT
2.5VOUT
EFFICIENCY (%)
EFFICIENCY (%)
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = 5V, EN = VIN,
SYNC = VIN, L = 1.0µH, C1 = 22µF, C2 = 2 x 22µF, IOUT = 0A to 6A. Resistor load is used in the test.
0.8VOUT
1.2VOUT
70
1.5VOUT
60
0
40
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
0
FIGURE 4. EFFICIENCY vs LOAD (1MHz 3.3 VIN PWM)
100
90
90
3.3VOUT
80
2.5VOUT 1.8VOUT
70
1.2VOUT
1.5VOUT
60
EFFICIENCY (%)
EFFICIENCY (%)
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
FIGURE 5. EFFICIENCY vs LOAD (1MHz 3.3 VIN PFM)
100
3.3VOUT
80
2.5VOUT 1.8VOUT
70
1.5VOUT
40
0
60
40
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
OUTPUT LOAD (A)
FIGURE 6. EFFICIENCY vs LOAD (1MHz 5VIN PWM)
FIGURE 7. EFFICIENCY vs LOAD (1MHz 5VIN PFM)
100
100
90
90
0.8VOUT
80
0.9VOUT
1.2VOUT
70
1.5VOUT
60
1.8VOUT
2.5VOUT
50
EFFICIENCY (%)
EFFICIENCY (%)
1.2VOUT
50
50
40
1.8VOUT 2.5V
OUT
50
50
40
0.9VOUT
80
80 0.8VOUT
0.9VOUT
1.2VOUT
70
1.5VOUT
60
1.8VOUT
2.5VOUT
50
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
FIGURE 8. EFFICIENCY vs LOAD (2MHz 3.3VIN PWM)
FN8736 Rev 2.00
October 28, 2016
40
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
FIGURE 9. EFFICIENCY vs LOAD (2MHz 3.3VIN PFM)
Page 8 of 23
ISL8026, ISL8026A
Typical Operating Performance
100
100
90
90
80
3.3VOUT
70
2.5VOUT
1.8VOUT
60
1.2VOUT
0.9VOUT
1.5VOUT
EFFICIENCY (%)
EFFICIENCY (%)
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = 5V, EN = VIN,
SYNC = VIN, L = 1.0µH, C1 = 22µF, C2 = 2 x 22µF, IOUT = 0A to 6A. Resistor load is used in the test. (Continued)
0
2.5VOUT
1.2VOUT
0.9VOUT
1.5VOUT
0.912
5VIN PFM
0.807
3.3VIN PFM
0.804
5VIN PWM
0.801
0.798
0.795
0.789
OUTPUT VOLTAGE (V)
0.915
0.813
0.810
3.3VIN PWM
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
FIGURE 11. EFFICIENCY vs LOAD (2MHz 5VIN PFM)
0.816
0.792
5VIN PFM
0.909
0.906
3.3VIN PFM
0.903
5VIN PWM
0.900
0.897
0.894 3.3VIN PWM
0.891
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
OUTPUT LOAD (A)
FIGURE 12. VOUT REGULATION vs LOAD (1MHz, VOUT = 0.8V)
FIGURE 13. VOUT REGULATION vs LOAD (1MHz, VOUT = 0.9V)
1.219
1.525
1.214
1.209
5VIN PFM
1.204
1.199
1.194
1.189
3.3VIN PWM
5VIN PWM
3.3VIN PFM
1.515
5VIN PFM
1.510
5VIN PWM
1.505
1.500
1.495 3.3V PWM
IN
1.490
1.184
1.179
1.520
3.3VIN PFM
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
1.8VOUT
60
40
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
FIGURE 10. EFFICIENCY vs LOAD (2MHz 5VIN PWM)
OUTPUT VOLTAGE (V)
3.3VOUT
70
50
50
40
80
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
FIGURE 14. VOUT REGULATION vs LOAD (1MHz, VOUT = 1.2V)
FN8736 Rev 2.00
October 28, 2016
1.485
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
FIGURE 15. VOUT REGULATION vs LOAD (1MHz, VOUT = 1.5V)
Page 9 of 23
ISL8026, ISL8026A
Typical Operating Performance
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = 5V, EN = VIN,
SYNC = VIN, L = 1.0µH, C1 = 22µF, C2 = 2 x 22µF, IOUT = 0A to 6A. Resistor load is used in the test. (Continued)
1.825
2.510
2.505
3.3VIN PFM
1.815
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
1.820
5VIN PFM
1.810
5VIN PWM
1.805
1.800
1.795
1.790
1.785
3.3VIN PWM
0
3.3VIN PFM
2.500
5VIN PFM
2.495
5VIN PWM
2.490
2.485
2.480
2.475 3.3V PWM
IN
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
2.470
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
OUTPUT LOAD (A)
FIGURE 16. VOUT REGULATION vs LOAD (1MHz, VOUT = 1.8V)
FIGURE 17. VOUT REGULATION vs LOAD (1MHz, VOUT = 2.5V)
3.341
OUTPUT VOLTAGE (V)
3.333
3.325
5VIN PFM
3.317
3.309
3.301
5VIN PWM
3.293
3.285
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT LOAD (A)
FIGURE 18. VOUT REGULATION vs LOAD (1MHz, VOUT = 3.3V)
FN8736 Rev 2.00
October 28, 2016
Page 10 of 23
ISL8026, ISL8026A
Typical Operating Performance
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = 5V, EN = VIN,
SYNC = VIN, L = 1.0µH, C1 = 22µF, C2 = 2 x 22µF, IOUT = 0A to 6A. Resistor load is used in the test. (Continued)
PHASE 5V/DIV
PHASE 5V/DIV
VOUT 1V/DIV
VOUT 1V/DIV
VEN 5V/DIV
VEN 5V/DIV
PG 5V/DIV
PG 5V/DIV
1ms/DIV
1ms/DIV
FIGURE 19. START-UP AT NO LOAD (PFM)
FIGURE 20. START-UP AT NO LOAD (PWM)
PHASE 5V/DIV
PHASE 5V/DIV
VOUT 1V/DIV
VOUT 1V/DIV
VEN 5V/DIV
VEN 5V/DIV
PG 5V/DIV
PG 5V/DIV
500µs/DIV
FIGURE 21. SHUTDOWN AT NO LOAD (PFM)
500µs/DIV
FIGURE 22. SHUTDOWN AT NO LOAD (PWM)
PHASE 5V/DIV
PHASE 5V/DIV
VOUT 1V/DIV
VOUT 1V/DIV
VEN 5V/DIV
VEN 5V/DIV
PG 5V/DIV
PG 5V/DIV
500µs/DIV
500µs/DIV
FIGURE 23. START-UP AT 6A LOAD (PWM)
FIGURE 24. SHUTDOWN AT 6A LOAD (PWM)
FN8736 Rev 2.00
October 28, 2016
Page 11 of 23
ISL8026, ISL8026A
Typical Operating Performance
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = 5V, EN = VIN,
SYNC = VIN, L = 1.0µH, C1 = 22µF, C2 = 2 x 22µF, IOUT = 0A to 6A. Resistor load is used in the test. (Continued)
IOUT 2A/DIV
IOUT 2A/DIV
VOUT 1V/DIV
VOUT 1V/DIV
VEN 5V/DIV
VEN 5V/DIV
PG 5V/DIV
PG 5V/DIV
1ms/DIV
200µs/DIV
FIGURE 25. START-UP AT 6A LOAD (PFM)
FIGURE 26. SHUTDOWN AT 6A LOAD (PFM)
VEN 5V/DIV
VEN 5V/DIV
VOUT 1V/DIV
VOUT 1V/DIV
IL 2A/DIV
IL 2A/DIV
PG 5V/DIV
PG 5V/DIV
1ms/DIV
50µs/DIV
FIGURE 28. SHUTDOWN AT 3A LOAD (PWM)
FIGURE 27. START-UP AT 3A LOAD (PWM)
VEN 5V/DIV
VOUT 1V/DIV
IL 2A/DIV
PG 5V/DIV
VEN 5V/DIV
VOUT 1V/DIV
IL 2A/DIV
PG 5V/DIV
1ms/DIV
50µs/DIV
FIGURE 29. START-UP AT 3A LOAD (PFM)
FIGURE 30. SHUTDOWN AT 3A LOAD (PFM)
FN8736 Rev 2.00
October 28, 2016
Page 12 of 23
ISL8026, ISL8026A
Typical Operating Performance
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = 5V, EN = VIN,
SYNC = VIN, L = 1.0µH, C1 = 22µF, C2 = 2 x 22µF, IOUT = 0A to 6A. Resistor load is used in the test. (Continued)
IOUT 2A/DIV
IOUT 2A/DIV
VOUT 1V/DIV
VOUT 1V/DIV
VIN 5V/DIV
VIN 5V/DIV
PG 5V/DIV
PG 5V/DIV
1ms/DIV
1ms/DIV
FIGURE 31. START-UP VIN AT 6A LOAD (PFM)
FIGURE 32. START-UP VIN AT 6A LOAD (PWM)
IOUT 2A/DIV
IOUT 2A/DIV
VOUT 1V/DIV
VOUT 1V/DIV
VIN 5V/DIV
VIN 5V/DIV
PG 5V/DIV
PG 5V/DIV
1ms/DIV
1ms/DIV
FIGURE 33. SHUTDOWN VIN AT 6A LOAD (PFM)
FIGURE 34. SHUTDOWN VIN AT 6A LOAD (PWM)
PHASE 5V/DIV
PHASE 5V/DIV
VOUT 1V/DIV
VOUT 1V/DIV
VIN 5V/DIV
VIN 5V/DIV
PG 5V/DIV
PG 5V/DIV
1ms/DIV
FIGURE 35. START-UP VIN AT NO LOAD (PFM)
FN8736 Rev 2.00
October 28, 2016
1ms/DIV
FIGURE 36. START-UP VIN AT NO LOAD (PWM)
Page 13 of 23
ISL8026, ISL8026A
Typical Operating Performance
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = 5V, EN = VIN,
SYNC = VIN, L = 1.0µH, C1 = 22µF, C2 = 2 x 22µF, IOUT = 0A to 6A. Resistor load is used in the test. (Continued)
PHASE 5V/DIV
PHASE 5V/DIV
VOUT 1V/DIV
VOUT 1V/DIV
VIN 5V/DIV
VIN 5V/DIV
PG 5V/DIV
PG 5V/DIV
2ms/DIV
2ms/DIV
FIGURE 37. SHUTDOWN VIN AT NO LOAD (PFM)
FIGURE 38. SHUTDOWN VIN AT NO LOAD (PWM)
PHASE 1V/DIV
PHASE 1V/DIV
10ns/DIV
10ns/DIV
FIGURE 39. JITTER AT NO LOAD PWM
FIGURE 40. JITTER AT FULL LOAD PWM
PHASE 5V/DIV
PHASE 5V/DIV
VOUT RIPPLE 20mV/DIV
VOUT RIPPLE 20mV/DIV
IL 1A/DIV
IL 1A/DIV
500ns/DIV
20ms/DIV
FIGURE 41. STEADY STATE AT NO LOAD PWM
FIGURE 42. STEADY STATE AT NO LOAD PFM
FN8736 Rev 2.00
October 28, 2016
Page 14 of 23
ISL8026, ISL8026A
Typical Operating Performance
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = 5V, EN = VIN,
SYNC = VIN, L = 1.0µH, C1 = 22µF, C2 = 2 x 22µF, IOUT = 0A to 6A. Resistor load is used in the test. (Continued)
PHASE 5V/DIV
PHASE 5V/DIV
IL 2A/DIV
IL 1A/DIV
VOUT RIPPLE 20mV/DIV
VOUT RIPPLE 20mV/DIV
500ns/DIV
500ns/DIV
FIGURE 44. STEADY STATE AT 3A PFM
FIGURE 43. STEADY STATE AT 6A PWM
VOUT RIPPLE 100mV/DIV
VOUT RIPPLE 50mV/DIV
IL 2A/DIV
IL 2A/DIV
200µs/DIV
200µs/DIV
FIGURE 45. LOAD TRANSIENT (PWM)
FIGURE 46. LOAD TRANSIENT (PFM)
PHASE 5V/DIV
VOUT 1V/DIV
VOUT 1V/DIV
IL 5A/DIV
IL 5A/DIV
PG 5V/DIV
PG 5V/DIV
5µs/DIV
FIGURE 47. OUTPUT SHORT-CIRCUIT
FN8736 Rev 2.00
October 28, 2016
20µs/DIV
FIGURE 48. OVERCURRENT PROTECTION
Page 15 of 23
ISL8026, ISL8026A
Typical Operating Performance
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = 5V, EN = VIN,
SYNC = VIN, L = 1.0µH, C1 = 22µF, C2 = 2 x 22µF, IOUT = 0A to 6A. Resistor load is used in the test. (Continued)
PHASE 5V/DIV
PHASE1 5V/DIV
BACK TO PFM AT 360mA
600mA MODE TRANSITION,
COMPLETELY ENTER TO PWM AT 640mA
VOUT1 RIPPLE 20mV/DIV
VOUT1 RIPPLE 20mV/DIV
IL 500mA/DIV
IL 500mA/DIV
1µs/DIV
1µs/DIV
FIGURE 49. PFM TO PWM TRANSITION
FIGURE 50. PWM TO PFM TRANSITION
PHASE 5V/DIV
VOUT 2V/DIV
IL 2A/DIV
VOUT 1V/DIV
PG 2V/DIV
PG 5V/DIV
20µs/DIV
2ms/DIV
FIGURE 51. OVERVOLTAGE PROTECTION
FIGURE 52. OVER-TEMPERATURE PROTECTION
FN8736 Rev 2.00
October 28, 2016
Page 16 of 23
ISL8026, ISL8026A
Theory of Operation
with the 55pF and 100kΩ RC network. The maximum EAMP
voltage output is precisely clamped to 1.6V.
The ISL8026, ISL8026A are step-down switching regulators
optimized for battery-powered applications. The regulators operate
at a 1MHz or 2MHz fixed default switching frequency for high
efficiency and allow smaller form factor when FS is connected to
VIN. By connecting a resistor from FS to SGND, the operational
frequency adjustable range is 500kHz to 4MHz. At light load, the
regulator reduces the switching frequency, unless forced to the fixed
frequency, to minimize the switching loss and to maximize the
battery life. The quiescent current when the output is not loaded is
typically only 50µA. The supply current is typically only 5µA when
the regulator is shut down.
VEAMP
VCSA
DUTY
CYCLE
IL
VOUT
PWM Control Scheme
Pulling the SYNC pin HI (>0.8V) forces the converter into PWM
mode, regardless of output current. The ISL8026, ISL8026A
employs the current-mode Pulse-width Modulation (PWM) control
scheme for fast transient response and pulse-by-pulse current
limiting. Figure 3 on page 5 shows the functional block diagram.
The current loop consists of the oscillator, the PWM comparator,
current sensing circuit and the slope compensation for the current
loop stability. The slope compensation is 440mV/Ts, which changes
with frequency. The gain for the current sensing circuit is typically
140mV/A. The control reference for the current loops comes from
the Error Amplifier's (EAMP) output.
FIGURE 53. PWM OPERATION WAVEFORMS
SKIP Mode
Pulling the SYNC pin LOW (
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