ISL8200MIRZ-T

DATASHEET NO T RE C OMMEND ED FOR N R E CO M M EW E ND E D R EPLACEM DESIGNS ENT PAR ISL8200A T M ISL8200M FN6727 Rev 2.00 June 9, 2015 Complete Current Share 10A DC/DC Power Module The ISL8200M is a simple and easy to use high power, current-sharing DC\DC power module for Datacom\Telecom\ FPGA power hungry applications. All that is needed is the ISL8200M, a few passive components and one VOUT setting resistor to have a complete 10A design ready for market. Features The ease of use virtually eliminates the design and manufacturing risks while dramatically improving time to market. • Programmable phase shift (1- to 6-phase) • Complete switch mode power supply in one package • Patented current share architecture reduces layout sensitivity when modules are paralleled • Extremely low profile (2.2mm height) • Input voltage range +4.5V to +20V at 10A, current share up to 60A Need more output current? Parallel up to six ISL8200M modules to scale up to a 60A solution (see Figure 6 on page 10). • A single resistor sets VOUT from +0.6V to +6V The simplicity of the ISL8200M is in its "Off The Shelf", unassisted implementation versus a discrete implementation. Patented current sharing in multi-phase operation greatly reduces ripple currents, BOM cost and complexity. For example, parallel 2 for 20A and up to 6 for 60A. The output voltage can be precisely regulated to as low as 0.6V with ±1% output voltage regulation over line, load, and temperature variations. The ISL8200M’s thermally enhanced, compact QFN package, operates at full load and over temperature, without requiring forced air cooling. It's so thin it can even fit on the back side of the PCB. Easy access to all pins with few external components, reduces the PCB design to a component layer and a simple ground layer. • Output overvoltage, overcurrent and over-temperature protection and undervoltage indication • RoHS compliant Applications • Servers, Telecom and Datacom applications • Industrial and medical equipment • Point of load regulation Related Literature • AN1655 ISL8200MEVAL1PHZ Evaluation Board User’s Guide • iSim Model - (See Product Information page at www.intersil.com/products/ISL8200M • AN1786 Reducing the Switching Frequency of the ISL8200M and ISL8200AM Power Modules Complete Functional Schematic ISL8200M POWER MODULE RSET 330F VOUT VIN PVIN 2.2mm VOUT_SET EN VSEN_REM- ISHARE PGND FF ISET R2 VEN VOUT RANGE 0.6V TO 6.0V PVCC 22F R1 VIN RANGE 4.5V TO 20V ISL8200M Package PGND1 10F 5k 15 m m 15 mm NOTE: For input voltage higher than 4.5V, VIN can be tied to PVIN directly (see Figure 22 for details). FIGURE 1. COMPLETE 10A DESIGN, JUST SELECT RSET FOR THE DESIRED VOUT FN6727 Rev 2.00 June 9, 2015 FIGURE 2. THE 2.2mm HEIGHT IS IDEAL FOR THE BACKSIDE OF PCBS WHEN SPACE AND HEIGHT IS A PREMIUM Page 1 of 25 ISL8200M Ordering Information PART NUMBER (Notes 1, 2, 3) TEMP. RANGE (°C) PART MARKING ISL8200MIRZ ISL8200M ISL8200MEVAL1PHZ Evaluation Board PACKAGE (RoHS Compliant) -40 to +85 PKG. DWG. # 23 Ld QFN L23.15x15 NOTES: 1. Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil plastic packaged products employ special material sets, molding compounds and 100% matte tin plate plus anneal (e3) termination finish, These products do contain Pb but they are RoHs compliant by exemption 5 (Pb in piezoelectric elements). These Intersil RoHs compliant products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL8200M. For more information on MSL please see techbrief TB363. Pinout Internal Circuit VCC PVCC PVIN 21 14 17 RCC CF1 VIN 13 EN 12 FF 11 ISL8200M Module 5 CF2 BOOT1 LDO UGATE1 CBOOT1 Q1 LOUT1 PHASE1 19 VOUT 18 PGND 16 PHASE 20 OCSET 1 VOUT_SET 2 VSEN_REM- 330nH VCC RPG PGOOD 22 LGATE1 10k Q2 Internal PGOOD VCC RCLK ISEN1A 10k CLKOUT 8 PH_CNTRL 9 VCC RPHC 10k RISEN-IN CONTROLLER 2.2k ISEN1B ISET 5 CF3 ISHARE COMP ZCOMP1 6 CF4 ISHARE_BUS 10 ISFETDRV 3 FSYNC_IN 7 FB1 VMON1 ZCOMP2 VSEN1+ RFS VSEN1- 59k FN6727 Rev 2.00 June 9, 2015 15 4 PGND1 PGND1 CVSEN RCSR ROS1 2.2k Page 2 of 25 ISL8200M Pin Configuration (1) VOUT_SET (2) VSEN_REM- (3) ISFETDRV (4) PGND1 (5) ISET (6) ISHARE (7) FSYNC_IN (8) CLKOUT (9) PH_CNTRL (10) ISHARE_BUS (11) FF ISL8200M (23 LD QFN) TOP VIEW (12) EN (23) N.C. (13) VIN (22) PGOOD (21) VCC (14) PVCC (20) OCSET (15) PGND1 (16) PHASE PD1 (17) PVIN PD2 PD3 (18) PGND PD4 (19) VOUT Pin Descriptions PIN # PIN NAME 1 VOUT_SET 2 VSEN_REM- 3 ISFETDRV 4, 15 PGND1 Normal Ground - All voltage levels are referenced to this pad. This pad provides a return path for the low side MOSFET drives and internal power circuitries as well as all analog signals. PGND and PGND1 should be connected together with a ground plane. 5 ISET Analog Current Output - This pin, along with the ISHARE pin, is used for multiple ISL8200M current sharing purposes. This pin sources a 15µA offset current plus Channel 1’s average current. The voltage (VISET) set by an external resistor (RISET) represents the average current level of the local active module. For full-scale current, RISET should be ~10kΩ. The output current range is 15µA to 123µA typ. In the single module configuration, this pin can be tied to the ISHARE pin. FN6727 Rev 2.00 June 9, 2015 PIN DESCRIPTION Analog Voltage Input - Used with VOUT to program the regulator output voltage. The typical input impedance of VOUT_SET with respect to VSEN_REM- is 600kΩ. The typical input voltage is 0.6V. Analog Voltage Input - This pin is the negative input of standard unity gain operational amplifier for differential remote sense for the regulator, and should connect to the negative rail of the load/processor. This pin can be used for VOUT trimming by connecting a resistor from this pin to the VOUT_SET pin. Digital Output - This pin is used to drive an optional NFET, which will connect ISHARE with the system ISHARE bus upon completing a pre-bias startup. The output voltage range is 0V to 5V. Page 3 of 25 ISL8200M Pin Descriptions (Continued) PIN # PIN NAME PIN DESCRIPTION 6 ISHARE Analog Current Output - Cascaded system level overcurrent shutdown pin. This pin is used where you have multiple modules configured for current sharing and is used with a common current share bus. The bus sums each of the modules' average current contribution to the load to protect for an overcurrent condition at the load. The pin sources 15µA plus average module's output current. The shared bus voltage (VISHARE) is developed across an external resistor (RISHARE). VISHARE represents the average current of all active channel(s) that are connected together. The ISHARE bus voltage is compared with each module's internal reference voltage set by each module's RISET resistor. This will generate an individual current share error signal in each cascaded controller. The share bus impedance RISHARE should be set as RISET/NCTRL, RISET divided by the number of active current sharing controllers. The output current from this pin generates a voltage across the external resistor. This voltage, VISHARE, is compared to an internal 1.2V threshold for average overcurrent protection. For full-scale current, RISHARE should be ~10kΩ. Typically 10kΩ is used for RSHARE and RSET. The output current range is 15µA to 123µA typ. 7 FSYNC_IN Analog Input Control Pin - An optional external resistor (RFS-ext) connected to this pin and ground will increase the oscillator switching frequency. It has an internal 59kΩ resistor for a default frequency of 700kHz. The internal oscillator will lock to an external frequency source when connected to a square waveform. The external source is typically the CLKOUT signal from another ISL8200M or an external clock. The internal oscillator synchronizes with the leading positive edge of the input signal. The input voltage range from an external source is a 0V to 5V square wave. When not synchronized to an external clock, a 100pF capacitor between FSYNC_IN and PGND1 is recommended. 8 CLKOUT Digital Voltage Output - This pin provides a clock signal to synchronize with other ISL8200M(s). When there is more than one ISL8200M in the system, the two independent regulators can be programmed via PH_CNTRL for different degrees of phase delay. 9 PH_CNTRL Analog Input - The voltage level on this pin is used to program the phase shift of the CLKOUT clock signal to synchronize with other module(s). 10 ISHARE_BUS Open pin until first PWM pulse is generated. Then, via an internal FET, this pin connects the module’s ISHARE to the system’s ISHARE bus after pre-bias is complete and soft-start is initiated. 11 FF Analog Voltage Input - The voltage on this pin is fed into the controller, adjusting the sawtooth amplitude to generate the feed-forward function. The input voltage range is 0.8V to VCC. Typically, FF is connected to EN. 12 EN This is a double function pin: Analog Input Voltage - The input voltage to this pin is compared with a precision 0.8V reference and enables the digital soft-start. The input voltage range is 0V to VCC or VIN through a pull-up resistor maintaining a typical current of 5mA. Analog Voltage Output - This pin can be used as a voltage monitor for input bus undervoltage lockout. The hysteresis levels of the lockout can be programmed via this pin using a resistor divider network. Furthermore, during fault conditions (such as overvoltage, overcurrent, and over-temperature), this pin is used to communicate the information to other cascaded modules by pulling low the wired OR as it is an Open Drain. The output voltage range is 0V to VCC. 13 VIN Analog Voltage Input - This pin should be tied directly to the input rail when using the internal linear regulator. It provides power to the internal linear drive circuitry. When used with an external 5V supply, this pin should be tied directly to PVCC. The internal linear device is protected against the reversed bias generated by the remaining charge of the decoupling capacitor at VCC when losing the input rail. The input voltage range is 4.5V to 20V. 14 PVCC Analog Output - This pin is the output of the internal series linear regulator. It provides the bias for both low-side and high-side drives. Its operational voltage range is 4.5V to 5.6V. The decoupling ceramic capacitor in the PVCC pin is 10µF. 16 PHASE 17 PVIN Analog Input - This input voltage is applied to the power FETs with the FET’s ground being the PGND pin. It is recommended to place input decoupling capacitance, 22µF, directly between the PVIN pin and the PGND pin, as close as possible to the module. The input voltage range is 3V to 20V. 18 PGND All voltage levels are referenced to this pad. This is the low side MOSFET ground. PGND and PGND1 should be connected together with a ground plane. 19 VOUT Output voltage from the module. The output voltage range is 0.6V to 6V. 20 OCSET Analog Input - This pin is used with the PHASE pin to set the current limit of the module. The input voltage range is 0V to 30V. 21 VCC Analog Input - This pin provides bias power for the analog circuitry. It’s operational range is 4.5V to 5.6V. In 3.3V applications, VCC, PVCC and VIN should be shorted to allow operation at the low end input as it relates to the VCC falling threshold limit. This pin can be powered either by the internal linear regulator or by an external voltage source. 22 PGOOD Analog Output - This pin, pulled up to VCC via an internal 10kΩ resistor, provides a Power Good signal when the output is within 9% of nominal output regulation point with 4% hysteresis (13%/9%), and soft-start is complete. An external pull-up is not required. PGOOD monitors the outputs (VMON1) of the internal differential amplifiers. The output voltage range is 0V to VCC. FN6727 Rev 2.00 June 9, 2015 Analog Output - This pin is the phase node of the regulator. The output voltage range is 0V to 30V. Page 4 of 25 ISL8200M Pin Descriptions (Continued) PIN # PIN NAME 23 NC PIN DESCRIPTION Not internal connected PD1 Phase Thermal Pad Used for both the PHASE pin (Pin # 16) and for heat removal connecting to heat dissipation layers using Vias. Connect this pad to a copper island on the PCB board with the same shape as the PHASE thermal pad. This pad is electrically connected to the PHASE pin. PD2 PVIN Thermal Pad Used for both the PVIN pin (Pin # 17) and for heat removal connecting to heat dissipation layers using Vias. Connect this pad to a copper island on the PCB board with the same shape as the PVIN thermal pad. This pad is electrically connected to the PVIN pin. PD3 PGND Thermal Pad Used for both the PGND pin (Pin # 18) and for heat removal connecting to heat dissipation layers using Vias. Connect this pad to a copper island on the PCB board with the same shape as the PGND thermal pad. This pad is electrically connected to the PGND pin. PD4 VOUT Thermal Pad Used for both the VOUT pin (Pin # 19) and for heat removal connecting to heat dissipation layers using Vias. Connect this pad to a copper island on the PCB board with the same shape as the VOUT thermal pad.Tthis pad is electrically connected to the VOUT pin. Typical Application Circuits VIN RSET VOUT_SET FF 2.2k ISL8200M FSYNC_IN PGOOD CLKOUT VCC PVCC VCC RSET can change VOUT Refer to Table 1 10µF PGND PHASE OCSET ISET PGND1 C209 RISHARE1 5k ISHARE ISFETDRV Set R1 and R2 such that 0.8V ≤ VEN ≤ 5.0V PGOOD PH_CNTRL ISHARE_BUS Do not tie EN directly to a power source GROUND VSEN_REM- EN ISFETDRV1 VOUT 330µF VOUT VOUT C9 22µF PVIN 1nF R2 2.05k GROUND C211 R1 8.25k C203 270µF C3 PVIN FIGURE 3. SINGLE PHASE 10A 1.2V OUTPUT CIRCUIT FN6727 Rev 2.00 June 9, 2015 Page 5 of 25 ISL8200M VOUT RSET1 VIN 1.47k GROUND PGOOD ISL28191 - VOUT_SET FF 1nF 2.26k VINTBIAS RSET2 1.47k 1k VOUT R122 VOUT VIN 2N7002LT1 VCC1 R112 22µF C303 180 R143 PVIN C311 2 3 1.54k VSEN_REM- EN ISL8200M FSYNC_IN CLKOUT PGOOD PGOOD PH_CNTRL ISHARE_BUS VCC VCC2 Refdes PVCC PGND1 PGND PHASE ISET OCSET ISFETDRV ISHARE ISFETDRV2 PGOOD R142 1 4 10µF C209 10k RISET1 RISHARE1 5k 2 30k 10µF C309 10k RISET2 ISHARE Page 6 of 25 FIGURE 4. TWO PHASE 20A 3.3V OUTPUT CIRCUIT 1.5VOUT 3.3VOUT 5.0VOUT R121 1.1k 5.1k 8.87k R143 732 1.54k 1.78k RPRELOAD 75 180 180 R122 560 2.26k 2.8k 1µF VOINT ISHARE + 3 C103 6 1 1µF RPRELOAD PVCC PGND1 PGND PHASE ISET OCSET ISHARE VCC1 5.1k VCC ISFETDRV R121 ISHARE_BUS 2.2nF C101 PH_CNTRL C101 CLKOUT PGOOD 2.2k ISL8200M FSYNC_IN R111 1nF C211 R2 2.61k 100µF (x6) VSEN_REM- EN ISFETDRV1 C9 VOUT_SET FF GROUND VOUT VOUT VCC1 C203 22µF R1 PVIN 26.7k 270µF PVIN C3 FN6727 Rev 2.00 June 9, 2015 Typical Application Circuits (continued) ISL8200M Absolute Maximum Ratings Thermal Information Input Voltage, PVIN, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +27V Driver Bias Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V Signal Bias Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V BOOT/UGATE Voltage, VBOOT . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +36V Phase Voltage, VPHASE . . . . . . . . . . . . . . . . . . . VBOOT - 7V to VBOOT + 0.3V BOOT to PHASE Voltage, VBOOT - VPHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V Input, Output or I/O Voltage . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V ESD Rating Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 2kV Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 200V Charge Device Model (Tested per JESD22-C101C). . . . . . . . . . . . . . . 1kV Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA Thermal Resistance (Typical) JA (°C/W) JC (°C/W) QFN Package (Notes 4, 5) . . . . . . . . . . . . . . 13 2.0 Maximum Storage Temperature Range . . . . . . . . . . . . . .-40°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see Figure 40 Recommended Operating Conditions Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 20V Input Voltage, PVIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 20V Driver Bias Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.6V Signal Bias Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.6V Boot to Phase Voltage VBOOT - VPHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .