DATASHEET
ISL84581
FN6416
Rev 3.00
April 13, 2009
Low-Voltage, Single and Dual Supply, 8-to-1 Multiplexer
The Intersil ISL84581 device contains precision,
bidirectional, analog switches configured as an 8-to-1
multiplexer/demultiplexer. It was designed to operate from a
single +2V to +12V single supply or from dual ±2V to ±6V
supplies. The device has an inhibit pin to simultaneously
open all signal paths.
Features
• Fully Specified at 3.3V, 5V, ±5V, and 12V Supplies for 10%
Tolerances
• ON-Resistance (rON) Max, VS = ±4.5V . . . . . . . . . . . 50
• ON-Resistance (rON) Max, VS = +3V. . . . . . . . . . . . 155
The ISL84581 has an ON-resistance of 39 with a dual ±5V
supply and 125 with a single +3.3V supply. Each switch
can handle rail-to-rail analog signals. The off-leakage current
is only 0.02nA at +25°C or 0.2nA at +85°C.
• rON Matching Between Channels, VS = ±5V . . . . . . . . . 2.5kV
Thermal Resistance (Typical, Note 2)
JA (°C/W)
16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . .
110
16 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . .
160
Maximum Junction Temperature (Plastic Package). . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. Signals on NOx, COM, ADDx, INH exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings.
2. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications ±5V Supply
Test Conditions: VSUPPLY = ±4.5V to ±5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3),
Unless Otherwise Specified.
PARAMETER
TEST CONDITIONS
TEMP
MIN
MAX
(°C) (Notes 4, 8) TYP (Notes 4, 8) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
(Note 10)
Full
V-
-
V+
V
ON-Resistance, rON
VS = ±4.5V, ICOM = 2mA, VNO = 3V
(See Figure 5)
25
-
44
60
Full
-
-
80
25
-
1.3
4
Full
-
-
6
25
-
7.5
9
Full
-
-
12
25
-
0.02
-
nA
Full
-
0.2
-
nA
25
-
0.02
-
nA
Full
-
0.2
-
nA
25
-
0.02
-
nA
Full
-
0.2
-
nA
Input Voltage High, VINHH, VADDH
Full
2.4
-
-
V
Input Voltage Low, VINHL, VADDL
Full
-
-
0.8
V
Input Current, IADDH, IADDL, IINHH, IINHL VS = ±5.5V, VINH, VADD = 0V or V+, (Note 9)
Full
-0.5
-
0.5
µA
25
-
35
50
ns
Full
-
-
60
ns
25
-
22
35
ns
Full
-
-
40
ns
25
-
43
60
ns
Full
-
-
70
ns
rON Matching Between Channels, rON
rON Flatness, rFLAT(ON)
NO OFF Leakage Current, INO(OFF)
COM OFF Leakage Current, ICOM(OFF)
COM ON Leakage Current, ICOM(ON)
VS = ±4.5V, ICOM = 2mA, VNO = 3V (Note 5)
VS = ±4.5V, ICOM = 2mA, VNO = ±3V, 0.1V
(Note 6)
VS = ±5.5V, VCOM = 4.5V, VNO = +4.5V (Note 7)
VS = ±5.5V, VCOM = 4.5V, VNO = +4.5V (Note 7)
VS = ±5.5V, VCOM = VNO = ±4.5V (Note 7)
DIGITAL INPUT CHARACTERISTICS
DYNAMIC CHARACTERISTICS
INHIBIT Turn-ON Time, tON
INHIBIT Turn-OFF Time, tOFF
Address Transition Time, tTRANS
FN6416 Rev 3.00
April 13, 2009
VS = ±4.5V, VNO = ±3V, RL = 300, CL = 35pF,
VIN = 0 to 3 (See Figure 1, Note 9)
VS = ±4.5V, VNO = ±3V, RL = 300, CL = 35pF,
VIN = 0 to 3 (See Figure 1, Note 9)
VS = ±4.5V, VNO = ±3V, RL = 300, CL = 35pF,
VIN = 0 to 3 (See Figure 1, Note 9)
Page 3 of 15
ISL84581
Electrical Specifications ±5V Supply
Test Conditions: VSUPPLY = ±4.5V to ±5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3),
Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
TEMP
MIN
MAX
(°C) (Notes 4, 8) TYP (Notes 4, 8) UNITS
Break-Before-Make Time, tBBM
VS = ±5.5V, VNO = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V (See Figure 3, Note 9)
Full
2
7
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0 (See Figure 2, Note 9)
25
-
0.3
1
pC
NO OFF Capacitance, COFF
f = 1MHz, VNO = VCOM = 0V (See Figure 6)
25
-
3
-
pF
COM OFF Capacitance, COFF
f = 1MHz, VNO = VCOM = 0V (See Figure 6)
25
-
21
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO = VCOM = 0V (See Figure 6)
25
-
26
-
pF
OFF-Isolation
RL = 50, CL = 15pF, f = 100kHz, VNOx = 1VRMS
(See Figures 4 and 18)
25
-
92
-
dB
Power Supply Range
(Note 10)
Full
±2
-
±6
V
Positive Supply Current, I+
VS = ±5.5V, VINH, VADD = 0V or V+, Switch On or
Off, (Note 9)
Full
-7
-
7
µA
Full
-1
-
1
µA
POWER SUPPLY CHARACTERISTICS
Negative Supply Current, I-
Electrical Specifications +12V Supply
PARAMETER
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 3),
Unless Otherwise Specified.
TEST CONDITIONS
TEMP
MIN
(°C) (Notes 4, 8)
MAX
TYP (Notes 4, 8) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
(Note 10)
Full
0
-
V+
V
ON-Resistance, rON
V+ = 10.8V, ICOM = 1.0mA, VNO = 9V (See Figure 5)
25
-
37
45
Full
-
-
55
25
-
1.2
2
Full
-
-
2
rON Matching Between Channels,
rON
V+ = 10.8V, ICOM = 1.0mA, VNO = 9V (Note 5)
rON Flatness, rFLAT(ON)
V+ = 10.8V, ICOM = 1.0mA, VNO = 3V, 6V, 9V (Note 6)
Full
-
5
-
NO OFF Leakage Current, INO(OFF)
V+ = 13.2V, VCOM = 1V, 12V, VNO = 12V, 1V (Note 7)
25
-
0.02
-
nA
Full
-
0.2
-
nA
25
-
0.02
-
nA
Full
-
0.2
-
nA
25
-
0.02
-
nA
Full
-
0.2
-
nA
Input Voltage High, VINHH, VADDH
Full
3.7
3.3
-
V
Input Voltage Low, VINHL, VADDL
Full
-
2.7
0.8
V
V+ = 13.2V, VINH, VADD = 0V or V+
Full
-0.5
-
0.5
µA
V+ = 10.8V, VNO = 10V, RL = 300, CL = 35pF,
VIN = 0 to 4 (See Figure 1, Note 9)
25
-
24
40
ns
Full
-
-
45
ns
25
-
15
30
ns
Full
-
-
35
ns
COM OFF Leakage Current,
ICOM(OFF)
V+ = 13.2V, VCOM = 12V, 1V, VNO = 1V, 12V (Note 7)
COM ON Leakage Current, ICOM(ON) V+ = 13.2V, VCOM = 1V, 12V, VNO = 1V, 12V, or
floating (Note 7)
DIGITAL INPUT CHARACTERISTICS
Input Current, IADDH, IADDL, IINHH,
IINHL
DYNAMIC CHARACTERISTICS
INHIBIT Turn-ON Time, tON
INHIBIT Turn-OFF Time, tOFF
FN6416 Rev 3.00
April 13, 2009
V+ = 10.8V, VNO = 10V, RL = 300, CL = 35pF,
VIN = 0 to 4 (See Figure 1, Note 9)
Page 4 of 15
ISL84581
Electrical Specifications +12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 3),
Unless Otherwise Specified. (Continued)
PARAMETER
Address Transition Time, tTRANS
TEST CONDITIONS
V+ = 10.8V, VNO = 10V, RL = 300, CL = 35pF,
VIN = 0 to 4 (See Figure 1, Note 9)
TEMP
MIN
(°C) (Notes 4, 8)
MAX
TYP (Notes 4, 8) UNITS
25
-
27
50
ns
Full
-
-
55
ns
Break-Before-Make Time Delay, tD
V+ = 13.2V, RL = 300, CL = 35pF, VNO = 10V,
VIN = 0 to 4 (See Figure 3, Note 9)
Full
2
5
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0 (See Figure 2, Note 9)
25
-
2.7
5
pC
OFF-Isolation
RL = 50, CL = 15pF, f = 100kHz
(See Figures 4 and 18)
25
-
92
-
dB
NO OFF Capacitance, COFF
f = 1MHz, VNO = VCOM = 0V (See Figure 6)
25
-
3
-
pF
COM OFF Capacitance, CCOM(OFF)
f = 1MHz, VNO = VCOM = 0V (See Figure 6)
25
-
21
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO = VCOM = 0V (See Figure 6)
25
-
26
-
pF
POWER SUPPLY CHARACTERISTICS
Power Supply Range
(Note 10)
Full
2
-
12
V
Positive Supply Current, I+
V+ = 13.2V, VINH, VADD = 0V or V+, all channels on or
off
Full
-7
-
7
µA
Electrical Specifications 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3),
Unless Otherwise Specified.
PARAMETER
TEST CONDITIONS
TEMP
MIN
MAX
(°C) (Notes 4, 8) TYP (Notes 4, 8) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
(Note 10)
Full
0
-
V+
V
ON-Resistance, rON
V+ = 4.5V, ICOM = 1.0mA, VNO = 3.5V
(See Figure 5)
25
-
81
100
Full
-
-
120
25
-
2.2
4
Full
-
-
6
rON Matching Between Channels, rON V+ = 4.5V, ICOM = 1.0mA, VNO = 3V (Note 5)
rON Flatness, rFLAT(ON)
V+ = 4.5V, ICOM = 1.0mA, VNO = 1V, 2V, 3V
(Note 6)
Full
-
11.5
-
NO OFF Leakage Current, INO(OFF)
V+ = 5.5V, VCOM = 1V, 4.5V, VNO = 4.5V, 1V
(Note 7)
25
-
0.02
-
nA
Full
-
0.2
-
nA
25
-
0.02
-
nA
Full
-
0.2
-
nA
25
-
0.02
-
nA
Full
-
0.2
-
nA
Input Voltage High, VINHH, VADDH
Full
2.4
-
-
V
Input Voltage Low, VINHL, VADDL
Full
-
-
0.8
V
V+ = 5.5V, VINH, VADD = 0V or V+, (Note 9)
Full
-0.5
-
0.5
µA
V+ = 4.5V, VNO = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V (see Figure 1, Note 9)
25
-
43
60
ns
Full
-
-
70
ns
COM OFF Leakage Current, ICOM(OFF) V+ = 5.5V, VCOM = 1V, 4.5V, VNO = 4.5V, 1V
(Note 7)
COM ON Leakage Current, ICOM(ON)
V+ = 5.5V, VCOM = VNO = 4.5V (Note 7)
DIGITAL INPUT CHARACTERISTICS
Input Current, IADDH, IADDL, IINHH,
IINHL
DYNAMIC CHARACTERISTICS
INHIBIT Turn-ON Time, tON
FN6416 Rev 3.00
April 13, 2009
Page 5 of 15
ISL84581
Electrical Specifications 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3),
Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
INHIBIT Turn-OFF Time, tOFF
V+ = 4.5V, VNO = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V (see Figure 1, Note 9)
V+ = 4.5V, VNO = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V (see Figure 1, Note 9)
Address Transition Time, tTRANS
TEMP
MIN
MAX
(°C) (Notes 4, 8) TYP (Notes 4, 8) UNITS
25
-
20
35
ns
Full
-
-
40
ns
25
-
51
70
ns
Full
-
-
85
ns
Break-Before-Make Time, tBBM
V+ = 5.5V, VNO = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V (see Figure 3, Note 9)
Full
2
9
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0see Figure 2, Note 9)
25
-
0.6
1.5
pC
OFF-Isolation
RL = 50, CL = 15pF, f = 100kHz, VNOx = 1VRMS
(see Figures 4 and 18)
25
-
92
-
dB
Power Supply Range
(Note 10)
Full
2
-
12
V
Positive Supply Current, I+
V+ = 5.5V, V- = 0V, VINH, VADD = 0V or V+,
Switch On or Off, (Note 9)
Full
-7
-
7
µA
Full
-1
-
1
µA
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I-
Electrical Specifications 3.3V SupplyTest Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3),
Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
TEMP
MIN
MAX
(°C) (Notes 4, 8) TYP (Notes 4, 8) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON-Resistance, rON
V+ = 3.0V, ICOM = 1.0mA, VNO = 1.5V (see Figure 5)
Full
0
-
V+
V
25
-
135
180
Full
-
-
200
25
-
3.4
8
Full
-
-
10
rON Matching Between Channels,
rON
V+ = 3.0V, ICOM = 1.0mA, VNO = 1.5V (Note 5)
rON Flatness, rFLAT(ON)
V+ = 3.0V, ICOM = 1.0mA, VNO = 0.5V, 1V, 2V
(Note 6)
Full
-
34
-
NO OFF Leakage Current, INO(OFF)
V+ = 3.6V, VCOM = 0V, 4.5V, VNO = 3V, 1V (Note 7)
25
-
0.02
-
nA
Full
-
0.2
-
nA
25
-
0.02
-
nA
Full
-
0.2
-
nA
25
-
0.02
-
nA
Full
-
0.2
-
nA
Input Voltage High, VINHH, VADDH
Full
2.4
-
-
V
Input Voltage Low, VINHL, VADDL
Full
-
-
0.8
V
V+ = 3.6V, VINH, VADD = 0V or V+, (Note 9)
Full
-0.5
-
0.5
A
V+ = 3.0V, VNO = 1.5V, RL = 300, CL = 35pF,
VIN = 0V to 3V (see Figure 1, Note 9)
25
-
82
100
ns
Full
-
-
120
ns
COM OFF Leakage Current,
ICOM(OFF)
V+ = 3.6V, VCOM = 0V, 4.5V, VNO = 3V, 1V (Note 7)
COM ON Leakage Current, ICOM(ON)
V+ = 3.6V, VCOM = VNO = 3V (Note 7)
DIGITAL INPUT CHARACTERISTICS
Input Current, IADDH, IADDL, IINHH,
IINHL
DYNAMIC CHARACTERISTICS
INHIBIT Turn-ON Time, tON
FN6416 Rev 3.00
April 13, 2009
Page 6 of 15
ISL84581
Electrical Specifications 3.3V SupplyTest Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3),
Unless Otherwise Specified (Continued)
PARAMETER
TEMP
MIN
MAX
(°C) (Notes 4, 8) TYP (Notes 4, 8) UNITS
TEST CONDITIONS
INHIBIT Turn-OFF Time, tOFF
V+ = 3.0V, VNO = 1.5V, RL = 300, CL = 35pF,
VIN = 0V to 3V (see Figure 1, Note 9)
Address Transition Time, tTRANS
V+ = 3.0V, VNO = 1.5V, RL = 300, CL = 35pF,
VIN = 0V to 3V (see Figure 1, Note 9)
25
-
37
50
ns
Full
-
-
60
ns
25
-
96
120
ns
Full
-
-
145
ns
Break-Before-Make Time, tBBM
V+ = 3.6V, VNO = 1.5V, RL = 300, CL = 35pF,
VIN = 0V to 3V (see Figure 3, Note 9)
Full
3
13
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0see Figure 2, Note 9)
25
-
0.3
1
pC
OFF-Isolation
RL = 50, CL = 15pF, f = 100kHz,
VNO = 1VRMS (see Figures 4 and 18)
25
-
92
-
dB
(Note 10)
Full
2
-
12
V
POWER SUPPLY CHARACTERISTICS
Power Supply Range
NOTES:
3. VIN = Input logic voltage to configure the device in a given state.
4. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
5. rON = rON (MAX) - rON (MIN).
6. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.
7. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at +25°C.
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
9. Limits established by characterization and are not production tested.
10. Limits should be considered typical and are not production tested.
Test Circuits and Waveforms
V+
3V
LOGIC
INPUT
tr < 20ns
tf < 20ns
50%
C
C
C
0V
V+
tON
NO0
NO1-NO7
VNO0
SWITCH
OUTPUT
V-
90%
VOUT
INH
90%
0V
LOGIC
INPUT
COM
GND ADDA-C
VOUT
RL
300
CL
35pF
tOFF
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. INHIBIT tON/tOFF MEASUREMENT POINTS
FN6416 Rev 3.00
April 13, 2009
Repeat test for other switches. CL includes fixture and stray
capacitance.
RL
V OUT = V (NO or NC) -----------------------R L + r ON
FIGURE 1B. INHIBIT tON/tOFF TEST CIRCUIT
Page 7 of 15
ISL84581
Test Circuits and Waveforms
(Continued)
3V
LOGIC
INPUT
tr < 20ns
tf < 20ns
50%
V+
C
V-
C
C
0V
V+
tTRANS
NO0
V-
NO7
C
VOUT
VNO0
SWITCH
OUTPUT
NO1-NO6
90%
0V
VOUT
COM
ADDA-C GND
INH
CL
35pF
RL
300
LOGIC
INPUT
10%
VNOX
tTRANS
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for other switches. CL includes fixture and stray
capacitance.
RL
V OUT = V (NO or NC) -----------------------R L + r ON
FIGURE 1D. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1C. ADDRESS tTRANS MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
V+
3V
LOGIC
INPUT
ON
COM
NO
0V
0
ADDX
SWITCH
OUTPUT
VOUT
GND
VG
VOUT
C
VOUT
RG
OFF
OFF
V-
C
INH
LOGIC
INPUT
Q = VOUT x CL
CL
1nF
Repeat test for other switches.
FIGURE 2B. Q TEST CIRCUIT
FIGURE 2A. Q MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
V+
tr < 20ns
tf < 20ns
3V
V-
C
C
LOGIC
INPUT
COM
0V
LOGIC
INPUT
tBBM
FIGURE 3A. tBBM MEASUREMENT POINTS
CL
35pF
ADDA-C
80%
0V
VOUT
RL
300
NO0-NO7
V+
SWITCH
OUTPUT
VOUT
C
GND
INH
Repeat test for other switches. CL includes fixture and stray
capacitance.
FIGURE 3B. tBBM TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
FN6416 Rev 3.00
April 13, 2009
Page 8 of 15
ISL84581
Test Circuits and Waveforms
V+
C
(Continued)
V-
V+
C
V-
C
C
rON = V1/1mA
SIGNAL
GENERATOR
NOx
NO
VNOX
0V OR V+
1mA
COM
ANALYZER
0V OR V+
GND
0V OR V+
V1
ADDX
ADDX
COM
INH
GND
INH
RL
FIGURE 4. OFF-ISOLATION TEST CIRCUIT
FIGURE 5. rON TEST CIRCUIT
V+
V-
C
C
NOx
0V OR V+
ADDX
IMPEDANCE
ANALYZER
COM
GND
INH
FIGURE 6. CAPACITANCE TEST CIRCUIT
FN6416 Rev 3.00
April 13, 2009
Page 9 of 15
ISL84581
Detailed Description
Power-Supply Considerations
The ISL84581 multiplexer offers precise switching capability
from bipolar ±2V to ±6V supplies or a single 2V to 12V
supply. When powered with dual ±5V supplies the part has
low ON-resistance (39) and high speed operation
(tON = 38ns, tOFF = 19ns).
The ISL84581 construction is typical of most CMOS analog
switches, in that it has three supply pins: V+, V-, and GND.
V+ and V- drive the internal CMOS switches and set their
analog voltage limits, so there are no connections between
the analog signal path and GND. Unlike switches with a 13V
maximum supply voltage, the ISL84581 15V maximum
supply voltage provides plenty of room for the 10% tolerance
of 12V supplies (±6V or 12V single supply), as well as room
for overshoot and noise spikes.
It has an inhibit pin to simultaneously open all signal paths.
The device is especially well suited for applications using
±5V supplies. With ±5V supplies the performance (rON,
Leakage, Charge Injection, etc.) is best in class.
High frequency applications also benefit from the wide
bandwidth and high off-isolation.
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to V- (see
Figure 7). To prevent forward biasing these diodes, V+ and
V- must be applied before any input signals, and input signal
voltages must remain between V+ and V-. If these conditions
cannot be guaranteed, then one of the following two
protection methods should be employed.
Logic inputs can easily be protected by adding a 1k
resistor in series with the input (see Figure 7). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not applicable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low rON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 7). These
additional diodes limit the analog signal from 1V below V+ to
1V above V-. The low leakage current performance is
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.
OPTIONAL
PROTECTION
RESISTOR
FOR LOGIC
INPUTS
1k
OPTIONAL PROTECTION
DIODE
V+
LOGIC
VNOx
VCOM
The part performs equally well when operated with bipolar or
single voltage supplies.The minimum recommended supply
voltage is 2V single supply or ±2V dual supply. It is important
to note that the input signal range, switching times, and
ON-resistance degrade at lower supply voltages. Refer to
the “Electrical Specification” tables on page 4 and “Typical
Performance Curves” on page 11 for details.
V+ and GND power the internal logic setting the digital
switching point of the level shifters. The level shifters convert
the logic levels to switched V+ and V- signals to drive the
analog switch gate terminals.
Logic-Level Thresholds
V+ and GND power the internal logic stages, so V- has no
affect on logic thresholds. This ISL84581 is TTL compatible
(0.8V and 2.4V) over a V+ supply range of 2.7V to 10V. At
12V the VIH level is about 3.3V. This is still below the CMOS
guaranteed high output minimum level of 4V, but noise
margin is reduced. For best results with a 12V supply, use a
logic family that provides a VOH greater than 4V.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50 systems, signal response is reasonably flat even past
100MHz (see Figures 16 and 17). Figures 16 and 17 also
illustrate that the frequency response is very consistent over
varying analog signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal feed
through from a switch’s input to its output. Off-isolation is the
resistance to this feed through. Figure 18 details the high off
isolation of the ISL84581. At 10MHz, off-isolation is about
55dB in 50 systems, decreasing approximately 20dB per
decade as frequency increases. Higher load impedances
decrease off-isolation due to the voltage divider action of the
switch OFF impedance and the load impedance.
VOPTIONAL PROTECTION
DIODE
FIGURE 7. INPUT OVERVOLTAGE PROTECTION
FN6416 Rev 3.00
April 13, 2009
Page 10 of 15
ISL84581
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and V-. One
of these diodes conducts if any analog signal exceeds V+
or V-.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or V-. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or V- and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and V- pins constitutes the
analog-signal-path leakage current. All analog leakage
current flows between each pin and one of the supply
terminals, not to the other switch terminal. This is why both
sides of a given switch can show leakage currents of the
same or opposite polarity. There is no connection between
the analog signal paths and GND.
Typical Performance Curves TA = +25°C, Unless Otherwise Specified
70
VCOM = (V+) - 1V
ICOM = 1mA
V- = -5V
60
+85°C
40
+25°C
30
-40°C
20
400
rON ()
rON ()
50
V- = 0V
300
200
+85°C
120
110
100
90
80
70
60
50
90
80
70
60
50
40
30
60
-40°C
VS =±3V
+85°C
+25°C
-40°C
VS =±5V
+85°C
+25°C
40
100
-40°C
30
20
2
3
4
5
6
7
V+ (V)
8
9
10
11
12
FIGURE 8. ON-RESISTANCE vs SUPPLY VOLTAGE
225
200
-5
-4
-3
-1
-2
125
100
+25°C
V+ = 3.3V
-40°C
V- = 0V
+85°C
+85°C
40
35
+25°C
25
-40°C
-40°C
1
3
2
4
VCOM (V)
FIGURE 10. ON-RESISTANCE vs SWITCH VOLTAGE
FN6416 Rev 3.00
April 13, 2009
ICOM = 1mA
V- = 0V
+25°C
0
5
V- = 0V
30
V+ = 5V
4
45
+85°C
+25°C
3
50
V+ = 2.7V
V- = 0V
-40°C
2
V+ = 12V
55
+85°C
1
0
VCOM (V)
60
ICOM = 1mA
175
150
75
160
140
120
100
80
60
100
90
80
70
60
50
40
-40°C
FIGURE 9. ON-RESISTANCE vs SWITCH VOLTAGE
rON ()
rON ()
VS =±2V
+85°C
+25°C
50
+25°C
0
ICOM = 1mA
20
5
0
2
4
6
8
10
VCOM (V)
FIGURE 11. ON-RESISTANCE vs SWITCH VOLTAGE
Page 11 of 15
12
ISL84581
Typical Performance Curves TA = +25°C, Unless Otherwise Specified (Continued)
500
400
-40°C
300
100
tOFF (ns)
-40°C
V- = 0V
200
50
0
85°C
+85°C
60
+25°C
25°C
40
20
-40°C
2
V- = 0V
80
+25°C
100
85°C
+85°C
-40°C
0
100
+85°C
150
25°C
+25°C
50
+85°C
0
250
+25°C
100
+25°C
3
4
5
6
7
8
9
10
11
0
12
-40°C
2
3
4
6
5
V+ (V)
300
250
12
11
VCOM = (V+) - 1V
V- = 0V
200
tRANS (ns)
200
150
100
150
100
+25°C
+25°C
+85°C
50
+85°C
50
-40°C
-40°C
0
2
3
4
5
6
7
8
9
10
11
13
12
2
3
4
NORMALIZED GAIN (dB)
VIN = 0.2VP-P TO 5VP-P
3
GAIN
0
-3
0
VIN = 0.2VP-P TO 4VP-P
GAIN
0
-3
0
PHASE
45
45
90
90
135
180
RL = 50
135
180
RL = 50
10M
100M
FREQUENCY (Hz)
FIGURE 16. FREQUENCY RESPONSE
FN6416 Rev 3.00
April 13, 2009
VS = ±3V
3
PHASE (°)
PHASE
1M
6
FIGURE 15. ADDRESS TRANS TIME vs DUAL SUPPLY
VOLTAGE
FIGURE 14. ADDRESS TRANS TIME vs SINGLE SUPPLY
VOLTAGE
VS = ±5V
5
V± (V)
V+ (V)
600M
1M
10M
100M
600M
FREQUENCY (Hz)
FIGURE 17. FREQUENCY RESPONSE
Page 12 of 15
PHASE (°)
tRANS (ns)
10
9
FIGURE 13. INHIBIT TURN-OFF TIME vs SUPPLY VOLTAGE
VCOM = (V+) - 1V
250
NORMALIZED GAIN (dB)
8
7
V+ (V)
FIGURE 12. INHIBIT TURN-ON TIME vs SUPPLY VOLTAGE
0
VCOM = (V+) - 1V
V- = -5V
-40°C
150
+25°C
200
tON (ns)
200
VCOM = (V+) - 1V
V- = -5V
ISL84581
-10
3
V+ = 3V TO 12V OR
-20 VS = ±2V TO ±5V
RL = 50
-30
2
V+ = 3.3V
V- = 0V
1
-40
-50
Q (pC)
OFF ISOLATION (dB)
Typical Performance Curves TA = +25°C, Unless Otherwise Specified (Continued)
-60
ISOLATION
-70
-80
V+ = 12V
V- = 0V
0
V+ = 5V
V- = 0V
-1
VS =±5V
-2
-90
-3
-100
-110
1k
-4
10k
100k
1M
10M
FREQUENCY (Hz)
FIGURE 18. OFF ISOLATION
100M 500M
-5
-2.5
0
2.5
5
7.5
10
VCOM (V)
FIGURE 19. CHARGE INJECTION vs SWITCH VOLTAGE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
VTRANSISTOR COUNT:
193
PROCESS:
Si Gate CMOS
FN6416 Rev 3.00
April 13, 2009
Page 13 of 15
12
ISL84581
Shrink Small Outline Plastic Packages (SSOP)
Quarter Size Outline Plastic Packages (QSOP)
M16.15A
N
INDEX
AREA
H
0.25(0.010) M
E
2
INCHES
GAUGE
PLANE
-B1
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
(0.150” WIDE BODY)
B M
3
0.25
0.010
SEATING PLANE
-A-
A
D
h x 45°
-C-
e
0.17(0.007) M
A1
B
L
A2
C
0.10(0.004)
C A M
B S
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.061
0.068
1.55
1.73
-
A1
0.004
0.0098
0.102
0.249
-
A2
0.055
0.061
1.40
1.55
-
B
0.008
0.012
0.20
0.31
9
C
0.0075
0.0098
0.191
0.249
-
D
0.189
0.196
4.80
4.98
3
E
0.150
0.157
3.81
3.99
4
e
0.025 BSC
0.635 BSC
-
H
0.230
0.244
5.84
6.20
-
h
0.010
0.016
0.25
0.41
5
L
0.016
0.035
0.41
0.89
6
8°
0°
N
16
0°
16
7
8°
Rev. 2 6/04
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.10mm (0.004 inch) total in excess
of “B” dimension at maximum material condition.
10. Controlling dimension: INCHES. Converted millimeter dimensions are not necessarily exact.
FN6416 Rev 3.00
April 13, 2009
Page 14 of 15
ISL84581
Thin Shrink Small Outline Plastic Packages (TSSOP)
M16.173
N
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
E
0.25(0.010) M
E1
2
INCHES
GAUGE
PLANE
-B1
B M
0.05(0.002)
-A-
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.043
-
1.10
-
A1
3
L
A
D
-C-
e
c
0.10(0.004)
C A M
0.05
0.15
-
A2
0.033
0.037
0.85
0.95
-
b
0.0075
0.012
0.19
0.30
9
c
0.0035
0.008
0.09
0.20
-
B S
0.002
D
0.193
0.201
4.90
5.10
3
0.169
0.177
4.30
4.50
4
0.026 BSC
E
0.246
L
0.020
N
NOTES:
0.006
E1
e
A2
A1
b
0.10(0.004) M
0.25
0.010
SEATING PLANE
MILLIMETERS
0.65 BSC
0.256
6.25
0.028
0.50
16
0o
-
0.70
6
16
8o
0o
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AB, Issue E.
-
6.50
7
8o
Rev. 1 2/02
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.15mm (0.006
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees)
© Copyright Intersil Americas LLC 2007-2009. All Rights Reserved.
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Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
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Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
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For information regarding Intersil Corporation and its products, see www.intersil.com
FN6416 Rev 3.00
April 13, 2009
Page 15 of 15
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