ISL8485EIBZ-T

DATASHEET ISL8483E, ISL8485E FN6048 Rev.13.00 Sep 24, 2018 ESD Protected to ±15kV, 5V, Low Power, High Speed or Slew Rate Limited RS-485/RS-422 Transceivers Features The ISL8483E and ISL8485E are ESD protected, BiCMOS 5V powered, single transceivers that meet both the RS-485 and RS-422 standards for balanced communication. Each driver output/receiver input is protected against ±15kV ESD strikes without latch-up. Unlike competitive devices, this Renesas family is specified for 10% tolerance supplies (4.5V to 5.5V). • Pb-Free (RoHS compliant) • Extended industrial temperature options (+125°C) • RS-485 I/O pin ESD protection . . . . . . . . . . . . . . ±15kV HBM - Class 3 ESD level on all other pins. . . . . . . . . . . >7kV HBM The ISL8483E uses slew rate limited drivers that reduce EMI and minimize reflections from improperly terminated transmission lines or unterminated stubs in multidrop and multipoint applications. • Specified for 10% tolerance supplies • High data rate version (ISL8485E). . . . . . . . . . up to 10Mbps • Slew rate limited version for error free data transmission (ISL8483E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . up to 250kbps Data rates up to 10Mbps are achievable by using the ISL8485E, which features higher slew rates. • Single unit load allows up to 32 devices on the bus Both devices present a “single unit load” to the RS-485 bus, which allows up to 32 transceivers on the network. • 1nA low current Shutdown mode (ISL8483E) Receiver (Rx) inputs feature a “fail-safe if open” design, which ensures a logic high Rx output if Rx inputs are floating. • Low quiescent current: - 160µA (ISL8483E) - 500µA (ISL8485E) Driver (Tx) outputs are short-circuit protected even for voltages exceeding the power supply voltage. Additionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive. • -7V to +12V common-mode input voltage range These half duplex configurations multiplex the Rx inputs and Tx outputs to allow transceivers with Rx and Tx disable functions in 8 Ld packages. • Operate from a single +5V supply (10% tolerance) Related Literature Applications For a full list of related documents, visit our website: • Factory automation • ISL8483E and ISL8485E product pages • Security networks • Three-state Rx and Tx outputs • 30ns propagation delays, 5ns skew (ISL8485E) • Current limiting and thermal shutdown for driver overload protection • Building environmental control systems • Industrial/process control networks • Level translators (such as RS-232 to RS-422) • RS-232 “extension cords” TABLE 1. SUMMARY OF FEATURES PART NUMBER HALF/FULL DUPLEX NO. OF DEVICES ALLOWED ON BUS ISL8483E Half 32 0.25 Yes Yes 160 Yes 8 ISL8485E Half 32 10 No Yes 500 No 8 FN6048 Rev.13.00 Sep 24, 2018 DATA RATE (Mbps) SLEW-RATE LIMITED? RECEIVER/DRIVER ENABLE? QUIESCENT ICC (µA) LOW POWER SHUTDOWN? PIN COUNT Page 1 of 15 ISL8483E, ISL8485E Typical Operating Circuit 5V 8 RPU 5V 100nF 100nF VCC RB 1 RO 8 RPU VCC RO 1 A/Y 6 6 A/Y 2 RE RE 2 3 DE RT2 B/Z 7 VFS RT1 DE 3 7 B/Z 4 DI DI 4 RB GND GND 5 5 To calculate the resistor values, refer to TB509 Ordering Information PART NUMBER (Notes 3, 4) PART MARKING TEMP. RANGE (°C) TAPE AND REEL (UNITS) (Note 2) PACKAGE (RoHS COMPLIANT) PKG. DWG. # ISL8483EIBZ 8483 EIBZ -40 to +85 - 8 Ld SOIC M8.15 ISL8483EIBZ-T 8483 EIBZ -40 to +85 2.5k 8 Ld SOIC M8.15 ISL8485EABZ 8485 EABZ -40 to +125 - 8 Ld SOIC M8.15 ISL8485EABZ-T 8485 EABZ -40 to +125 2.5k 8 Ld SOIC M8.15 ISL8485ECBZ 8485 ECBZ 0 to +70 - 8 Ld SOIC M8.15 ISL8485ECBZ-T 8485 ECBZ 0 to +70 2.5k 8 Ld SOIC M8.15 ISL8485EIBZ 8485 EIBZ -40 to +85 - 8 Ld SOIC M8.15 ISL8485EIBZ-T 8485 EIBZ -40 to +85 2.5k 8 Ld SOIC M8.15 ISL8485EIPZ ISL 8485EIPZ -40 to +85 - 8 Ld PDIP (Note 1) E8.3 NOTES: 1. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in reflow solder processing applications. 2. Refer to TB347 for details about reel specifications. 3. These Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. For Moisture Sensitivity Level (MSL), refer to the product information pages for the ISL8483E and the ISL8485E. For more information on MSL, refer to TB363. FN6048 Rev.13.00 Sep 24, 2018 Page 2 of 15 ISL8483E, ISL8485E Pin Configuration ISL8483E, ISL8485E (8 LD PDIP, SOIC) TOP VIEW RO 1 RE 2 DE 3 DI 4 R D 8 VCC 7 B/Z 6 A/Y 5 GND Pin Descriptions PIN FUNCTION RO Receiver output: RO is high if A > B by at least 0.2V; RO is low if A < B by 0.2V or more; RO is high if A and B are unconnected (floating). RE Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. DE Driver output enable. The driver outputs Y and Z are enabled by bringing DE high. They are high impedance when DE is low. DI Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low. GND Ground connection. A/Y ±15kV HBM ESD protected, RS-485, RS-422 level noninverting receiver input and noninverting driver output. Pin is an input (A) if DE = 0; pin is an output (Y) if DE = 1. B/Z ±15kV HBM ESD protected, RS-485, RS-422 level inverting receiver input and inverting driver output. Pin is an input (B) if DE = 0; pin is an output (Z) if DE = 1. VCC System power supply input (4.5V to 5.5V). Truth Tables RECEIVING INPUTS TRANSMITTING INPUTS OUTPUTS OUTPUT RE DE A-B RO VAB≥ 0.2V 1 RE DE DI Z Y 0 0 X 1 1 0 1 0 0 X 1 0 1 0 0 0 VAB ≤ -0.2V 0 0 0 X High-Z High-Z 0 0 Inputs Open 1 1 0 X High-Z * High-Z * 1 0 X High-Z * 1 1 X High-Z *Shutdown mode for ISL8483E (see Note 11) 0.2V > VAB > -0.2V Undetermined *Shutdown mode for ISL8483E (see Note 11) FN6048 Rev.13.00 Sep 24, 2018 Page 3 of 15 ISL8483E, ISL8485E Absolute Maximum Ratings Thermal Information VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltages DI, DE, RE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VCC +0.5V) Input/Output Voltages A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +12.5V RO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VCC +0.5V) Short-Circuit Duration Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .See “ESD PERFORMANCE” Thermal Resistance (Typical, Note 5) θJA (°C/W) 8 Ld SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 8 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in reflow solder processing applications. Operating Conditions Temperature Range ISL8485ECx. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C ISL848xEIx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C ISL8485EAx. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +125°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions can adversely impact product reliability and result in failures not covered by warranty. NOTE: 5. θJA is measured with the component mounted on a low-effective thermal conductivity test board in free air. Refer to TB379 for details. Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; unless otherwise specified. Typical values are at VCC = 5V, TA = +25°C, (Note 6) TEMP (°C) MIN (Note 16) TYP MAX (Note 16) UNIT Full - - VCC V R = 50Ω (RS-422), (Figure 1 on page 6) Full 2 3 - V R = 27Ω (RS-485), (Figure 1 on page 6) Full 1.5 2.3 5 V VOD R = 27Ω or 50Ω, (Figure 1 on page 6) Full - 0.01 0.2 V Driver Common-Mode VOUT VOC R = 27Ω or 50Ω, (Figure 1 on page 6) Full - - 3 V Change in Magnitude of Driver Common-Mode VOUT for Complementary Output States VOC R = 27Ω or 50Ω, (Figure 1 on page 6) Full - 0.01 0.2 V PARAMETER SYMBOL TEST CONDITIONS DC CHARACTERISTICS Driver Differential VOUT (No Load) VOD1 Driver Differential VOUT (With Load) VOD2 Change in Magnitude of Driver Differential VOUT for Complementary Output States Logic Input High Voltage VIH DE, DI, RE Full 2 - - V Logic Input Low Voltage VIL DE, DI, RE Full - - 0.8 V Logic Input Current IIN1 DE, DI, RE (ISL8483E) Full -2 - 2 µA IIN1 DI (ISL8485E) Full -2 - 2 µA IIN1 DE, RE (ISL8485E) Full -25 - 25 µA IIN2 DE = 0V, VCC = 0V or 4.5 to 5.5V VIN = 12V Full - - 1 mA VIN = -7V Full - - -0.8 mA Input Current (A, B), (Note 14) Receiver Differential Threshold Voltage V TH -7V  VCM  12V Full -0.2 - 0.2 V Receiver Input Hysteresis V TH VCM = 0V +25 - 70 - mV Receiver Output High Voltage VOH IO = -4mA, VID = 200mV Full 3.5 - - V Receiver Output Low Voltage VOL IO = -4mA, VID = 200mV Full - - 0.4 V Three-State (High Impedance) Receiver Output Current IOZR 0.4V  VO  2.4V Full - - ±1 µA FN6048 Rev.13.00 Sep 24, 2018 Page 4 of 15 ISL8483E, ISL8485E Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; unless otherwise specified. Typical values are at VCC = 5V, TA = +25°C, (Note 6) (Continued) PARAMETER SYMBOL TEMP (°C) MIN (Note 16) TYP MAX (Note 16) UNIT Full 12 - - kΩ DE = VCC Full - 700 900 µA DE = 0V Full - 500 565 µA TEST CONDITIONS Receiver Input Resistance RIN -7V  VCM  12V No-Load Supply Current, (Note 7) ICC ISL8485E, DI, RE = 0V or VCC ISL8483E, DI, RE = 0V or VCC DE = VCC Full - 470 650 µA DE = 0V Full - 160 250 µA Shutdown Supply Current ISHDN ISL8483E, DE = 0V, RE = VCC, DI = 0V or VCC Full - 1 50 nA Driver Short-Circuit Current, VO = High or Low IOSD1 DE = VCC, -7V  VY or VZ  12V, (Note 8) Full 35 - 250 mA Receiver Short-Circuit Current IOSR 0V  VO  VCC Full 7 - 85 mA Full 18 30 50 ns SWITCHING CHARACTERISTICS (ISL8485E) Driver Input to Output Delay tPLH, tPHL RDIFF = 54Ω, CL = 100pF, (Figure 2 on page 7) Driver Output Skew tSKEW RDIFF = 54Ω, CL = 100pF, (Figure 2 on page 7) Full - 2 10 ns Driver Differential Rise or Fall Time tR, tF RDIFF = 54Ω, CL = 100pF, (Figure 2 on page 7) Full 3 11 25 ns Driver Enable to Output High tZH CL = 100pF, SW = GND, (Figure 3 on page 7) Full - 17 70 ns Driver Enable to Output Low tZL CL = 100pF, SW = VCC, (Figure 3 on page 7) Full - 14 70 ns Driver Disable from Output High tHZ CL = 15pF, SW = GND, (Figure 3 on page 7) Full - 19 70 ns Driver Disable from Output Low tLZ CL = 15pF, SW = VCC, (Figure 3 on page 7) Full - 13 70 ns Full 30 40 150 ns (Figure 4 on page 7) +25 - 5 - ns Receiver Input to Output Delay Receiver Skew | tPLH - tPHL | tPLH, tPHL (Figure 4 on page 7) tSKD Receiver Enable to Output High tZH CL = 15pF, SW = GND, (Figure 5 on page 8) Full - 9 50 ns Receiver Enable to Output Low tZL CL = 15pF, SW = VCC, (Figure 5 on page 8) Full - 9 50 ns Receiver Disable from Output High tHZ CL = 15pF, SW = GND, (Figure 5 on page 8) Full - 9 50 ns Receiver Disable from Output Low tLZ CL = 15pF, SW = VCC, (Figure 5 on page 8) Full - 9 50 ns (Note 15) Full 10 - - Mbps Full 250 800 2000 ns Maximum Data Rate fMAX SWITCHING CHARACTERISTICS (ISL8483E) Driver Input to Output Delay tPLH, tPHL RDIFF = 54Ω, CL = 100pF, (Figure 2 on page 7) Driver Output Skew tSKEW RDIFF = 54Ω, CL = 100pF, (Figure 2 on page 7) Full - 160 800 ns Driver Differential Rise or Fall Time tR, tF RDIFF = 54Ω, CL = 100pF, (Figure 2 on page 7) Full 250 800 2000 νσ Driver Enable to Output High tZH CL = 100pF, SW = GND, (Figure 3 on page 7), (Note 9) Full 250 - 2000 νσ Driver Enable to Output Low tZL CL = 100pF, SW = VCC, (Figure 3 on page 7), (Note 9) Full 250 - 2000 νσ Driver Disable from Output High tHZ CL = 15pF, SW = GND, (Figure 3 on page 7) Full 300 - 3000 νσ Driver Disable from Output Low tLZ CL = 15pF, SW = VCC, (Figure 3 on page 7) Full 300 - 3000 νσ Full 250 350 2000 ns (Figure 4 on page 7) +25 - 25 - ns Receiver Input to Output Delay Receiver Skew | tPLH - tPHL | tPLH, tPHL (Figure 4 on page 7) tSKD Receiver Enable to Output High tZH CL = 15pF, SW = GND, (Figure 5 on page 8), (Note 10) Full - 10 50 ns Receiver Enable to Output Low tZL CL = 15pF, SW = VCC, (Figure 5 on page 8), (Note 10) Full - 10 50 ns FN6048 Rev.13.00 Sep 24, 2018 Page 5 of 15 ISL8483E, ISL8485E Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; unless otherwise specified. Typical values are at VCC = 5V, TA = +25°C, (Note 6) (Continued) TEMP (°C) MIN (Note 16) TYP MAX (Note 16) UNIT CL = 15pF, SW = GND, (Figure 5 on page 8) Full - 10 50 ns CL = 15pF, SW = VCC, (Figure 5 on page 8) Full - 10 50 ns fMAX (Note 15) Full 250 - - kbps tSHDN PARAMETER SYMBOL Receiver Disable from Output High tHZ Receiver Disable from Output Low tLZ Maximum Data Rate Time to Shutdown TEST CONDITIONS (Note 11) Full 50 200 600 ns Driver Enable from Shutdown to Output High tZH(SHDN) CL = 100pF, SW = GND, (Figure 3 on page 7), (Notes 11, 12) Full - - 2000 νσ Driver Enable from Shutdown to Output Low tZL(SHDN) CL = 100pF, SW = VCC, (Figure 5 on page 8), (Notes 11, 12) Full - - 2000 νσ Receiver Enable from Shutdown to Output High tZH(SHDN) CL = 15pF, SW = GND, (Figure 5 on page 8), (Notes 11, 13) Full - - 2500 ns Receiver Enable from Shutdown to Output Low tZL(SHDN) CL = 15pF, SW = VCC, (Figure 5 on page 8), (Notes 11, 13) Full - - 2500 ns Human Body Model +25 - 15 - kV +25 - >7 - kV ESD PERFORMANCE RS-485 Pins (A/Y, B/Z) All Other Pins NOTES: 6. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 7. Supply current specification is valid for loaded drivers when DE = 0V. 8. Applies to peak current. See “Typical Performance Curves” on page 10 for more information. 9. When testing the ISL8483E, keep RE = 0 to prevent the device from entering SHDN. 10. When testing the ISL8483E, the RE signal high time must be short enough (typically 600ns to ensure that the device enters SHDN. 13. Set the RE signal high time >600ns to ensure that the device enters SHDN. 14. Devices meeting these limits are denoted as “single unit load (1 UL)” transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus. 15. Limits established by characterization and are not production tested. 16. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Test Circuits and Waveforms VCC R DE DI Z VOD D Y R VOC FIGURE 1. DRIVER VOD AND VOC FN6048 Rev.13.00 Sep 24, 2018 Page 6 of 15 ISL8483E, ISL8485E Test Circuits and Waveforms (Continued) 3V DI 1.5V 1.5V 0V tPLH tPHL VOH CL = 100pF DE VCC 50% OUT (Y) 50% VOL Z DI Y tPLH tPHL RDIFF D CL = 100pF VOH OUT (Z) 50% SIGNAL GENERATOR 50% VOL 90% DIFF OUT (Y - Z) +VOD 90% 10% 10% tR -VOD tF SKEW = |tPLH (Y or Z) - tPHL (Z or Y)| FIGURE 2B. MEASUREMENT POINTS FIGURE 2A. TEST CIRCUIT FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES DE 500Ω Z DI VCC D SIGNAL GENERATOR SW Y GND 3V CL DE 1.5V Note 6 1.5V 0V (SHDN) FOR ISL8483E ONLY PARAMETER OUTPUT RE DI SW CL (pF) tHZ Y/Z X 1/0 GND 15 tLZ Y/Z X 0/1 VCC 15 tZH Y/Z 0 (Note 9) 1/0 GND 100 tZL Y/Z 0 (Note 9) 0/1 VCC 100 tZH(SHDN) Y/Z 1 (Note 12) 1/0 GND 100 tZL(SHDN) Y/Z 1 (Note 12) 0/1 VCC 100 tZH, tZH(SHDN) Note 6 OUTPUT HIGH tHZ VOH - 0.5V OUT (Y, Z) VOH 2.3V 0V tZL, tZL(SHDN) tLZ VCC Note 6 OUT (Y, Z) 2.3V OUTPUT LOW FIGURE 3A. TEST CIRCUIT VOL + 0.5V V OL FIGURE 3B. MEASUREMENT POINTS FIGURE 3. DRIVER ENABLE AND DISABLE TIMES 3V RE +1.5V 15pF B A R A 1.5V 1.5V RO 0V tPLH SIGNAL GENERATOR tPHL VCC 50% RO 50% 0V FIGURE 4A. TEST CIRCUIT FIGURE 4B. MEASUREMENT POINTS FIGURE 4. RECEIVER PROPAGATION DELAY FN6048 Rev.13.00 Sep 24, 2018 Page 7 of 15 ISL8483E, ISL8485E Test Circuits and Waveforms (Continued) RE B R SIGNAL GENERATOR 1kΩ RO VCC SW A GND 15pF Note 6 3V RE 1.5V 1.5V 0V (SHDN) FOR ISL8483E ONLY PARAMETER tZH, tZH(SHDN) Note 6 A SW tHZ 0 +1.5V GND tLZ 0 -1.5V VCC Note 6 tZH (Note 10) 0 +1.5V GND RO tZL (Note 10) 0 -1.5V VCC tZH(SHDN) (Note 13) 0 +1.5V GND tZL(SHDN) (Note 13) 0 -1.5V VCC FIGURE 5A. TEST CIRCUIT tHZ VOH - 0.5V RO DE OUTPUT HIGH VOH 1.5V 0V tZL, tZL(SHDN) tLZ VCC 1.5V OUTPUT LOW VOL + 0.5V V OL FIGURE 5B. MEASUREMENT POINTS FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES Application Information RS-485 and RS-422 are differential (balanced) data transmission standards for use in long haul or noisy environments. RS-422 is a subset of RS-485, so RS-485 transceivers are also RS-422 compliant. RS-422 is a point-to-multipoint (multidrop) standard that allows only one driver and up to 10 receivers on each bus, assuming one unit load devices. RS-485 is a true multipoint standard that allows up to 32 one unit load devices (any combination of drivers and receivers) on each bus. To allow for multipoint operation, the RS-485 specification requires that drivers handle bus contention without sustaining any damage. Another important advantage of RS-485 is the extended Common-Mode Range (CMR). The CMR specifies that the driver outputs and receiver inputs withstand signals that range from +12V to -7V. RS-422 and RS-485 are intended for runs as long as 4000 ft, so the wide CMR is necessary to handle ground potential differences and voltages induced in the cable by external fields. Receiver Features The devices use a differential input receiver for maximum noise immunity and common-mode rejection. Input sensitivity is ±200mV as required by the RS-422 and RS-485 specifications. All the receivers include a “fail-safe if open” function that ensures a high level receiver output if the receiver inputs are unconnected (floating). Receivers easily meet the data rates supported by the corresponding driver. ISL8483E and ISL8485E receiver outputs are tri-statable through the active low RE input. Driver Features The RS-485 and RS-422 drivers are differential output devices that deliver at least 1.5V across a 54Ω load (RS-485) and at least 2V across a 100Ω load (RS-422). The drivers feature low propagation delay skew to maximize bit width and to minimize EMI. The ISL8483E and ISL8485E drivers are tri-statable using the active high DE input. The ISL8483E driver outputs are slew rate limited to minimize EMI and to minimize reflections in unterminated or improperly terminated networks. The data rate on these slew rate limited versions is a maximum of 250kbps. The ISL8485E driver outputs are not limited, so faster output transition times allow data rates of at least 10Mbps. Receiver input impedance surpasses the RS-422 spec of 4kΩ and meets the RS-485 “Unit Load” requirement of 12kΩ minimum. Receiver inputs function with common-mode voltages as high as ±7V outside the power supplies (for example, +12V and -7V), making them ideal for long networks where induced voltages are a realistic concern. FN6048 Rev.13.00 Sep 24, 2018 Page 8 of 15 ISL8483E, ISL8485E Data Rate, Cables, and Terminations Low Power Shutdown Mode (ISL8483E Only) RS-485 and RS-422 are intended for network lengths up to 4000 ft, but the maximum system data rate decreases as the transmission length increases. Devices operating at 10Mbps are limited to lengths less than 100 feet, and the 250kbps versions can operate at full data rates with lengths in excess of 1000 ft. These CMOS transceivers all use a fraction of the power required by their bipolar counterparts, but the ISL8483E includes a shutdown feature that reduces the already low quiescent ICC to a 1nA trickle. The ISL8483E enters shutdown whenever the receiver and driver are simultaneously disabled (RE = VCC and DE = GND) for a period of at least 600ns. Disabling both the driver and the receiver for fewer than 50ns ensures that the ISL8483E does not enter shutdown. Twisted pair cable is the cable of choice for the RS-485 and RS422 networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common-mode signals, which are effectively rejected by the differential receivers in these ICs. Proper termination is imperative when using the 10Mbps devices to minimize reflections. Short networks using the 250kbps versions do not need to be terminated, but terminations are recommended unless power dissipation is an overriding concern. In point-to-point or point-to-multipoint (single driver on bus) networks, terminate the main cable in its characteristic impedance (typically 120Ω) at the end farthest from the driver. In multi-receiver applications, keep stubs connecting receivers to the main cable as short as possible. In multipoint (multi-driver) systems, terminate the main cable in its characteristic impedance at both ends. Keep stubs that are connecting a transceiver to the main cable as short as possible. Built-In Driver Overload Protection The RS-485 specification requires that drivers survive worst case bus contentions undamaged. The ISL848xE devices meet this requirement through driver output short-circuit current limits and on-chip thermal shutdown circuitry. The driver output stages incorporate short-circuit current limiting circuitry that ensures that the output current never exceeds the RS-485 specification, even at the common-mode voltage range extremes. Also, these devices use a foldback circuit that reduces the short-circuit current and consequently the power dissipation when the contending voltage exceeds either supply. In the event of a major short-circuit condition, the ISL848xE devices perform a thermal shutdown that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation allowing the die to cool. The drivers automatically re-enable after the die temperature drops about 15°. If the contention persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown. Note that receiver and driver enable times increase when the ISL8483E enables from shutdown. Refer to Notes 9 through Notes 12 on page 6 at the end of the “Electrical Specifications” table for more information. ESD Protection All pins on these interface devices include Class 3 Human Body Model (HBM) ESD protection structures, but the RS-485 pins (driver outputs and receiver inputs) incorporate advanced structures allowing them to survive ESD events in excess of ±15kV HBM. The RS-485 pins are particularly vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins or connecting a cable can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up without either allowing any latchup mechanism to activate and without degrading the RS-485 common-mode range of -7V to +12V. The built-in ESD protection eliminates the need for board level protection structures (such as transient suppression diodes) and the associated, undesirable capacitive load that they present. Human Body Model Testing As the name implies, the HBM test method emulates the ESD event delivered to an IC during human handling. The tester delivers the charge stored on a 100pF capacitor through a 1.5kΩ current limiting resistor into the pin under test. The HBM method determines an IC’s ability to withstand the ESD events typically present during handling and manufacturing. The RS-485 pin survivability on this high ESD family has been characterized to be in excess of ±15kV for discharges to GND. Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: 518 PROCESS: Si Gate CMOS FN6048 Rev.13.00 Sep 24, 2018 Page 9 of 15 ISL8483E, ISL8485E 90 3.6 80 3.4 DIFFERENTIAL OUTPUT VOLTAGE (V) DRIVER OUTPUT CURRENT (mA) Typical Performance Curves VCC = 5V, TA = +25°C, ISL8483E and ISL8485E; unless otherwise specified. 70 60 50 40 30 20 10 0 0 1 2 3 4 3.2 3.0 2.8 2.6 2.4 RDIFF = 54Ω 2.2 2.0 -40 5 RDIFF = 100Ω -25 DIFFERENTIAL OUTPUT VOLTAGE (V) FIGURE 6. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT VOLTAGE 700 140 650 Y OR Z = LOW 80 550 60 500 40 20 0 -20 75 85 75 85 ISL8485E, DE = VCC, RE = X ISL8485E, DE==GND, GND,RE RE==XX ISL8485, DE 450 ISL8483E, DE = VCC, RE = X 400 350 Y OR Z = HIGH -40 300 -60 250 -80 -100 -120 50 600 ICC (µA) OUTPUT CURRENT (mA) 100 25 FIGURE 7. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs TEMPERATURE 160 120 0 TEMPERATURE (°C) 200 -7 -6 -4 -2 0 2 4 6 OUTPUT VOLTAGE (V) 8 10 150 -40 12 ISL8483E, DE = GND, RE = GND -25 0 25 TEMPERATURE (oC) 50 FIGURE 9. SUPPLY CURRENT vs TEMPERATURE FIGURE 8. DRIVER OUTPUT CURRENT vs SHORT-CIRCUIT VOLTAGE 400 1200 tPLHY 1000 tPLHZ 300 SKEW (ns) PROPAGATION DELAY (ns) 1100 900 tPHLY 800 tPHLZ 700 |tPHLY - tPLHZ| 200 100 600 500 -40 |tPLHY - tPHLZ| |CROSS PT. OF Y AND Z - CROSS PT. OF YAND Z| -25 0 25 50 75 TEMPERATURE (°C) FIGURE 10. DRIVER PROPAGATION DELAY vs TEMPERATURE (ISL8483E) FN6048 Rev.13.00 Sep 24, 2018 85 0 -40 -25 0 25 50 75 TEMPERATURE (°C) FIGURE 11. DRIVER SKEW vs TEMPERATURE (ISL8483E) Page 10 of 15 85 ISL8483E, ISL8485E Typical Performance Curves VCC = 5V, TA = +25°C, ISL8483E and ISL8485E; unless otherwise specified. (Continued) 3.0 2.5 35 tPHLY tPHLZ 30 SKEW (ns) PROPAGATION DELAY (ns) 40 tPLHZ |tPHLY - tPLHZ| |tPLHY - tPHLZ| 2.0 tPLHY 25 1.5 |CROSSING PT. OF Y- AND Z¯ - CROSSING PT. OF Y¯ AND Z-| 0 25 50 1 -40 85 75 -25 TEMPERATURE (°C) 0 5 RO 0 3 2 DRIVER OUTPUT (V) 4 RECEIVER OUTPUT (V) 5 DRIVER INPUT (V) RECEIVER OUTPUT (V) DRIVER OUTPUT (V) DI B/Z A/Y 1 0 DI 0 3 2 DRIVER OUTPUT (V) 4 B/Z A/Y 1 0 TIME (10ns/DIV) FIGURE 16. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL8485E) FN6048 Rev.13.00 Sep 24, 2018 RECEIVER OUTPUT (V) 5 DRIVER INPUT (V) RECEIVER OUTPUT (V) DRIVER OUTPUT (V) RO 5 0 5 RO 0 4 3 A/Y 2 B/Z 1 0 TIME (400ns/DIV) 0 5 85 75 FIGURE 15. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL8483E) FIGURE 14. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL8483E) DI 50 RDIFF = 54Ω, CL = 100pF TIME (400ns/DIV) RDIFF = 54Ω, CL = 100pF 25 FIGURE 13. DRIVER SKEW vs TEMPERATURE (ISL8485E) FIGURE 12. DRIVER PROPAGATION DELAY vs TEMPERATURE (ISL8485E) RDIFF = 54Ω, CL = 100pF 0 TEMPERATURE (°C) DRIVER INPUT (V) -25 RDIFF = 54Ω, CL = 100pF DI 5 5 0 RO 0 4 3 A/Y 2 B/Z 1 0 TIME (10ns/DIV) FIGURE 17. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL8485E) Page 11 of 15 DRIVER INPUT (V) 20 -40 ISL8483E, ISL8485E Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please visit our website to make sure that you have the latest revision. DATE REVISION CHANGE Sept 24, 2018 FN6048.13 Updated the Ordering Information table by adding tape and reel information, removing part, and updating notes. Updated Typical Operating Circuits on page 2. Removed About Intersil section and updated disclaimer. Aug 31, 2017 FN6048.12 Updated Receiving Truth table on page 2. Applied Intersil A Renesas Company template. May 8, 2017 FN6048.11 Applied new header/footer Removed any mention of military version. Updated ordering information table on page 2 as follows: Updated Note 2, added Notes 3, and 5. Sept 3, 2015 FN6048.10 - Ordering Information Table on page 2. - Added Revision History. - Added About Intersil Verbiage. -Updated POD M8.15 to most current revision with changes as follows: -Revision 1 to Revision 2 Changes: Updated to new POD format by removing table and moving dimensions onto drawing and adding land pattern -Revision 2 to Revision 3 Changes: Changed Note 1 "1982" to "1994" Changed in Typical Recommended Land Pattern the following: 2.41(0.095) to 2.20(0.087) 0.76 (0.030) to 0.60(0.023) 0.200 to 5.20(0.205) -Revision 3 to Revision 4 Changes: Changed Note 1 "1982" to "1994" FN6048 Rev.13.00 Sep 24, 2018 Page 12 of 15 ISL8483E, ISL8485E Package Outline Drawings For the most recent package outline drawing, see M8.15. M8.15 8 lead narrow body small outline plastic package Rev 4, 1/12 DETAIL "A" 1.27 (0.050) 0.40 (0.016) INDEX 6.20 (0.244) 5.80 (0.228) AREA 0.50 (0.20) x 45° 0.25 (0.01) 4.00 (0.157) 3.80 (0.150) 1 2 8° 0° 3 0.25 (0.010) 0.19 (0.008) SIDE VIEW “B” TOP VIEW 2.20 (0.087) SEATING PLANE 5.00 (0.197) 4.80 (0.189) 1.75 (0.069) 1.35 (0.053) 1 8 2 7 0.60 (0.023) 1.27 (0.050) 3 6 4 5 -C- 1.27 (0.050) 0.51(0.020) 0.33(0.013) SIDE VIEW “A 0.25(0.010) 0.10(0.004) 5.20(0.205) TYPICAL RECOMMENDED LAND PATTERN NOTES: 17. Dimensioning and tolerancing per ANSI Y14.5M-1994. 18. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 19. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 20. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 21. Terminal numbers are shown for reference only. 22. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 23. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 24. This outline conforms to JEDEC publication MS-012-AA ISSUE C. FN6048 Rev.13.00 Sep 24, 2018 Page 13 of 15 ISL8483E, ISL8485E For the most recent package outline drawing, see E8.3. N E1 INDEX AREA 1 2 3 E8.3 (JEDEC MS-001-BA ISSUE D) N/2 8 LEAD DUAL-IN-LINE PLASTIC PACKAGE -B- INCHES -AE D BASE PLANE -C- SEATING PLANE A2 e B1 D1 B 0.010 (0.25) M A1 MAX MIN MAX NOTES A - 0.210 - 5.33 4 0.015 - 0.39 - 4 C L A2 0.115 0.195 2.93 4.95 - eA B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.15 1.77 8, 10 C 0.008 0.014 0.204 0.355 - eC C A B S MILLIMETERS MIN A1 A L D1 SYMBOL C eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . D 0.355 0.400 9.01 10.16 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC 6 eB - 0.430 - 10.92 7 L 0.115 0.150 2.93 3.81 4 N 8 8 9 Rev. 0 12/93 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 1.14mm). FN6048 Rev.13.00 Sep 24, 2018 Page 14 of 15 Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation or any other use of the circuits, software, and information in the design of your product or system. Renesas Electronics disclaims any and all liability for any losses and damages incurred by you or third parties arising from the use of these circuits, software, or information. 2. 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