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M37224M3

M37224M3

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

  • 描述:

    M37224M3 - SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTR...

  • 数据手册
  • 价格&库存
M37224M3 数据手册
To all our customers Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices and power devices. Renesas Technology Corp. Customer Support Dept. April 1, 2003 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER DESCRIPTION The M37224M3-XXXSP is a single-chip microcomputer designed with CMOS silicon gate technology. They are housed in a 42-pin shrink plastic molded DIP. In addition to their simple instruction sets, the ROM, RAM and I/O addresses are placed on the same memory map to enable easy programming. The M37224M3-XXXSP has a PWM output function and a OSD display function, so it is useful for a channel selection system for TV. PIN CONFIGURATION (TOP VIEW) HSYNC VSYNC P00/PWM0 P01/PWM1 P02/PWM2 P03/PWM3 P04/PWM4 P05/PWM5 P06/INT2/A-D4 P07/INT1 P23/TIM3 P24/TIM2 P25 P26 P27 D-A P32 CNVSS XIN X OUT VSS 1 2 3 4 5 6 7 42 41 40 39 38 37 36 P52/R P53/G P54/B P55/OUT P20/SCLK P21/SOUT P22/SIN P10 P11 P12 P13 P14 P15/A-D1/INT3 P16/A-D2 P17/A-D3 P30/A-D5/DA1 P31/A-D6/DA2 RESET OSC1/P33 OSC2/P34 VCC FEATURES • Number of basic instructions ..................................................... 71 • Memory size ROM ....................................................... 12 K bytes RAM .......................................................... 256 bytes ROM for display ........................................ 8 K bytes RAM for display .......................................... 96 bytes Minimum instruction execution time ......................................... 0.5 µs (at 8 MHz oscillation frequency) Power source voltage ................................................... 5 V ± 10 % Power dissipation ............................................................. 165 mW (at 8 MHz oscillation frequency, VCC=5.5V, at CRT display) Subroutine nesting ....................................... 96 levels (maximum) Interrupts ....................................................... 13 types, 13 vectors 8-bit timers .................................................................................. 4 Programmable I/O ports (Ports P0, P1, P2, P30–P32) .............. 27 Input ports (Ports P33, P34) ........................................................ 2 Output ports (Ports P52–P55) ...................................................... 4 12 V withstand ports .................................................................... 6 LED drive ports ........................................................................... 4 Serial I/O ............................................................ 8-bit ! 1 channel A-D comparator (6-bit resolution) ................................. 6 channels D-A converter (6-bit resolution) ................................................... 2 PWM output circuit ......................................... 14-bit ! 1, 8-bit ! 6 ROM correction function ........................................... 32 bytes ! 2 M37224M3-XXXSP 8 9 10 11 12 13 14 15 16 17 18 19 20 21 35 34 33 32 31 30 29 28 27 26 25 24 23 22 • • • • • • • • • • • • • • • • Outline 42P4B • CRT display function Number of display characters ................ 20 characters ! 2 lines (16 lines maximum) Kinds of characters ..................................................... 128 kinds Dot structure ........................................................... 12 ! 16 dots Kinds of character sizes .................................................. 3 kinds Kinds of character colors (It can be specified by the character) maximum 7 kinds (R, G, B) Kinds of raster colors (maximum 7 kinds) Display position Horizontal .................................................................. 64 levels Vertical .................................................................... 128 levels Bordering (horizontal and vertical) APPLICATION TV INT3 INT2 INT1 SIN SCLK SOUT PWM5 PWM4 PWM3 PWM2 PWM1 PWM0 OUT B G R 16 17 26 27 39 40 41 42 10 9 8 7 6 5 4 3 28 29 30 31 32 33 34 35 15 14 13 12 11 36 37 38 M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER MITSUBISHI MICROCOMPUTERS I/O port P0 I/O port P1 I/O port P2 D-A I/O ports P30–P3 2 Output ports P5 2–P55 Synchronous signal input Output for display VSYNC HSYNC 21 2 VCC 22 18 24 21 23 FUNCTIONAL BLOCK DIAGRAM of M37224M3-XXXSP Input ports P3 3, P34 Clock input for display Clock output for display OSC1 OSC2 Clock input Clock output XIN XOUT ( ) Timing output VSS CNV SS Reset input RESET 19 20 25 Clock generating circuit TIM2 TIM3 Data bus Timer count source selection circuit Timer 1 T1 (8) Timer 2 T2 (8) Timer 3 T3 (8) Control signal Instruction decoder Instruction register (8) CRT circuit Timer 4 T4 (8) RAM 256 bytes Program counter Program counter ROM 12 K bytes PCH (8) PCL (8) Address bus 8-bit arithmetic and logical unit Index register Y (8) Stack pointer S (8) Accumulator A (8) Processor status register PS (8) Index register X (8) A-D comparator Multi-master I 2 C-BUS interface P3 (3) 14-bit PWM circuit D-A converter SI/O(8) 8-bit PWM circuit ROM correction function P5 (4) P0 (8) P1 (8) P2 (8) MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER FUNCTIONS Parameter Number of basic instructions Instruction execution time Clock frequency Memory size ROM RAM CRT ROM CRT RAM Input/Output ports P0 P10–P17 P20, P21 P22–P27 P30, P31 P32 P33, P34 P52–P55 Serial I/O A-D comparator D-A converter PWM output circuit Timers ROM correction function Subroutine nesting Interrupt I/O I/O I/O I/O I/O I/O Input Output Functions 71 0.5 µs (the minimum instruction execution time, at 8 MHz oscillation frequency) 8 MHz (maximum) 12 K bytes 256 bytes 4 K bytes 80 bytes 8-bit ! 1 (N-channel open-drain output structure, can be used as PWM output pins, INT input pins, A-D input pin) 8-bit ! 1 (CMOS input/output structure, can be used as A-D input pins, INT input pin) 2-bit ! 1 (CMOS input/output or N-channel open-drain output structure, can be used as serial I/O pins) 6-bit ! 1 (CMOS input/output structure, can be used as serial input pin, external clock input pins) 2-bit ! 1 (CMOS input/output or N-channel open-drain output structure, can be used as A-D input pins, D-A conversion output pins) 1-bit ! 1 (N-channel open-drain output structure) 2-bit ! 1 (can be used as CRT display clock I/O pins) 4-bit ! 1 (CMOS output structure, can be used as CRT output pins) 8-bit ! 1 6 channels (6-bit resolution) 2 (7-bit resolution) 14-bit ! 1, 8-bit ! 6 8-bit timer ! 4 32 bytes ! 2 96 levels (maximum) External interrupt ! 3, Internal timer interrupt ! 4, Serial I/O interrupt ! 1, CRT interrupt ! 1 , f(X IN )/4096 interrupt ! 1 , V SYNC i nterrupt ! 1 , BRK interrupt ! 1 2 built-in circuits (externally connected to a ceramic resonator or a quartzcrystal oscillator) 5 V ± 10 % CRT ON CRT OFF In stop mode Operating temperature range Device structure Package CRT display function Number of display characters Dot structure Kinds of characters Kinds of character sizes Kinds of character colors Display position (horizontal, vertical) 165 mW typ. (at oscillation frequency f(XIN) = 8 MHz, fCRT = 8 MHz) 110 mW typ. (at oscillation frequency f(XIN) = 8 MHz) 1.65 mW (maximum) –10 °C to 70 °C CMOS silicon gate process 42-pin shrink plastic molded DIP 20 characters ! 2 lines (maximum 16 lines by software) 12 ! 16 dots 128 kinds 3 kinds Maximum 7 kinds (R, G, B); can be specified by the character 64 levels (horizontal) ! 128 levels (vertical) Clock generating circuit Power source voltage Power dissipation 3 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER PIN DESCRIPTION Pin VCC, VSS. CNVSS Name Power source Input/ Output Functions Apply voltage of 5 V ± 10 % (typical) to VCC, and 0 V to VSS. ______ CNVSS Reset input Input Connected to VSS. To enter the reset state, the reset input pin must be kept at a “L” for 2 µs or more (under normal VCC conditions). If more time is needed for the quartz-crystal oscillator to stabilize, this “L” condition should be maintained for the required time. This chip has an internal clock generating circuit. To control generating frequency, an external ceramic resonator or a quartz-crystal oscillator is connected between pins XIN and XOUT. If an external clock is used, the clock source should be connected to the XIN pin and the XOUT pin should be left open. Port P0 is an 8-bit I/O port with direction register allowing each I/O bit to be individually programmed as input or output. At reset, this port is set to input mode. The output structure is N-channel open-drain output. See notes at end of Table for full details of port P0 functions. Pins P00–P05 are also used as PWM output pins PWM0–PWM5 respectively. The output structure is N-channel open-drain output. Pins P06 , P07 are also used as external interrupt input pins INT2, INT1 respectively. P06 pin is also used as analog input pin A-D4. Port P1 is an 8-bit I/O port and has basically the same functions as port P0. The output structure is CMOS output. Pins P15–P17 are also used as analog input pins A-D1 to A-D3 respectively. P15 pin is also used as external interrupt input pin INT3. Port P2 is an 8-bit I/O port and has basically the same functions as port P0. The output structure is CMOS output. Pins P23, P24 are also used as external clock input pins TIM3, TIM2 respectively. P20 pin is also used as serial I/O synchronous clock input/output pin SCLK. The output structure is N-channel open-drain output. Pin P21 is also used as serial I/O data output pin SOUT. The output structure is N-channel open-drain output. Pin P22 is also used as serial I/O data input pin SIN. Ports P30–P32 are 3-bit I/O ports and have basically the same functions as port P0. Either CMOS output or N-channel open-drain output structure can be selected as the port P30 and P31. The output structure of port P32 is N-channel open-drain output. Pins P30, P31 are also used as analog input pins A-D5, A-D6 respectively. Pins P30, P31 are also used as D-A conversion output pins DA1, DA2 respectively. Ports P33, P34 are 2-bit input ports. P33 pin is also used as CRT display clock input pin OSC1. P34 pin is also used as CRT display clock output pin OSC2. The output structure is CMOS output. RESET XIN XOUT P00/PWM0– P05/PWM5, P06/INT2/ A-D4, P07/INT1 Clock input Clock output I/O port P0 Input Output I/O PWM output External interrupt input Analog input Output Input Input I/O Input Input I/O Input I/O P10–P14, P15/A-D1/ INT3, P16/A-D2, P17/A-D3 P20/SCLK, P21/SOUT, P22/SIN, P23/TIM3, P24/TIM2, P25–P27 I/O port P1 Analog input External interrupt input I/O port P2 External clock input Serial I/O synchronous clock input/ output Serial I/O data output Serial I/O data input Output Input I/O P30/A-D5/ DA1, P31/A-D6/ DA2, P32 I/O port P3 Analog input D-A conversion output Input Output Input Input Output P33/OSC1, Input port P3 P34/OSC2 Clock input for CRT display Clock output for CRT display 4 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER PIN DESCRIPTION (continued) Pin P52/R, P53/G, P54/B, P55/OUT HSYNC VSYNC D-A Name Output port P5 CRT output HSYNC input VSYNC input DA output Input/ Output Output Output Input Input Output Functions Ports P52–P55 are a 4-bit output port. The output structure is CMOS output. Pins P52–P55 are also used as CRT output pins R, G, B, OUT respectively. The output structure is CMOS output. This is a horizontal synchronous signal input for CRT. This is a vertical synchronous signal input for CRT. This is a 14-bit PWM output pin. Note : As shown in the memory map (Figure 5), port P0 is accessed as a memory at address 00C016 of zero page. Port P0 has the port P0 direction register (address 00C116 of zero page) which can be used to program each bit as an input (“0”) or an output (“1”). The pins programmed as “1” in the direction register are output pins. When pins are programmed as “0,” they are input pins. When pins are programmed as output pins, the output data are written into the port latch and then output. When data is read from the output pins, the output pin level is not read but the data of the port latch is read. This allows a previously-output value to be read correctly even if the output LOW voltage has risen, for example, because a light emitting diode was directly driven. The input pins are float, so the values of the pins can be read. When data is written into the input pin, it is written only into the port latch, while the pin remains in the floating state. 5 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Ports P00–P05, P32 N-channel open drain output Direction register Ports P00–P05, P32 Data bus Port latch Note: Each port is also used as follows: P00–P05 : PWM0–PWM5 Ports P1, P2, P30, P31 Direction register CMOS output Ports P1, P2, P30, P31 Note: Each port is also used as follows: P15 : A-D1/INT3 P16 : A-D2 P17 : A-D3 P20 : SCLK P21 : SOUT P22 : SIN P23 : TIM3 P24 : TIM2 P30 : A-D5/DA1 P31 : A-D6/DA2 Data bus Port latch Ports P06, P07 N-channel open-drain output Direction register Ports P06, P07 Data bus Port latch Note: Each port is also used as follows: P06 : INT2/A-D4 P07 : INT1 Fig. 1. I/O Pin Block Diagram (1) 6 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER HSYNC, VSYNC D-A, P5 2–P5 5 Schmidt input Internal circuit HSYNC, VSYNC Internal circuit CMOS output D-A, P52–P55 Note: Each port is also used as follows: P52 : R P53 : G P54 : B OUT : P55 Fig. 2. I/O Pin Block Diagram (2) 7 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER FUNCTIONAL DESCRIPTION Central Processing Unit (CPU) The M37224M3-XXXSP uses the standard 740 Family instruction set. Refer to the table of 740 Family addressing modes and machine instructions or the SERIES 740 User’s Manual for details on the instruction set. Machine-resident 740 family instructions are as follows: The FST, SLW instruction cannot be used. The MUL, DIV, WIT and STP instructions can be used. CPU Mode Register The CPU mode register contains the stack page selection bit. The CPU mode register is allocated at address 00FB16. CPU Mode Register b7 b6 b5 b4 b3 b2 b1 b0 00 11111 CPU mode register (CPUM (CM)) [Address FB 16] B Name 0, 1 Processor mode bits (CM0, CM1) Functions b1 b0 After reset R W 0 RW 0 0 1 1 0: Single-chip mode 1: 0: Not available 1: 1 1 RW RW 2 Stack page selection bit (CM2) (See note) 0: 0 page 1: 1 page 3 Fix these bits to “1.” to 7 Note: This bit is set to “1” after the reset release. Fig. 3. CPU Mode Register 8 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER MEMORY Special Function Register (SFR) Area The special function register (SFR) area in the zero page contains control registers such as I/O ports and timers. Interrupt Vector Area The interrupt vector area contains reset and interrupt vectors. Zero Page The 256 bytes from addresses 000016 to 00FF16 are called the zero page area. The internal RAM and the special function registers (SFR) are allocated to this area. The zero page addressing mode can be used to specify memory and register addresses in the zero page area. Access to this area with only 2 bytes is possible in the zero page addressing mode. RAM RAM is used for data storage and for stack area of subroutine calls and interrupts. ROM ROM is used for storing user programs as well as the interrupt vector area. Special Page The 256 bytes from addresses FF0016 to FFFF16 are called the special page area. The special page addressing mode can be used to specify memory addresses in the special page area. Access to this area with only 2 bytes is possible in the special page addressing mode. RAM for Display RAM for display is used for specifying the character codes and colors to display. ROM for Display ROM for display is used for storing character data. ROM Correction Memory (RAM) This is used as the program area for ROM correction. 000016 Zero page SFR area 00FF16 013F16 Not used 021716 021B16 02C0 16 2 page register Not used ROM for display (4K bytes) 1000016 RAM (256 bytes) 00C0 16 10FFF16 ROM correction memory (RAM) 02FF16 RAM for display (Note) (80 bytes) Not used 060016 06B316 Not used D000 16 Block 1: addresses 02C0 16 to 02DF16 Block 2: addresses 02E0 16 to 02FF 16 Not used ROM (12K bytes) FF0016 FFDE16 FFFF 16 Interrupt vector area Special page 1FFFF 16 Note: Refer to Table 8. Contents of CRT display RAM. Fig. 4. Memory Map 9 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER sSFR Area (addresses C016 to DF16) < Bit allocation> < State immediately after reset > 0 : “0” immediately after reset Function bit 1 : “1” immediately after reset ? : Undefined immediately after reset : Name : : No function bit 0 : Fix this bit to “0” (do not write “1”) 1 : Fix this bit to “1” (do not write “0”) Address C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16 Register b7 Bit allocation b0 b7 State immediately after reset ? 0016 ? 0016 ? 0016 ?? 0016 ? ? ?? 0016 ? 0016 ? ?? ? ? ? ? ? 0016 0016 ? ? ? ? ? 0016 ? ? ? b0 Port P0 (P0) Port P0 direction register (D0) Port P1 (P1) Port P1 direction register (D1) Port P2 (P2) Port P2 direction register (D2) Port P3 (P3) Port P3 direction register (D3) 0 0 0 ? ? ? Port P5 (P5) Port P5 direction register (D5) Port P3 output mode control register (P3S) DA-H register (DA-H) DA-L register (DA-L) PWM0 register (PWM0) PWM1 register (PWM1) PWM2 register (PWM2) PWM3 register (PWM3) PWM4 register (PWM4) PWM output control register 1 (PW) PWM output control register 2 (PN) PW7 PW6 PW5 PW4 PW3 PW2 PW1 PW0 PN4 PN3 PN2 DA2S DA1S P31S P30S 0 0 ? ? ? ? 0 0 ? ? ? ? Serial I/O mode register (SM) Serial I/O regsiter (SIO) DA1 conversion register (DA1) DA2 conversion register (DA2) SM6 SM5 0 SM3 SM2 SM1 SM0 DA17 DA27 0 0 DA15 DA14 DA13 DA12 DA11 DA10 DA25 DA24 DA23 DA22 DA21 DA20 Fig. 5. Memory Map of SFR (special function register) (1) 10 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER s SFR Area (addresses E016 to FF16) < Bit allocation > < State immediately after reset > 0 : “0” immediately after reset Function bit 1 : “1” immediately after reset ? : Undefined immediately after reset : Name : : No function bit 0 : Fix this bit to “0” (do not write “1”) 1 : Fix this bit to “1” (do not write “0”) Address Register b7 Bit allocation b0 b7 State immediately after reset 0016 ?? ?? ? 0? 00 0016 0016 0016 0016 0016 ? 0016 0016 ?0 0016 FF16 0716 FF16 0716 0016 0016 ? ? ? CK0 0 0 0016 FC16 0016 0016 0016 0016 b0 E016 Horizontal register (HR) E116 Vertical register 1 (CV1) E216 E316 E416 E516 E616 E716 E816 E916 EA16 EB16 EC16 ED16 EE16 EF16 F016 F116 F216 F316 F416 F516 F616 F716 F816 F916 FA16 FB16 FC16 FD16 FE16 FF16 Vertical register 1 (CV1) Character size register (CS) Border selection register (MD) Color register 0 (CO0) Color register 1 (CO1) Color register 2 (CO2) Color register 3 (CO3) CRT control register (CO) CRT port control register (CRTP) CRT clock selection register (CK) A-D control register 1 (AD1) A-D control register 2 (AD2) Timer 1 (TM1) Timer 2 (TM2) Timer 3 (TM3) Timer 4 (TM4) Timer 12 mode register (T12M) Timer 34 mode register (T34M) PWM5 register (PWM5) HR5 HR4 HR3 HR2 HR1 HR0 CV16 CV15 CV14 CV13 CV12 CV11 CV10 CV26 CV25 CV24 CV23 CV22 CV21 CV20 0 0 0 0 ? ? 0 0 ? ? 0 0 ? ? ? ? ? ? ? 0 ? ? ? ? CS21 CS20 CS11 CS10 MD20 CO05 CO15 CO25 CO35 CO03 CO02 CO01 CO13 CO12 CO11 CO23 CO22 CO21 CO33 CO32 CO31 MD10 0 0 0 0 CC2 CC1 CC0 OP7 OP6 OP5 OUT R/G/B VSYC HSYC 0 0 0 0 ADM4 0 0 CK1 CK0 ADM2 ADM1 ADM0 0 0 0 0 0 0 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0 0 T12M4 T12M3 T12M2 T12M1 T12M0 T34M5 T34M4 T34M3 T34M2 T34M1 T34M0 Interrupt input polarity register (RE) Test register (TEST) CPU mode register (CPUM) Interrupt request register 1 (IREQ1) Interrupt request register 2 (IREQ2) Interrupt control register 1 (ICON1) Interrupt control register 2 (ICON2) 0 1 IT3R RE5 RE4 RE3 CK0 0 CM2 0 0 0 0 0 0 0 0 ? 1 1 0016 11 MSR CK0 VSCR CRTR TM4R TM3R TM2R TM1R 0 IT3E S1R IT2R IT1R VSCE CRTE TM4E TM3E TM2E TM1E 0 0 0 MSE 0 S1E IT2E IT1E Fig. 6. Memory Map of SFR (special function register) (2) 11 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER sSFR Area (addresses 21716 to 21B16) < Bit allocation > < State immediately after reset > 0 : “0” immediately after reset Function bit 1 : “1” immediately after reset ? : Undefined immediately after reset : Name : : No function bit 0 : Fix this bit to “0” (do not write “1”) 1 : Fix this bit to “1” (do not write “0”) Address 21716 21816 21916 21A16 21B16 Register b7 Bit allocation b0 b7 State immediately after reset 0016 0016 0016 0016 ?0 b0 ROM correction address 1 (high-order) ROM correction address 1 (low-order) ROM correction address 2 (high-order) ROM correction address 2 (low-order) ROM correction enable register (RCR) 0 0 RC1RC0 ? ? ? 0 0 0 Fig. 7. Memory Map of 2 Page Register < Bit allocation > 0 : “0” immediately after reset : Name : Function bit 1 : “1” immediately after reset ? : Undefined immediately after reset : No function bit 0 : Fix this bit to “0” (do not write “1”) 1 : Fix this bit to “1” (do not write “0”) Register b7 Processor status register (PS) Program counter (PCH) Program counter (PCL) Bit allocation b0 b7 State immediately after reset b0 N V T B D I Z C ?????1?? Contents of address FFFF 16 Contents of address FFFE 16 Fig. 8. Internal State of Processor Status Register and Program Counter at Reset 12 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER INTERRUPTS Interrupts can be caused by 13 different sources consisting of 4 external, 7 internal, 1 software, and reset. Interrupts are vectored interrupts with priorities shown in Table 1. Reset is also included in the table because its operation is similar to an interrupt. When an interrupt is accepted, (1) The contents of the program counter and processor status register are automatically stored into the stack. (2) The interrupt disable flag I is set to “1” and the corresponding interrupt request bit is set to “0.” (3) The jump destination address stored in the vector address enters the program counter. Other interrupts are disabled when the interrupt disable flag is set to “1.” All interrupts except the BRK instruction interrupt have an interrupt request bit and an interrupt enable bit. The interrupt request bits are in interrupt request registers 1 and 2 and the interrupt enable bits are in interrupt control registers 1 and 2. Figures 10 to 14 show the interrupt-related registers. Interrupts other than the BRK instruction interrupt and reset are accepted when the interrupt enable bit is “1,” interrupt request bit is “1,” and the interrupt disable flag is “0.” The interrupt request bit can be set to “0” by a program, but not set to “1.” The interrupt enable bit can be set to “0” and “1” by a program. Reset is treated as a non-maskable interrupt with the highest priority. Figure 9 shows interrupt control. Interrupt Causes (1) VSYNC and CRT interrupts The VSYNC interrupt is an interrupt request synchronized with the vertical sync signal. The CRT interrupt occurs after character block display to the CRT is completed. (2) INT1, INT2, INT3 interrupts With an external interrupt input, the system detects that the level of a pin changes from “L” to “H” or from “H” to “L,” and generates an interrupt request. The input active edge can be selected by bits 3, 4 and 5 of the interrupt input polarity register (address 00F9 16) : when this bit is “0,” a change from “L” to “H” is detected; when it is “1,” a change from “H” to “L” is detected. Note that all bits are cleared to “0” at reset. (3) Timer 1, 2, 3 and 4 interrupts An interrupt is generated by an overflow of timer 1, 2, 3 or 4. (4) Serial I/O interrupt This is an interrupt request from the clock synchronous serial I/O function. Table 1. Interrupt Vector Addresses and Priority Interrupt Source Reset CRT interrupt INT2 interrupt INT1 interrupt Timer 4 interrupt f(XIN)/4096 interrupt VSYNC interrupt Timer 3 interrupt Timer 2 interrupt Timer 1 interrupt Serial I/O interrupt INT3 interrupt BRK instruction interrupt Priority 1 2 3 4 5 6 7 8 9 10 11 12 13 Vector Addresses FFFF16, FFFE16 FFFD16, FFFC16 FFFB16, FFFA16 FFF916, FFF816 FFF516, FFF416 FFF316, FFF216 FFF116, FFF016 FFEF16, FFEE16 FFED16, FFEC16 FFEB16, FFEA16 FFE916, FFE816 FFE516, FFE416 FFDF16, FFDE16 Active edge selectable Non-maskable (software interrupt) Active edge selectable Active edge selectable Active edge selectable Non-maskable Remarks 13 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (5) f(XIN)/4096 interrupt This interrupt occurs regularly with a f(XIN)/4096 period. Set bit 0 of the PWM output control register 1 to “0.” (6) BRK instruction interrupt This software interrupt has the least significant priority. It does not have a corresponding interrupt enable bit, and it is not affected by the interrupt disable flag I (non-maskable). Interrupt request bit Interrupt enable bit Interrupt disable flag I BRK instruction Reset Interrupt request Fig. 9. Interrupt Control 14 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Interrupt Request Register 1 b7 b6 b5 b4 b3 b2 b1 b0 Interrupt request register 1 (IREQ1) [Address 00FC 16] B 0 Name Functions After reset R W 0 0 0 0 0 0 0 0 RV RV RV RV RV RV R— RV 0 : No interrupt request issued Timer 1 interrupt 1 : Interrupt request issued request bit (TM1R) 1 Timer 2 interrupt 0 : No interrupt request issued request bit (TM2R) 1 : Interrupt request issued 0 : No interrupt request issued 2 Timer 3 interrupt 1 : Interrupt request issued request bit (TM3R) 0 : No interrupt request issued Timer 4 interrupt 3 1 : Interrupt request issued request bit (TM4R) 0 : No interrupt request issued 4 CRT interrupt request bit (CRTR) 1 : Interrupt request issued 0 : No interrupt request issued 5 V SYNC interrupt request bit (VSCR) 1 : Interrupt request issued 6 Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” 7 INT3 interrupt 0 : No interrupt request issued request bit (IT3R) 1 : Interrupt request issued Fig. 10. Interrupt Request Register 1 Interrupt Request Register 2 b7 b6 b5 b4 b3 b2 b1 b0 0 Interrupt request register 2 (IREQ2) [Address 00FD16] B 0 Name Functions After reset R W 0 0 0 0 0 0 RV RV RV R— RV RW INT1 interrupt 0 : No interrupt request issued request bit (ITIR) 1 : Interrupt request issued 1 INT2 interrupt 0 : No interrupt request issued request bit (IT2R) 1 : Interrupt request issued 0 : No interrupt request issued 2 Serial I/O interrupt request bit (SIR) 1 : Interrupt request issued 3, Nothing is assigned. These bits are write disable bits. 5, 6 When these bits are read out, the values are “0.” 4 f(XIN)/4096 interrupt 0 : No interrupt request issued request bit (MSR) 1 : Interrupt request issued 7 Fix this bit to “0.” V: “0” can be set by software, but “1” cannot be set. Fig. 11. Interrupt Request Register 2 15 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Interrupt Control Register 1 b7 b6 b5 b4 b3 b2 b1 b0 Interrupt control register 1 (ICON1) [Address 00FE16] B 0 1 2 3 4 5 6 7 Name Timer 1 interrupt enable bit (TM1E) Timer 2 interrupt enable bit (TM2E) Timer 3 interrupt enable bit (TM3E) Timer 4 interrupt enable bit (TM4E) CRT interrupt enable bit (CRTE) VSYNC interrupt enable bit (VSCE) Functions 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled After reset R W 0 0 0 0 0 0 0 0 RW RW RW RW RW RW R— RW Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” INT3 interrupt enable bit 0 : Interrupt disabled (IN3E) 1 : Interrupt enabled Fig. 12. Interrupt Control Register 1 Interrupt Control Register 2 b7 b6 b5 b4 b3 b2 b1 b0 000 0 Interrupt control register 2 (ICON2) [Address 00FF16] B 0 Name Functions 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled After reset R W 0 0 0 0 0 : Interrupt disabled 1 : Interrupt enabled 0 RW RW RW RW RW INT1 interrupt enable bit (IT1E) 1 INT2 interrupt enable bit (IT2E) 2 Serial I/O interrupt enable bit (SIE) 3, Fix these bits to “0.” 5 to 7 4 f(XIN)/4096 interrupt enable bit (MSE) Fig. 13. Interrupt Control Register 2 16 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Interrupt Input Polarity Register b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 Interrupt input polarity register(RE) [Address 00F9 16 ] B 0 Name Functions After reset Indeterminate 0 RW R— RW RW RW RW R— RW Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is indeterminate. 1, 2 Fix these bits to “0.” 3 4 5 6 7 INT1 polarity switch bit (RE3) INT2 polarity switch bit (RE4) INT3 polarity switch bit (RE5) 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity 0 0 0 0 0 Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Fix this bit to “0.” Fig. 14. Interrupt Input Polarity Register 17 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER TIMERS The M37224M3-XXXSP has 4 timers: timer 1, timer 2, timer 3, and timer 4. All timers are 8-bit timer with the 8-bit timer latch. The timer block diagram is shown in Figure 17. All of the timers count down and their divide ratio is 1/(n+1), where n is the value of timer latch. By writing a count value to the corresponding timer latch (addresses 00F016 to 00F316), the value is also set to a timer, simultaneously. The count value is decremented by 1. The timer interrupt request bit is set to “1” by a timer overflow at the next count pulse, after the count value reaches “0016”. (1) Timer 1 Timer 1 can select one of the following count sources: f(XIN)/16 f(XIN)/4096 The count source of timer 1 is selected by setting bit 0 of the timer 12 mode register (address 00F416). Timer 1 interrupt request occurs at timer 1 overflow. At reset, timers 3 and 4 are connected by hardware and “FF16” is automatically set in timer 3; “0716” in timer 4. The f(XIN)/16 is selected as the timer 3 count source. The internal reset is released by timer 4 overflow in this state and the internal clock is connected. At execution of the STP instruction, timers 3 and 4 are connected by hardware and “FF16” is automatically set in timer 3; “0716” in timer 4. However, the f(XIN)/16 is not selected as the timer 3 count source. So set bit 0 of timer 34 mode register (address 00F516) to “0” before execution of the STP instruction (f(XIN)/16 is selected as the timer 3 count source). The internal STP state is released by timer 4 overflow in this state and the internal clock is connected. As a result of the above procedure, the program can start under a stable clock. Timer-related registers are shown in Figures 15 and 16. • • (2) Timer 2 Timer 2 can select one of the following count sources: f(XIN)/16 Timer 1 overflow signal External clock from the TIM2 pin The count source of timer 2 is selected by setting bits 1 and 4 of timer 12 mode register (address 00F4 16). When timer 1 overflow signal is a count source for timer 2, timer 1 functions as an 8-bit prescaler. Timer 2 interrupt request occurs at timer 2 overflow. • • • (3) Timer 3 Timer 3 can select one of the following count sources: f(XIN)/16 External clock from the HSYNC pin External clock from the TIM3 pin The count source of timer 3 is selected by setting bits 0 and 5 of timer 34 mode register (address 00F516) Timer 3 interrupt request occurs at timer 3 overflow. • • • (4) Timer 4 Timer 4 can select one of the following count sources: f(XIN)/16 f(XIN)/2 Timer 3 overflow signal The count source of timer 3 is selected by setting bits 1 and 4 of timer 34 mode register (address 00F516). When timer 3 overflow signal is a count source for timer 4, timer 3 functions as an 8-bit prescaler. Timer 4 interrupt request occurs at timer 4 overflow. • • • 18 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Timer 12 Mode Register b7 b6 b5 b4 b3 b2 b1 b0 0 Timer 12 mode register (T12M) [Address 00F416] B Name 0 Timer 1 count source selection bit (T12M0) 1 Timer 2 count source selection bit (T12M1) Timer 1 count stop bit (T12M2) Timer 2 count stop bit (T12M3) Timer 2 internal count source selection bit (T12M4) Fix this bit to “0.” Functions 0: f(XIN)/16 1: f(XIN)/4096 0: Internal clock 1: External clock from TIM2 pin 0: Count start 1: Count stop 0: Count start 1: Count stop 0: f(XIN)/16 1: Timer 1 overflow After reset R W 0 RW 0 RW 2 3 4 0 0 0 RW RW RW 5 0 0 RW R— 6,7 Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Fig. 15. Timer 12 Mode Register Timer 34 Mode Register b7 b6 b5 b4 b3 b2 b1 b0 Timer 34 mode register (T34M) [Address 00F516] B Name 0 Timer 3 count source selection bit (T34M0) 1 Timer 4 internal count source selection bit (T34M1) Timer 3 count stop bit (T34M2) Timer 4 count stop bit (T34M3) Timer 4 count source selection bit (T34M4) Functions 0: f(XIN)/16 1: External clock 0: Timer 3 overflow 1: f(X IN)/16 0: Count start 1: Count stop 0: Count start 1: Count stop 0: Internal clock 1: f(XIN)/2 After reset R W 0 RW 0 RW 2 3 4 5 0 0 0 0 0 RW RW RW RW R— Timer 3 external count 0: External clock from TIM3 pin source selection bit (T34M5) 1: External clock from H SYNC pin 6,7 Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Fig. 16. Timer 34 Mode Register 19 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Data bus 8 1/4096 Timer 1 latch (8) 8 XIN 1/2 1/8 T12M0 T12M2 Timer 1 (8) 8 T12M4 8 Timer 1 interrupt request Timer 2 latch (8) 8 TIM2 T12M1 T12M3 8 Timer 2 (8) Timer 2 interrupt request HSYNC 8 FF16 Reset STP instruction TIM3 T34M5 Timer 3 latch (8) 8 Timer 3 (8) T34M0 T34M2 8 8 0716 Timer 4 latch (8) 8 Timer 4 (8) T34M4 T34M3 8 Timer 4 interrupt request Timer 3 interrupt request Selection gate : Connected to black side at reset T34M1 T12M : Timer 12 mode register T34M : Timer 34 mode register Notes 1 : HIGH pulse width of external clock inputs TIM2 and TIM3 needs 4 machine cycles or more. 2 : When the external clock source is selected, timers 2 and 3 are counted at a rising edge of input signal. 3 : In the stop mode or the wait mode, external clock inputs TIM2 and TIM3 cannot be used. Fig. 17. Timer Block Diagram 20 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER SERIAL I/O The M37224M3-XXXSP has a built-in serial I/O which can either transmit or receive 8-bit data serially in the clock synchronous mode. The serial I/O block diagram is shown in Figure 18. The synchronous clock I/O pin (SCLK), and data I/O pins (SOUT, SIN) also function as port P2. Bit 2 of the serial I/O mode register (address 00DC16) selects whether the synchronous clock is supplied internally or externally (from the P20/SCLK pin). When an internal clock is selected, bits 1 and 0 select whether f(XIN) is divided by 4, 16, 32, or 64. Bit 3 selects whether port P2 is used for serial I/O or not. To use the P22/SIN pin as the SIN pin, set the bit 2 of the port P2 direction register (address 00C516) to “0.” The operation of the serial I/O is described below. The operation differs depending on the clock source; external clock or internal clock. Data bus XIN 1/2 1/2 Frequency divider 1/4 1/8 1/16 SM2 S SM1 SM0 Synchronous circuit Selection gate : Connected to black side at reset. SM : Serial I/O mode register P20 latch S CLK SM3 P21 latch S OUT SM3 SIN SM6 SM5: LSB MSB (Note) Serial I/O shift register (8) (Address 00DD 16) 8 Serial I/O counter (8) Serial I/O interrupt request Note: When the data is set in the serial I/O register (address 00DD 16), the register functions as the serial I/O shift register. Fig. 18. Serial I/O Block Diagram 21 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Internal clock: The serial I/O counter is set to “7” during the write cycle into the serial I/O register (address 00DD16), and the transfer clock goes “H” forcibly. At each falling edge of the transfer clock after the write cycle, serial data is output from the SOUT pin. Transfer direction can be selected by bit 5 of the serial I/O mode register. At each rising edge of the transfer clock, data is input from the SIN pin and data in the serial I/O register is shifted 1 bit. After the transfer clock has counted 8 times, the serial I/O counter becomes “0” and the transfer clock stops at HIGH. At this time the interrupt request bit is set to “1.” External clock: When an external clock is selected as the clock source, the interrupt request is set to “1” after the transfer clock has been counted 8 counts. However, transfer operation does not stop, so the clock should be controlled externally. Use the external clock of 1MHz or less with a duty cycle of 50%. The serial I/O timing is shown in Figure 19. When using an external clock for transfer, the external clock must be held at HIGH for initializing the serial I/O counter. When switching between an internal clock and an external clock, do not switch during transfer. Also, be sure to initialize the serial I/O counter after switching. Notes 1: On programming, note that the serial I/O counter is set by writing to the serial I/O register with the bit managing instructions, such as SEB and CLB. 2: When an external clock is used as the synchronous clock, write transmit data to the serial I/O register when the transfer clock input level is HIGH. Synchronous clock Transfer clock Serial I/O register write signal (Note) Serial I/O output SOUT Serial I/O input SIN D0 D1 D2 D3 D4 D5 D6 D7 Interrupt request bit is set to “1” Note : When an internal clock is selected, the S OUT pin is at high-impedance after transfer is completed. Fig. 19. Serial I/O Timing (for LSB first) 22 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Serial I/O Mode Register b7 b6 b5 b4 b3 b2 b1 b0 0 Serial I/O mode register (SM) [Address 00DC 16] B Name b1 0 0 1 1 Functions b0 0: f(X IN)/4 1: f(X IN)/16 0: f(X IN)/32 1: f(X IN)/64 After reset R W RW 0 0, 1 Internal synchronous clock selection bits (SM0, SM1) 2 3 Synchronous clock selection bit (SM2) Serial I/O port selection bit (SM3) Fix this bit to “0.” Transfer direction selection bit (SM5) Serial input pin selection bit (SM6) 0: External clock 1: Internal clock 0: P2 0, P2 1 functions as port 1: S CLK, SOUT 0 RW 0 RW 4 5 6 7 0 0: LSB first 1: MSB first 0: Input signal from S IN pin 1: Input signal from S OUT pin 0 0 0 RW RW RW R— Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Fig. 20. Serial I/O Mode Register 23 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Serial I/O Common Transmission/Reception Mode By writing “1” to bit 6 of the serial I/O mode register, signals SIN and SOUT are switched internally to be able to transmit or receive the serial data. Figure 21 shows signals on serial I/O common transmission/reception mode. Note: When receiving the serial data after writing “FF16” to the serial I/O register. SCLK Clock SOUT “1” Serial I/O shift register (8) SIN “0” SM6 SM: Serial I/O mode register Fig. 21. Signals on Serial I/O Common Transmission/Reception Mode 24 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER PWM OUTPUT FUNCTION The M37224M3-XXXSP is equipped with a 14-bit PWM (DA) and six 8-bit PWMs (PWM0–PWM5). DA has a 14-bit resolution with the minimum resolution bit width of 0.25 µs and a repeat period of 4096 µs (for f(XIN) = 8 MHz). PWM0–PWM5 have the same circuit structure and an 8-bit resolution with minimum resolution bit width of 4 µs and repeat period of 1024 µs (for f(XIN) = 8 MHz). Figure 22 shows the PWM block diagram. The PWM timing generating circuit applies individual control signals to PWM0–PWM5 using f(XIN) divided by 2 as a reference signal. (4) Operating of 14-bit PWM As with 8-bit PWM, set the bit 0 of the PWM output control register 1 (address 00D516) to “0” (at reset, bit 0 is already set to “0” automatically), so that the PWM count source is supplied. Next, select the output polarity by bit 2 of PWM output control register 2 (address 00D616). Then, the 14-bit PWM outputs from the D-A output pin by setting bit 1 of PWM output control register 1 to “0” (at reset, this bit already set to “0” automatically) to select the DA output. The output example of the 14-bit PWM is shown in Figure 24. The 14-bit PWM divides the data of the DA latch into the low-order 6 bits and the high-order 8 bits. The fundamental waveform is determined with the high-order 8-bit data “DH.” A “H” level area with a length τ ! DH(“H” level area of fundamental waveform) is output every short area of “t” = 256 τ = 64 µs (τ is the minimum resolution bit width of 0.25 µs). The “H” level area increase interval (tm) is determined with the low-order 6-bit data “DL.” The “H” level are of smaller intervals “tm” shown in Table 6 is longer by τ than that of other smaller intervals in PWM repeat period “T” = 64t. Thus, a rectangular waveform with the different “H” width is output from the D-A pin. Accordingly, the PWM output changes by τ unit pulse width by changing the contents of the DA-H and DA-L registers. A length of entirely “H” output cannot be output, i. e. 256/ 256. (1) Data Setting When outputting DA, first set the high-order 8 bits to the DA-H register (address 00CE16), then the low-order 6 bits to the DA-L register (address 00CF16). When outputting PWM0–PWM5, set 8-bit output data to the PWMi register (i means 0 to 5; addresses 00D016 to 00D416, 00F616). (2) Transmitting Data from Register to PWM circuit Data transfer from the 8-bit PWM register to the 8-bit PWM circuit is executed at writing data to the register. The signal output from the 8-bit PWM output pin corresponds to the contents of this register. Also, data transfer from the DA register (addresses 00CE16 and 00CF16) to the 14-bit PWM circuit is executed at writing data to the DA-L register (address 00CF16). Reading from the DA-H register (address 00CE16) means reading this transferred data. Accordingly, it is possible to confirm the data being output from the D-A output pin by reading the DA register. (5) Output after Reset At reset the output of port P00–P05 is in the high-impedance state, and the contents of the PWM register and the PWM circuit are undefined. Note that after reset, the PWM output is undefined until setting the PWM register. (3) Operating of 8-bit PWM The following explains PWM operation. First, set the bit 0 of PWM output control register 1 (address 00D516) to “0” (at reset, this bit 0 already set to “0” automatically), so that the PWM count source is supplied. PWM0–PWM5 are also used as pins P00–P05 respectively. For PWM0–PWM5, set the corresponding bits of the port P0 direction register to “1” (output mode). And select each output polarity by bit 3 of PWM output control register 2(address 00D616). Then, set bits 2 to 7 of PWM output control register 1 to “1” (PWM output). The PWM waveform is output from the PWM output pins by setting these registers. Figure 23 shows the 8-bit PWM timing. One cycle (T) is composed of 256 (28) segments. The 8 kinds of pulses, relative to the weight of each bit (bits 0 to 7), are output inside the circuit during 1 cycle. Refer to Figure 23 (a). The 8-bit PWM outputs waveform performed a OR operation of pulses corresponding to the contents of bits 0 to 7 of the 8-bit PWM register. Several examples are shown in Figure 23 (b). 256 kinds of output (HIGH area: 0/256 to 255/256) are selected by changing the contents of the PWM register. A length of entirely HIGH cannot be output, i.e. 256/256. 25 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Table 2. Relation between Low-order 6-bit Data and High-level Area Increase Interval Low-order 6 Bits of Data Area Longer by τ than That of Other tm (m = 0 to 63) LSB 000000 000001 000010 000100 001000 010000 100000 Nothing m = 32 m = 16, 48 m = 8, 24, 40, 56 m = 4, 12, 20, 28, 36, 44, 52, 60 m = 2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46, 50, 54, 58, 62 m = 1, 3, 5, 7, ................................. 57, 59, 61, 63 Data bus DA-H register (Address : 00CE16 ) b7 DA latch (14 bits) MSB b0 DA-L register (Note) (Address : 00CF16 ) LSB 8 6 6 14 PN2 14-bit PWM circuit PN4 PW1 DA D-A XIN 1/2 PW0 PWM timing generating circuit PWM register (Address : 00D016) b7 8 b0 PN3 8-bit PWM circuit P00 PW2 P01 D00 PWM0 D01 PWM1 PWM1 register (Address : 00D1 16 ) PW3 P02 D02 PWM2 Selection gate : Connected to black side when reset. Pass gate : Inside of with the others. is as same contents PWM2 register (Address : 00D2 16 ) PW4 P03 PW5 P04 PW6 P05 PW7 D05 PWM5 D04 PWM4 D03 PWM3 PWM3 register (Address : 00D3 16 ) P0 : Port P0 register D0 : Port P0 direction register PW : PWM output control register 1 PN : PWM output control register 2 PWM4 register (Address : 00D4 16 ) PWM5 register (Address : 00F6 16 ) Note : The DA-L register also functions as the low-order 6 bits of the DA latch. Fig. 22. PWM Block Diagram 26 13579 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 20 30 40 5 250 255 Bit 7 50 54 58 86 90 94 62 66 78 82 74 70 98 102 106 110 114 118 122 126 130 134 138 142 146 150 154 158 162 166 170 174 178 182 186 190 194 198 202 206 210 214 218 222 226 230 234 238 242 246 250 254 Fig. 23. 8-bit PWM Timing 52 60 116 148 180 220 236 212 68 172 92 100 244 108 164 204 124 132 140 156 196 76 228 84 188 252 56 72 88 168 120 200 152 232 104 184 136 216 248 80 208 112 144 176 240 96 160 224 64 192 128 2 6 10 14 18 22 26 30 34 38 42 46 Bit 6 4 12 20 28 36 44 Bit 5 8 24 40 Bit 4 16 48 Bit 3 32 Bit 2 Bit 1 Bit 0 (a) Pulses showing the weight of each bit 001 (0) 16 1 01 16 (1) 16 181 (24) FF 16 (255) t T = 256 t PWM output t = 4 µs T = 1024 µs f(XIN) = 8 MHz (b) Example of 8-bit PWM M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER MITSUBISHI MICROCOMPUTERS 27 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Set “2C 16” to DA-H register. Set “2816” to DA-L register. b7 b6 b5 b4 b3 b2 b1 b0 [DA-H 0 0 1 0 1 1 0 0 DH register] At writing of DA-L b13 [DA latch] 0 0 1 0 1 1 0 b6 b5 0 1 0 1 b7 b6 b5 b4 b3 b2 b1 b0 [DA-L register] Undefined 1 0 1 0 0 0 DL At writing of DA-L b0 0 0 0 These bits decide “H” level area of fundamental waveform. “H” level area of fundamental waveform These bits decide smaller interval “tm” in which “H” leval area is [“H” level area of fundamental waveform + τ ]. = Minimum resolution bit width 0.25 µs ! High-order 8-bit value of DA latch Fundamental waveform Waveform of smaller interval “tm” specified by low-order 6 bits 0.25 µs!44 0.25 µs!45 0.25 µs 14-bit … 03 02 01 00 PWM output 2C 2B 2A 8-bit counter FF FE FD … D6 D5 D4 D3 … 02 01 00 14-bit … 03 02 01 00 PWM output 2C 2B 2A 8-bit counter FF FE FD … D6 D5 D4 D3 … 02 01 00 Fundamental waveform of smaller interval “tm” which is not specified by low-order 6 bits is not changed. 0.25 µs!44 τ = 0.25 µs 14-bit PWM output t0 Low-order 6-bit output of DA latch Repeat period T = 4096 µs t1 t2 t3 t4 t5 t59 t60 t61 t62 t63 Fig. 24. 14-bit PWM Output Example (f(XIN) = 8 MHz) 28 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER PWM Output Control Register 1 b7 b6 b5 b4 b3 b2 b1 b0 PWM output control register 1 (PW) [Address 00D516] B Name Functions 0 DA, PWM count source 0 : Count source supply 1 : Count source stop selection bit (PW0) 1 2 3 4 5 6 7 DA/PN4 output selection bit (PW1) P00/PWM0 output selection bit (PW2) P01/PWM1 output selection bit (PW3) P02/PWM2 output selection bit (PW4) P03/PWM3 output selection bit (PW5) P04/PWM4 output selection bit (PW6) P05/PWM5 output selection bit (PW7) 0 : DA output 1 : PN4 output 0: P00 output 1: PWM0 output 0: P01 output 1: PWM1 output 0: P02 output 1: PWM2 output 0: P03 output 1: PWM3 output 0: P04 output 1: PWM4 output 0: P05 output 1: PWM5 output After reset R W RW 0 0 0 0 0 0 0 0 RW RW RW RW RW RW RW Fig. 25. PWM Output Control Register 1 PWM Output Control Register 2 b7 b6 b5 b4 b3 b2 b1 b0 PWM output control register 2 (PN) [Address 00D6 16] B Name Functions After reset R W 0, 1 Nothing is assigned. These bits are write disable bits. 0 R— When these bits are read out, the values are “0.” 2 3 4 DA output polarity selection bit (PN3) PWM output polarity selection bit (PN4) DA general-purpose output bit (PN5) 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity 0 : Output LOW 1 : Output HIGH 0 0 0 RW RW RW 5 Nothing is assigned. These bits are write disable bits. to When these bits are read out, the values are “0.” 7 0 R— Fig. 26. PWM Output Control Register 2 29 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER A-D COMPARATOR A-D comparator consists of 6-bit D-A converter and comparator. A-D comparator block diagram is shown in Figure 27. The reference voltage “Vref” for D-A conversion is set by bits 0 to 5 of the A-D control register 2 (address 00EF16). The comparison result of the analog input voltage and the reference voltage “Vref” is stored in bit 4 of the A-D control register 1 (address 00EE16). For A-D comparison, set “0” to corresponding bits of the direction register to use ports as analog input pins. Write the data for select of analog input pins to bits 0 to 2 of the A-D control register 1 and write the digital value corresponding to Vref to be compared to the bits 0 to 5 of the A-D control register 2. The voltage comparison starts by writing to the A-D control register 2, and it is completed after 16 machine cycles (NOP instruction ! 8). Table 3. Relation between Contents of A-D Control Register 2 and Reference Voltage “Vref” Bit 5 0 0 0 … A-D Control Register 2 Bit 4 Bit 3 Bit 2 Bit 1 0 0 0 0 0 0 0 0 0 0 0 1 … … … … Bit 0 0 1 0 … Reference Voltage “Vref” 1/128 VCC 3/128 VCC 5/128 VCC … 123/128 VCC 125/128 VCC 127/128 VCC Bit 0 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 0 1 Data bus A-D control register 1 Bits 0 to 2 Comparator control A-D1 A-D2 A-D3 A-D4 A-D5 A-D6 A-D control register 1 Analog signal switch Comparator Bit 4 Bit 5 Bit 4 A-D control register 2 Bit 3 Bit 2 Bit 1 Switch tree Resistor ladder Fig. 27. A-D Comparator Block Diagram 30 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER A-D Control Register 1 b7 b6 b5 b4 b3 b2 b1 b0 A-D control register 1 (AD1) [Address 00EE16] B 0 to 2 Name Analog input pin selection bits (ADM0 to ADM2) b2 0 0 0 0 1 1 1 1 b1 0 0 1 1 0 0 1 1 Functions b0 0 : A-D1 1 : A-D2 0 : A-D3 1 : A-D4 0 : A-D5 1 : A-D6 0: Do not set. 1: After reset R W 0 RW 3, Nothing is assigned. These bits are write disable bits. 5 to 7 When these bits are read out, the values are “0.” 4 Storage bit of comparison result (ADM4) 0: Input voltage < reference voltage 1: Input voltage > reference voltage 0 Indeterminate R— R— Fig. 28. A-D Control Register 1 A-D Control Register 2 b7 b6 b5 b4 b3 b2 b1 b0 A-D control register 2(AD2) [Address 00EF 16 ] B 0 to 5 Name D-A converter set bits (ADC0 to ADC5) b5 0 0 0 b4 0 0 0 b3 0 0 0 Functions b2 0 0 0 b1 0 0 1 b0 0 : 1/128Vcc 1 : 3/128Vcc 0 : 5/128Vcc After reset 0 RW RW 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 : 123/128Vcc 0 : 125/128Vcc 1 : 127/128Vcc 0 R— 6, 7 Nothing is assigned. These bits are write disable bits. When these bits are reed out, the values are “ 0.” Fig. 29. A-D Control Register 2 31 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER D-A CONVERTER The M37224M3-XXXSP has 2 D-A converters with 6-bit resolution. D-A converter block diagram is shown in Figure 30. D-A conversion is performed by setting the value in the DA conversion register. The result of D-A conversion is output from the DA pin by setting “1” to the DA output enable bit of the port P3 output mode control register (bits 2 and 3 at address 00CD16). The output analog voltage V is determined with the value n (n: decimal number) in the DA conversion register. V = VCC ! n (n = 0 to 127) 128 Table 4. Relation between Contents of D-A Conversion Register and Output Voltage Bit 7 0 1 0 … D-A Conversion Register Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 … … … … … Bit 0 0 0 1 … Output Voltage “V” 000/128 VCC 001/128 VCC 002/128 VCC … 125/128 VCC 126/128 VCC 127/128 VCC 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 The DA output does not build in a buffer, so connect an external buffer when driving a low-impedance load. Data bus DA1 conversion register 7 (address 00DE 16) DA2 conversion register 7 (address 00DF 16) Resistor ladder DA1 output enable bit DA1 Resistor ladder DA2 output enable bit DA2 Fig. 30. D-A Converter Block Diagram 32 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER DAi Conversion Register b7 b6 b5 b4 b3 b2 b1 b0 0 DAi conversion register (DAi) (i = 1 and 2) [Address 00DE16, 00DF 16] B Name b7 0 1 0 b5 0 0 0 b4 0 0 0 b3 0 0 0 Functions b2 0 0 0 b1 0 0 1 b0 0 : 0/128Vcc 1 : 1/128Vcc 0 : 2/128Vcc After reset RW 0 to 5, DA conversion set 7 bits (DAi0 to DAi5) Indeterminate R W 11 01 11 1 1 1 1 1 1 1 1 1 1 1 1 0 : 125/128Vcc 1 : 126/128Vcc 1 : 127/128Vcc 6 Fix this bit to “0.” 0 RW Fig. 31. DAi Conversion Register Port P3 Output Mode Control Register b7 b6 b5 b4 b3 b2 b1 b0 Port P3 output mode control register (P3S) [address 00CD16] B 0 1 2 3 4 to 7 Name P30 output structure selection bit (P30S) P31 output structure selection bit (P31S) DA1 output enable bit DA2 output enable bit Functions 0 : CMOS output 1 : N-channel open-drain output 0 : CMOS output 1 : N-channel open-drain output 0 : P30 input/output 1 : DA1 output 0 : P31 input/output 1 : DA2 output After reset R W 0 0 0 0 0 RW RW RW RW R— Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Fig. 32. Port P3 Output Mode Control Register 33 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER CRT DISPLAY FUNCTIONS (1) Outline of CRT Display Functions Table 5 outlines the CRT display functions of the M37224M3-XXXSP. The M37224M3-XXXSP incorporates a CRT display circuit of 20 characters ! 2 lines. CRT display is controlled by the CRT control register. Up to 128 kinds of characters can be displayed. The colors can be specified for each character and up to 4 kinds of colors can be displayed on one screen. A combination of up to 7 colors can be obtained by using each output signal (R, G, and B). Characters are displayed in a 12 ! 16 dots configuration to obtain smooth character patterns (refer to Figure 33). The following shows the procedure how to display characters on the CRT screen. Œ Write the display character code in the display RAM.  Specify the display color by using the color register. Ž Write the color register in which the display color is set in the display RAM.  Specify the vertical position by using the vertical position register.  Specify the character size by using the character size register. ‘ Specify the horizontal position by using the horizontal position register. ’ Write the display enable bit to the designated block display flag of the CRT control register. When this is done, the CRT display starts according to the input of the VSYNC signal. The CRT display circuit has an extended display mode. This mode allows multiple lines (3 lines or more) to be displayed on the screen by interrupting the display each time one line is displayed and rewriting data in the block for which display is terminated by software. Figure 34 shows the CRT display control register. Figure 35 shows the block diagram of the CRT display circuit. Table 5. Outline of CRT Display Functions Parameter Number of display characters Dot structure Kinds of characters Kinds of character sizes Kinds of colors Color Coloring unit Display expansion Raster coloring Functions 20 characters ! 2 lines 12 ! 16 dots (refer to Figure 33) 128 kinds 3 kinds 1 screen: 4 kinds, maximum 7 kinds A character Possible (multiline display) Possible (maximum 7 kinds) 34 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER 12 dots 16 dots Fig. 33. CRT Display Character Configuration CRT Control Register b7 b6 b5 b4 b3 b2 b1 b0 CRT control register (CC) [Address 00EA16] B 0 1 2 3 to 7 Name All-blocks display control bit (CC0) (See note) Block 1 display control bit (CC1) Block 2 display control bit (CC2) Functions 0 : All-blocks display off 1 : All-blocks display on 0 : Block 1 display off 1 : Block 1 display on 0 : Block 2 display off 1 : Block 2 display on After reset R W 0 0 0 0 RW RW RW R— Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Note: Display is controlled by logical product (AND) between the all-blocks display control bit and each block control bit. Fig. 34. CRT Control Register 35 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER OSC1 OSC2 H SYNC VSYNC (Address 00EA 16) CRT control register (Addresses 00E1 16, 00E2 16) Display oscillation circuit Vertical position registers (Address 00E4 16) Character size register Display position control circuit (Address 00E0 16) Horizontal position register (Address 00E5 16) Border selection register Display control circuit RAM for display 10 bits ! 20 characters ! 2 lines (Addresses 00E6 16 to 00E9 16) ROM for display 12 dots ! 16 dots ! 128 characters Color registers Shift register 12 bits Shift register 12 bits (Address 00EC 16) Output circuit CRT port control register Data bus R G B OUT Fig. 35. Block Diagram of CRT Display Circuit 36 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (2) Display Position The display positions of characters are specified in units called a “block.” There are 2 blocks, block 1 and block 2. Up to 20 characters can be displayed in each block (refer to (4) Memory for Display). The display position of each block can be set in both horizontal and vertical directions by software. The display position in the horizontal direction can be selected for all blocks in common from 64-step display positions in units of 4T C (TC = oscillating cycle for display). The display position in the vertical direction for each block can be selected from 128-step display positions in units of 4 scanning lines. Block 2 is displayed after the display of block 1 is completed (refer to Figure 36 (a)). Accordingly, if the display of block 2 starts during the display of block 1, only block 1 is displayed. Similarly, when multiline display, block 1 is displayed after the display of block 2 is completed (refer to Figure 36 (b)). The vertical position can be specified from 128-step positions (4 scanning lines per a step) for each block by setting values “0016” to “7F16” to bits 0 to 6 in the vertical position register (addresses 00E116 and 00E216). Figure 38 shows the structure of the vertical position register. (HR) CV1 Block 1 CV2 Block 2 (a) Example when each block is separated CV1 Block 1 CV2 Block 2 No display CV1 Block 1 (second) No display (b) Example when block 2 overlaps with block 1 Fig. 36. Display Position 37 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER The display position in the vertical direction is determined by counting the horizontal sync signal (HSYNC). At this time when VSYNC and HSYNC are positive polarity (negative polarity), it starts to count the rising edge (falling edge) of HSYNC signal from after about 1 machine cycle of rising edge (falling edge) of VSYNC signal. So interval from rising edge (falling edge) of VSYNC signal to rising edge (falling edge) of HSYNC signal needs enough time (2 machine cycles or more) for avoiding jitter. The polarity of HSYNC and VSYNC signals can select with the CRT port control register (address 00EC16). 8 machine cycles or more VSYNC signal input 0.125 to 0.25 [ µs] ( at f(XIN) = 8MHz) VSYNC control signal in microcomputer Period of counting HSYNC signal (Note 2) HSYNC signal input 8 machine cycles or more 1 2 3 4 5 Not count When bits 0 and 1 of the CRT port control register (address 00EC 16) are set to “1” (negative polarity) Notes 1 : The vertical position is determined by counting falling edge of H SYNC signal after rising edge of VSYNC control signal in the microcomputer. 2 : Do not generate falling edge of H SYNC signal near rising edge of VSYNC control signal in microcomputer to avoid jitter. 3 : The pulse width of VSYNC and HSYNC needs 8 machine cycles or more. Fig. 37. Supplement Explanation for Display Position Vertical Position Register i b7 b6 b5 b4 b3 b2 b1 b0 Vertical position register i (CVi) (i = 1 and 2) [Addresses 00E116, 00E216] B 0 to 6 7 Name Vertical display start positions (CVi : CVi0 to CVi6) Functions 128 steps (00 16 to 7F16 ) After reset RW Indeterminate R W Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” 0 R— Fig. 38. Vertical Position Register i 38 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER The horizontal position is common to all blocks, and can be set in 64 steps (where 1 step is 4TC, TC being the display oscillation period) as values “0016” to “3F16” in bits 0 to 5 of the horizontal position register (address 00E016). The structure of the horizontal position register is shown in Figure 39. Horizontal Position Register b7 b6 b5 b4 b3 b2 b1 b0 Horizontal position register (HR) [Address 00E016 ] B 0 to 5 Name Horizontal display start positions (HR0 to HR5) Functions 64 steps (0016 to 3F16) After reset 0 0 RW RW R— 6, 7 Nothing is assigned. These bits are write disable bits. When thses bits are read out, the values are “0.” Fig. 39. Horizontal Position Register 39 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (3) Character Size The size of characters to be displayed can be from 3 sizes for each block. Use the character size register (address 00E416) to set a character size. The character size of block 1 can be specified by using bits 0 and 1 of the character size register; the character size of block 2 can be specified by using bits 2 and 3. Figure 40 shows the character size register. The character size can be selected from 3 sizes: minimum size, medium size and large size. Each character size is determined by the number of scanning lines in the height (vertical) direction and the oscillating cycle for display (TC) in the width (horizontal) direction. The minimum size consists of [1 scanning line] ! [1TC]; the medium size consists of [2 scanning lines] ! [2TC]; and the large size consists of [3 scanning lines] ! [3TC]. Table 6 shows the relation between the set values in the character size register and the character sizes. Minimum Medium Large Horizontal display start position Fig. 41. Display Start Position of each Character Size (horizontal direction) Character Size Register b7 b6 b5 b4 b3 b2 b1 b0 Character size register (CS) [Address 00E416] B Name Functions 00 : Minimum size 01 : Medium size 10 : Large size 11 : Do not set. 00 : Minimum size 01 : Medium size 10 : Large size 11 : Do not set. After reset RW 0, 1 Character size of block 1 selection bits (CS10, CS11) 2,3 Character size of block 2 selection bits (CS20,CS21) 4 to 7 Indeterminate R W Indeterminate R W Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” 0 R— Fig. 40. Character Size Register Table 6. Relation between Set Values in Character Size Register and Character Sizes Set Values of Character Size Register CSn1 0 0 1 1 CSn0 0 1 0 1 Character Size Minimum Medium Large Width (horizontal) Direction TC: oscillating cycle for display 1TC 2TC 3TC This is not available Height (vertical) Direction Scanning Lines 1 2 3 Note: The display start position in the horizontal direction is not affected by the character size. In other words, the horizontal display start position is common to all blocks even when the character size varies with each block (refer to Figure 41). 40 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (4) Memory for Display There are 2 types of display memory : CRT display ROM (addresses 1000016 to 10FFF16) used to store character dot data (masked) and CRT display RAM (addresses 060016 to 06B316) used to specify the colors of characters to be displayed. The following describes each type of display memory. Œ ROM for display (addresses 1000016 to 10FFF16) The CRT display ROM contains dot pattern data for characters to be displayed. For characters stored in this ROM to be actually displayed, it is necessary to specify them by writing the character code inherent to each character (code determined based on the addresses in the CRT display ROM) into the CRT display RAM. The character code list is shown in Table 7. The CRT display ROM has a capacity of 4 K bytes. Since 32 bytes are required for 1 character data, the ROM can stores up to 128 kinds of characters. The CRT display ROM space is broadly divided into 2 areas. The [vertical 16 dots] ! [horizontal (left side) 8 dots] data of display characters are stored in addresses 1000016 to 107FF16; the [vertical 16 dots] ! [horizontal (right side) 4 dots] data of display characters are stored in addresses 1080016 to 10FFF16 (refer to Figure 42). Note however that the high-order 4 bits in the data to be written to addresses 1080016 to 10FFF16 must be set to “1” (by writing data “FX16”). 10XX016 10XXF 16 b7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 b0 0 0 0 0 0 1 1 1 0 0 1 0 0 0 0 0 10XX016 +80016 10XXF16 +80016 b7 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 b3 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 b0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Fig. 42. Display Character Stored Data 41 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Table 7. Character Code List (partially abbreviated) Character code 0016 Character data storage address Left 8 dots lines Right 4 dots lines 1000016 1080016 to to 1000F16 1080F16 1001016 1081016 to to 1001F16 1081F16 1002016 1082016 to to 1002F16 1082F16 1003016 1083016 to to 1003F16 1083F16 : : 107E016 to 107EF16 107F016 to 107FF16 10FE016 to 10FEF16 10FF016 to 10FFF16  RAM for display (addresses 060016 to 06B316) The CRT display RAM is allocated at addresses 060016 to 06B316, and is divided into a display character code specification part and display color specification part for each block. Table 8 shows the contents of the CRT display RAM. For example, to display 1 character position (the left edge) in block 1, write the character code in address 060016 and write the color register No. to the low-order 2 bits (bits 0 and 1) in address 068016. The color register No. to be written here is one of the 4 color registers in which the color to be displayed is set in advance. For details on color registers, refer to (5) Color Registers. The structure of the CRT display RAM is shown in Figure 43. 0116 0216 0316 : 7E16 7F16 Table 8. Contents of CRT Display RAM Block Display Position (from left) 1st character 2nd character 3rd character : 18th character 19th character 20th character Not used 1st character 2nd character 3rd character : 18th character 19th character 20th character Character Code Specification 060016 060116 060216 : 061116 061216 061316 061416 to 061F16 062016 062116 062216 : 063116 063216 063316 Color Specification 068016 068116 068216 : 069116 069216 069316 069416 to 069F16 06A016 06A116 06A216 : 06B116 06B216 06B316 Block 1 Block 2 42 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Block 1 [Character specification] 1st character : 0600 16 to 20th character : 0613 16 Character code Specify 128 characters (“00 16” to “7F16”) [Color specification] 1st character : 0680 16 to 20th character : 0693 16 Color register specification 0 0 : Specifying color register 0 0 1 : Specifying color register 1 1 0 : Specifying color register 2 1 1 : Specifying color register 3 Block 2 [Character specification] 1st character : 0620 16 to 20th character : 063316 Character code Specify 128 characters (“00 16” to “7F16”) [Color specification] 1st character : 06A0 16 to 20th character : 06B3 16 Color register specification 0 0 : Specifying color register 0 0 1 : Specifying color register 1 1 0 : Specifying color register 2 1 1 : Specifying color register 3 1 0 7 0 1 0 7 0 Fig. 43. Structure of CRT Display RAM 43 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (5) Color Registers The color of a displayed character can be specified by setting the color to one of the 4 registers (CO0 to CO3: addresses 00E6 16 to 00E916) and then specifying that color register with the CRT display RAM. There are 3 color outputs; R, G and B. By using a combination of these outputs, it is possible to set 23–1 (when no output) = 7 colors. However, since only 4 color registers are available, up to 4 colors can be disabled at one time. R, G and B outputs are set by using bits 1 to 3 in the color register. Bit 5 is used to specify whether a character output or blank output. Figure 44 shows the color register. Color Register i b7 b6 b5 b4 b3 b2 b1 b0 0 Color register i (COi) (i = 0 to 3) [Addresses 00E6 16 to 00E9 16] B 0 1 2 3 Name Fix this bit to “0.” B signal output selection bit (COi1) G signal output selection bit (COi2) R signal output selection bit (COi3) Functions After reset R W 0 R— RW RW RW R— RW 0 : No character is output 1 : Character is output 0 : No character is output 1 : Character is output 0 : No character is output 1 : Character is output 0 0 0 0 0 4, Nothing is assigned. These bits are write disable bits. 6, 7 When these bits are read out, the values are “0.” 5 OUT signal output control bit (COi5) 0 : Character is output 1 : Blank is output Fig. 44. Color Registers 44 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (6) Character Border Function An border of 1 clock (1 dot) equivalent size can be added to a character to be displayed in both horizontal and vertical directions. The border is output from the OUT pin. In this case, set bit 5 of a color register to “0” (character is output). Border can be specified in units of block by using the border selection register (address 00E516). Figure 45 shows the border selection register. Table 9 shows the relationship between the values set in the border selection register and the character border function. Fig. 46. Example of Border Border Selection Register b7 b6 b5 b4 b3 b2 b1 b0 Border selection register (MD) [Address 00E5 16] B 0 1 2 3 to 7 Name Functions After reset RW Block 1 OUT output 0 : Same output as R, G, B is output border selection bit (MD10) 1 : Border output Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Block 2 OUT output 0 : Same output as R, G, B is output border selection bit (MD20) 1 : Border output Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Indeterminate R W 0 R— Indeterminate R W 0 R— Fig. 45. Border Selection Register Table 9. Relationship between Set Value in Border Selection Register and Character Border Function Border Selection Register MDn0 0 Functions Ordinary Example of Output R, G, B output OUT output R, G, B output OUT output 1 Border including character 45 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (7) Multiline Display The M37224M3-XXXSP can ordinarily display 2 lines on the CRT screen by displaying 2 blocks at different vertical positions. In addition, it can display up to 16 lines by using CRT interrupts. A CRT interrupt request occurs at the point at which display of each block has been completed. In other words, when a scanning line reaches the point of the display position (specified by the vertical position registers) of a certain block, the character display of that block starts, and an interrupt occurs at the point at which the scanning line exceeds the block. Note: A CRT interrupt does not occur at the end of display when the block is not displayed. In other words, if a block is set to off display with the display control bit of the CRT control register (address 00EA16), a CRT interrupt request does not occur (refer to Figure 47). Block 1 (on display) Block 2 (on display) Block 1' (on display) Block 2' (on display) “CRT interrupt request” “CRT interrupt request” “CRT interrupt request” “CRT interrupt request” On display (CRT interrupt request occurs at the end of block display) Block 1 (on display) Block 2 (on display) Block 1' (off display) Block 2' (off display) “CRT interrupt request” “CRT interrupt request” No “CRT interrupt request” No “CRT interrupt request” Off display (CRT interrupt request does not occur at the end of block display) Fig. 47. Timing of CRT Interrupt Request 46 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (8) CRT Output Pin Control The CRT output pins R, G, B, and OUT can also function as ports P52, P53, P54 and P55. Set the corresponding bit of the port P5 direction register (address 00CB16) to “0” to specify these pins as CRT output pins, or set it to “1” to specify it as an general-purpose port P5 pins. The input polarity of signals HSYNC and VSYNC and output polarity of signals R, G, B, and OUT can be specified with the bits of the CRT port control register (address 00EC16) . Set a bit to “0” to specify positive polarity; set it to “1” to specify negative polarity. The structure of the CRT port control register is shown in Figure 48. CRT Port Control Register b7 b6 b5 b4 b3 b2 b1 b0 CRT port control register (CRTP) [Address 00EC 16] B 0 1 2 3 4 5 6 7 Name HSYNC input polarity switch bit (HSYC) VSYNC input polarity switch bit (VSYC) Functions 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity After reset R W 0 0 0 0 0 0 0 0 RW RW RW R— RW RW RW RW R/G/B output polarity switch 0 : Positive polarity 1 : Negative polarity bit (R/G/B) Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” OUT output polarity switch bit (OUT) R signal output switch bit (OP5) G signal output switch bit (OP6) B signal output switch bit (OP7) 0 : Positive polarity 1 : Negative polarity 0 : R signal output 1 : MUTE signal output 0 : G signal output 1 : MUTE signal output 0 : B signal output 1 : MUTE signal output Fig. 48. CRT Port Control Register 47 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (9) Raster Coloring Function An entire screen (raster) can be colored by setting the bits 5 to 7 of the CRT port control register. Since each of the R, G, and B pins can be switched to raster coloring output, 7 raster colors can be obtained. If the R, G, and B pins have been set to MUTE signal output, a raster coloring signal is output in the part except a no-raster colored character (in Figure 49, a character “O”) during 1 horizontal scanning period. This ensures that character colors do not mix with the raster color. In this case, MUTE signal is output from the OUT1 pin. An example in which a magenta character “I” and a red character “O” are displayed with blue raster coloring is shown in Figure 49. “RED” “BLUE” A A' HSYNC R B OUT Signals across A – A' Fig. 49. Example of Raster Coloring 48 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (10) Clock for Display As a clock for display to be used for CRT display, it is possible to select one of the following 4 types. Main clock supplied from the XIN pin Main clock supplied from the XIN pin divided by 1.5 Clock from the LC or RC supplied from the pins OSC1 and OSC2. Clock from the ceramic resonator or quartz-crystal oscillator supplied from the pins OSC1 and OSC2. This clock for display can be selected for each block by the CRT clock selection register (address 00ED16). When selecting the main clock, set the oscillation frequency to 8 MHz. • • • • CRT Clock Selection Register b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 0 0 0 CRT clock selection register (CK) [Address 00ED16 ] B Name b1 b0 0 0 Functions Functions 0 The clock for display is supplied by connecting RC or LC across the pins OSC1 and OSC2. 1 Since the main clock is used as the clock for CRT oscillation display, the oscillation frequency is limited. frequency Because of this, the character size in width = f(X IN) (horizontal) direction is also limited. In this 0 case, pins OSC1 and OSC2 are also used CRT oscillation frequency as input ports P3 3 and P34 respectively. = f(XIN )/1.5 1 The clock for display is supplied by connecting the following across the pins OSC1 and OSC2. • a ceramic resonator only for CRT display and a feedback resistor • a quartz-crystal oscillator only for CRT display and a feedback resistor (Note) After reset R W 0 RW 0, 1 CRT clock selection bits (CK0,CK1) 1 1 2 to 7 Fix these bits to “0.” 0 RW Note: It is necessary to connect other ceramic resonator or quartz-crystal oscillator across the pins XIN and X OUT . Fig. 50. CRT Clock Selection Register 49 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER ROM CORRECTION FUNCTION This can correct program data in ROM. Up to 2 addresses (2 blocks) can be corrected, a program for correction is stored in the ROM correction memory in RAM. The ROM memory for correction is 32 bytes ! 2 blocks. Block 1 : addresses 02C016 to 02DF16 Block 2 : addresses 02E016 to 02FF16 Set the address of the ROM data to be corrected into the ROM correction address register. When the value of the counter matches the ROM data address in the ROM correction address, the main program branches to the correction program stored in the ROM memory for correction. To return from the correction program to the main program, the op code and operand of the JMP instruction (total of 3 bytes) are necessary at the end of the correction program. When the blocks 1 and 2 are used in series, the above instruction is not needed at the end of the block 1. The ROM correction function is controlled by the ROM correction enable register. Notes 1 : S pecify the first address (op code address) of each instruction as the ROM correction address. 2 : Use the JMP instruction (total of 3 bytes) to return from the main program to the correction program. 3 : Do not set the same ROM correction address to the blocks 1 and 2. ROM correction address 1 (high-order) ROM correction address 1 (low-order) ROM correction address 2 (high-order) ROM correction address 2 (low-order) 021716 021816 021916 021A16 Fig. 51. ROM Correction Address Registers ROM Correction Enable Register b7 b6 b5 b4 b3 b2 b1 b0 0 0 ROM correction enable register (RCR) [Address 021B16] B 0 1 Name Block 1 enable bit (RC0) Block 2 enable bit (RC1) Functions 0: Disabled 1: Enabled 0: Disabled 1: Enabled After reset R W 0 0 0 0 RW RW RW R— 2,3 Fix these bits to “0.” 4 to 7 Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Fig. 52. ROM Correction Enable Register 50 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER RESET CIRCUIT When the oscillation of a quartz-crystal oscillator or a ceramic resonator is stable and the power source voltage is 5 V ±10 %, hold the ______ RESET pin at LOW for 2 µs or more, then return it to HIGH. Then, as shown in Figure 53, reset is released and the program starts from the address formed by using the content of address FFFF16 as the high-order address and the content of the address FFFE16 as the low-order address. The internal state of microcomputer at reset are shown in Figures 5 to 8. An example of the reset circuit is shown in Figure 53. The reset input voltage must be kept 0.6 V or less until the power source voltage surpasses 4.5 V. X IN RESET Internal RESET SYNC Address Data ? ? ? ? 01, S 01, S-1 01, S-2 FFFE FFFF ADH, ADL Reset address from the vector table ? ? ? AD L ADH 32768 count of X IN clock cycle (Note 3) Notes 1 : f(XIN) and f( ) are in the relation : f(XIN) = 2·f ( ). 2 : A question mark (?) indicates an undefined state that depends on the previous state. 3 : Immediately after a reset, timer 3 and timer 4 are connected by hardware. At this time, “FF 16” is set in timer 3 and “0716 ” is set to timer 4. Timer 3 counts down with f(X IN)/16, and reset state is released by the timer 4 overflow signal. Fig. 53. Reset Sequence Poweron 4.5 V Power source voltage 0 V Reset input voltage 0 V 0.6 V 22 1 5 M51953AL Vcc 25 RESET 4 3 0.1 µF 21 Vss M37224M3-XXXSP Fig. 54. Example of Reset Circuit 51 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER CLOCK GENERATING CIRCUIT The built-in clock generating circuit is shown in Figure 57. When the STP instruction is executed, the internal clock φ stops at HIGH. At the same time, timers 3 and 4 are connected by hardware and “FF16 ” is set in timer 3 and “0716 ” is set in the timer 4. Select f(XIN)/16 as the timer 3 count source (set bit 0 of the timer 34 mode register to “0” before the execution of the STP instruction). Moreover, set the timer 3 and timer 4 interrupt enable bits to disabled (“0”) before execution of the STP instruction). The oscillator restarts when external interrupt is accepted. However, the internal clock φ keeps its HIGH until timer 4 overflows, allowing time for oscillation stabilization when a ceramic resonator or a quartz-crystal oscillator is used. When the WIT instruction is executed, the internal clock φ stops in the HIGH but the oscillator continues running. This wait state is released when an interrupt is accepted (Note). Since the oscillator does not stop, the next instruction can be executed at once. When returning from the stop or the wait state, to accept an interrupt, set the corresponding interrupt enable bit to “1” before executing the STP or the WIT instructions. Note: In the wait mode, the following interrupts are invalid. (1) VSYNC interrupt (2) CRT interrupt (3) f(XIN)/4096 interrupt (4) Timer 1 interrupt using f(X IN)/4096 as count source (5) Timer 2 interrupt using P24/TIM2 pin input as count source (6) Timer 3 interrupt using P23/TIM3 pin input as count source (7) Timer 4 interrupt using f(X IN)/2 as count source (8) Multi-master I2C-BUS interface interrupt A circuit example using a ceramic resonator (or a quartz-crystal oscillator) is shown in Figure 55. Use the circuit constants in accordance with the resonator manufacture’s recommended values. A circuit example with external clock input is shown in Figure 56. Input the clock to the XIN pin, and open the XOUT pin. M37224M3-XXXSP XIN 19 XOUT 20 CIN COUT Fig. 55. Ceramic Resonator Circuit Example M37224M3-XXXSP X IN 19 Vcc External oscillation circuit Vss Fig. 56. External Clock Input Circuit Example Interrupt request S Interrupt disable flag I S Reset WIT instruction Q Q S Reset Q R R Selection gate : Connected to black side at reset. T34M : Timer 34 mode register STP instruction R STP instruction Internal clock 1/2 1/8 T34M0 T34M2 Timer 3 Timer 4 XIN XOUT Fig. 57. Clock Generating Circuit Block Diagram 52 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER DISPLAY OSCILLATION CIRCUIT The CRT display clock oscillation circuit has a built-in clock oscillation circuits, so that a clock for CRT display can be obtained simply by connecting an LC, an RC, a ceramic resonator or a quartz-crystal oscillator circuit across the pins OSC 1 and OSC 2. Select the clock for display with bits 0 and 1 of the CRT clock selection register (address 00ED16). ADDRESSING MODE The memory access is reinforced with 17 kinds of addressing modes. Refer to SERIES 740 User’s Manual for details. MACHINE INSTRUCTIONS There are 71 machine instructions. Refer to SERIES 740 User’s Manual for details. PROGRAMMING NOTES OSC1 OSC2 L C1 C2 Fig. 58. Display Oscillation Circuit AUTO-CLEAR CIRCUIT When a power source is supplied, the auto-clear function will oper______ ate by connecting the following circuit to the RESET pin. (1) The divide ratio of the timer is 1/(n+1). (2) Even though the BBC and BBS instructions are executed immediately after the interrupt request bits are modified (by the program), those instructions are only valid for the contents before the modification. At least one instruction cycle is needed (such as an NOP) between the modification of the interrupt request bits and the execution of the BBC and BBS instructions. (3) After the ADC and SBC instructions are executed (in the decimal mode), one instruction cycle (such as an NOP) is needed before the SEC, CLC, or CLD instruction is executed. (4) An NOP instruction is needed immediately after the execution of a PLP instruction. (5) In order to avoid noise and latch-up, connect a bypass capacitor (≈ 0.1 µF) directly between the VCC pin–VSS pin and the VCC pin– CNVSS pin, using a thick wire. DATA REQUIRED FOR MASK ORDERS The following are necessary when ordering a mask ROM production: (1) Mask ROM Order Confirmation From. (2) Mask Specification From. (3) Data to be written to ROM, in EPROM form (32-pin DIP Type 27C101, three identical copies). Circuit example 1 Vcc RESET Vss Circuit example 2 RESET Vcc Vss Note : Make the level change from “L” to “H” at the point at which the power source voltage exceeds the specified voltage. Fig. 59. Auto-clear Circuit Example 53 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VI Input voltage Input voltage Parameter Power source voltage VCC CNVSS P00–P07,P10–P17, P20–P27, P30–P34, OSC1, XIN, HSYNC, VSYNC, RESET P06, P07, P10–P17, P20–P27, P30–P32, R, G, B, OUT, D-A, XOUT, OSC2 P00–P05 R, G, B, OUT, P10–P17, P20–P27, P30, P31, D-A R, G, B, OUT, P06, P07, P10–P17, P20–P23, P30–P32, D-A P00–P05 P24–P27 Ta = 25 °C Conditions All voltages are based on VSS. Output transistors are cut off. Ratings –0.3 to 6 –0.3 to 6 –0.3 to VCC + 0.3 Unit V V V VO Output voltage –0.3 to VCC + 0.3 V VO IOH IOL1 Output voltage Circuit current Circuit current –0.3 to 13 0 to 1 (Note 1) 0 to 2 (Note 2) V mA mA IOL2 IOL3 Pd Topr Tstg Circuit current Circuit current Power dissipation Operating temperature Storage temperature 0 to 1 (Note 2) 0 to 10 (Note 3) 550 –10 to 70 –40 to 125 mA mA mW °C °C RECOMMENDED OPERATING CONDITIONS (Ta = –10 °C to 70 °C, VCC = 5 V ± 10 %, unless otherwise noted) Symbol VCC VSS VIH1 Parameter Power source voltage (Note 4), During CPU, CRT operation Power source voltage HIGH input voltage P00–P07,P10–P17, P20–P27, P30–P34, SIN, SCLK, HSYNC, VSYNC, RESET, XIN, OSC1, TIM2, TIM3, INT1, INT2, INT3 P00–P07,P10–P17, P20–P27, P30–P34 HSYNC, VSYNC, RESET,TIM2, TIM3, INT1, INT2, INT3, XIN, OSC1, SIN, SCLK Limits Min. 4.5 0 0.8VCC Typ. 5.0 0 Max. 5.5 0 VCC Unit V V V VIL1 VIL2 IOH IOL1 IOL2 IOL3 fCPU fCRT fhs1 fhs2 Notes 1: 2: 3: 4: LOW input voltage LOW input voltage 0 0 0.4 VCC 0.2 VCC 1 2 1 10 V mA mA mA mA mA MHz MHz kHz MHz HIGH average output current (Note 1) R, G, B, OUT, D-A, P10–P17, P20–P27, P30, P31 LOW average output current (Note 2) R, G, B, OUT, D-A, P06, P07, P10–P17, P20–P27, P30–P32 LOW average output current (Note 2) P00–P05 LOW average output current (Note 3) P24–P27 Oscillation frequency (for CPU operation) (Note 5) Oscillation frequency (for CRT display) (Note 5) Input frequency Input frequency TIM2, TIM3 SCLK XIN OSC1 7.9 5.0 8.0 8.1 8.0 100 1 The total current that flows out of the IC must be 20 mA (max.). The total input current to IC (IOL1 + IOL2) must be 30 mA or less. The total average input current for ports P24–P27 to IC must be 20 mA or less. Connect 0.1 µF or more capacitor externally between the power source pins VCC–VSS so as to reduce power source noise. Also connect 0.1 µF or more capacitor externally between the pins VCC–CNVSS. 5: Use a quartz-crystal oscillator or a ceramic resonator for the CPU oscillation circuit. 54 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER ELECTRIC CHARACTERISTICS (VCC = 5 V ± 10 %, VSS = 0 V, f(XIN) = 8 MHz, Ta = –10 °C to 70 °C, unless otherwise noted) Symbol ICC Parameter Power source current System operation Test conditions VCC = 5.5 V, f(XIN) = 8 MHz CRT ON Stop mode VOH VOL HIGH output voltage LOW output voltage VCC = 5.5 V, f(XIN) = 0 2.4 0.4 30 60 300 CRT OFF Limits Min. Typ. 20 Max. 40 Unit mA µA V V VCC = 4.5 V R, G, B, OUT, D-A, P10–P17, P20–P27, P30, P31 IOH = –0.5 mA R, G, B, OUT, D-A, P00–P07, P10–P17, P20–P23, P30–P32 P24–P27 RESET HSYNC, VSYNC, TIM2, TIM3, INT1, INT2, INT3, SIN, SCLK VCC = 4.5 V IOL = 0.5 mA VCC = 4.5 V IOL = 10.0 mA VCC = 5.0 V VCC = 5.0 V LOW output voltage VT+–VT– Hysteresis Hysteresis (Note) 3.0 0.5 0.5 1.3 1.3 V V IIZH HIGH input leak current RESET, P00–P07, P10–P17, P20–P27, P30–P34, HSYNC, VSYNC LOW input leak current RESET, P00–P07, P10–P17, P20–P27, P30–P34, HSYNC, VSYNC HIGH output leak current P00–P05 VCC = 5.5 V VI = 5.5 V VCC = 5.5 V VI = 0 V VCC = 5.5 V VO = 12 V 5 µA IIZL 5 µA IOZH 10 µA Note: P06, P07, P15, P23, P24 have the hysteresis when these pins are used as interrupt input pins or timer input pins. P20–P22 have the hysteresis when these pins are used as serial I/O pins. 55 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER A-D COMPARATOR CHARACTERISTICS (VCC = 5 V ± 10 %, VSS = 0 V, f(XIN) = 8 MHz, Ta = –10 °C to 70 °C, unless otherwise noted) Symbol — — Resolution Absolute accuracy 0 ±1 Parameter Test conditions Limits Min. Typ. Max. 6 ±2 Unit bits LSB Note: When VCC = 5 V, 1 LSB = 5/64 V. D-A CONVERTER CHARACTERISTICS (VCC = 5 V ± 10 %, VSS = 0 V, f(XIN) = 8 MHz, Ta = –10 °C to 70 °C, unless otherwise noted) Symbol — — tsu RO Resolution Absolute accuracy Setting time Output resistor 1 2.5 Parameter Test conditions Limits Min. Typ. Max. 7 2 3 4 Unit bits % µs kΩ 56 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER PACKAGE OUTLINE 57 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER GZZ–SH11–11B < 6XA0 > Mask ROM number 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M37224M3-XXXSP MITSUBISHI ELECTRIC Date : Receipt Section head signature Supervisor signature Note : Please fill in all items marked g. signature Issuance Company name TEL ( Date : ) Submitted by Supervisor g Customer Date issued g 1. Confirmation Specify the name of the product being ordered and the type of EPROMs submitted. Three EPROMs are required for each pattern. If at least two of the three sets of EPROMs submitted contain identical data, we will produce masks based on this data. We shall assume the responsibility for errors only if the mask ROM data on the products we produce differs from this data. Thus, extreme care must be taken to verify the data in the submitted EPROMs. Checksum code for entire EPROM EPROM type (indicate the type used) (hexadecimal notation) 27C101 EPROM address 000016 Product name 000F16 D000 16 FFFF 16 10000 16 107FF 16 10800 16 Character ROM 2 ASCII code : ‘M37224M3 –’ data ROM 12K bytes Character ROM 1 10FFF16 11000 16 1FFFF 16 (1) (2) Set “FF 16” in the shaded area. Write the ASCII codes that indicate the product name of “M37220M3–” to addresses 0000 16 to 000F 16. EPROM data check item (confirm the EPROM data and check “ ” the appropriate box) → Yes q Is “FF16” in the shaded area ? q Are the ASCII codes that indicates the product → Yes name of “M37224M3–” to addresses 0000 16 to 000F 16 ? g 2. Mark specification Mark specification must be submitted using the correct form for the type of package being ordered. Fill out the appropriate mark specification form (42P4B for M37224M3-XXXSP) and attach to the mask ROM confirmation form. g 3. Comments (1/3) 58 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER GZZ–SH11–22B 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M37224M3-XXXSP MITSUBISHI ELECTRIC How to Write the Product Name and Character ROM Data onto EPROMs Addresses 0000 16 to 000F 16 store the product name, and addresses 10000 16 to 10FFF 16 store the character pattern. If the name of the product contained in the EPROMs does not match the name on the mask ROM confirmation form, the ROM processing is disabled. Please make sure the data is written correctly. 1. How to input the name of the product with the ASCII code ASCII codes ‘M37224M3-’ are listed on the right. The addresses and data are in hexadecimal notation. Address 0000 16 0001 16 0002 16 0003 16 0004 16 0005 16 0006 16 0007 16 ‘M’ = ‘3’ = ‘7’ = ‘2’ = ‘2’ = ‘4’ = ‘M’ = ‘3’ = 4 D 16 3 3 16 3 7 16 3 2 16 3 2 16 3 4 16 4 D 16 3 3 16 Address 0008 16 0009 16 000A 16 000B 16 000C 16 000D 16 000E 16 000F 16 ‘–’ = 2 D 16 F F 16 F F 16 F F 16 F F 16 F F 16 F F 16 F F 16 2. Inputting the character ROM Input the character ROM data by dividing it into character ROM1 and character ROM2. For the character ROM data, see the next page and on. (2/3) 59 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER GZZ–SH11–22B< 6XA0 > 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M37224M3-XXXSP MITSUBISHI ELECTRIC The structure of character ROM (divided of 12 !16 dots font) Example Character code “1A16” Character ROM1 Character ROM2 ⇐ Example 101A0 16 0 to 1 101AF 16 2 3 4 5 6 7 8 9 A B C D E F b7 b6 b5 b4 b3 b2 b1 b0 0 016 0 416 0416 0A16 0A16 1 116 1 116 1 116 2 016 2 016 3 F16 4 016 4 016 4 016 0 016 0 016 ⇐ Example 109A0 16 0 to 1 109AF 16 2 3 4 5 6 7 8 9 A B C D E F b7 b6 b5 b4 b3 b2 b1 b0 F016 F016 F016 F016 F016 F016 F016 F016 F816 F816 F816 F416 F416 F416 F016 F016 F16 (3/3) 60 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER 42P4B (42-PIN SHRINK DIP) MARK SPECIFICATION FORM 61 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER APPENDIX Pin Configuration (TOP VIEW) HSYNC VSYNC P00/PWM0 P01/PWM1 P02/PWM2 P03/PWM3 P04/PWM4 P05/PWM5 P06/INT2/A-D4 P07/INT1 P23/TIM3 P24/TIM2 P25 P26 P27 D-A P32 CNVSS XIN X OUT VSS 1 2 3 4 5 6 7 42 41 40 39 38 37 36 P52/R P53/G P54/B P55/OUT P20/SCLK P21/SOUT P22/SIN P10 P11 P12 P13 P14 P15/A-D1/INT3 P16/A-D2 P17/A-D3 P30/A-D5/DA1 P31/A-D6/DA2 RESET OSC1/P33 OSC2/P34 VCC M37224M3-XXXSP 8 9 10 11 12 13 14 15 16 17 18 19 20 21 35 34 33 32 31 30 29 28 27 26 25 24 23 22 Outline 42P4B 62 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Memory Map 000016 Zero page SFR area 00FF16 013F16 Not used 021716 021B16 02C0 16 2 page register Not used ROM for display (4K bytes) 1000016 RAM (256 bytes) 00C0 16 10FFF16 ROM correction memory (RAM) 02FF16 RAM for display (Note) (80 bytes) Not used 060016 06B316 Not used D000 16 Block 1: addresses 02C0 16 to 02DF16 Block 2: addresses 02E0 16 to 02FF 16 Not used ROM (12K bytes) FF0016 FFDE16 FFFF 16 Interrupt vector area Special page 1FFFF 16 Note: Refer to Table 8. Contents of CRT display RAM. 63 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Memory Map of Special Function Register (SFR) sSFR Area (addresses C016 to DF16) < Bit allocation > 0 : “0” immediately after reset Function bit 1 : “1” immediately after reset ? : Undefined immediately after reset : Name : : No function bit 0 : Fix this bit to “0” (do not write “1”) 1 : Fix this bit to “1” (do not write “0”) Address C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16 Register b7 Bit allocation b0 b7 State immediately after reset ? 0016 ? 0016 ? 0016 ?? 0016 ? ? ?? 0016 ? 0016 ? ?? ? ? ? ? ? 0016 0016 ? ? ? ? ? 0016 ? ? ? b0 Port P0 (P0) Port P0 direction register (D0) Port P1 (P1) Port P1 direction register (D1) Port P2 (P2) Port P2 direction register (D2) Port P3 (P3) Port P3 direction register (D3) 0 0 0 ? ? ? Port P5 (P5) Port P5 direction register (D5) Port P3 output mode control register (P3S) DA-H register (DA-H) DA-L register (DA-L) PWM0 register (PWM0) PWM1 register (PWM1) PWM2 register (PWM2) PWM3 register (PWM3) PWM4 register (PWM4) PWM output control register 1 (PW) PWM output control register 2 (PN) PW7 PW6 PW5 PW4 PW3 PW2 PW1 PW0 PN4 PN3 PN2 DA2S DA1S P31S P30S 0 0 ? ? ? ? 0 0 ? ? ? ? Serial I/O mode register (SM) Serial I/O regsiter (SIO) DA1 conversion register (DA1) DA2 conversion register (DA2) SM6 SM5 0 SM3 SM2 SM1 SM0 DA17 DA27 0 0 DA15 DA14 DA13 DA12 DA11 DA10 DA25 DA24 DA23 DA22 DA21 DA20 64 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER s SFR Area (addresses E016 to FF16) < Bit allocation> 0 : “0” immediately after reset Function bit 1 : “1” immediately after reset ? : Undefined immediately after reset : Name : : No function bit 0 : Fix this bit to “0” (do not write “1”) 1 : Fix this bit to “1” (do not write “0”) Address E016 E116 E216 E316 E416 E516 E616 E716 E816 E916 EA16 EB16 EC16 ED16 EE16 EF16 F016 F116 F216 F316 F416 F516 F616 F716 F816 F916 FA16 FB16 FC16 FD16 FE16 FF16 Register b7 Bit allocation b0 b7 State immediately after reset 0016 ?? ?? ? 0? 00 0016 0016 0016 0016 0016 ? 0016 0016 ?0 0016 FF16 0716 FF16 0716 0016 0016 ? ? ? CK0 0 0 0016 FC16 0016 0016 0016 0016 b0 Horizontal register (HR) Vertical register 1 (CV1) Vertical register 1 (CV1) Character size register (CS) Border selection register (MD) Color register 0 (CO0) Color register 1 (CO1) Color register 2 (CO2) Color register 3 (CO3) CRT control register (CO) CRT port control register (CRTP) CRT clock selection register (CK) A-D control register 1 (AD1) A-D control register 2 (AD2) Timer 1 (TM1) Timer 2 (TM2) Timer 3 (TM3) Timer 4 (TM4) Timer 12 mode register (T12M) Timer 34 mode register (T34M) PWM5 register (PWM5) HR5 HR4 HR3 HR2 HR1 HR0 CV16 CV15 CV14 CV13 CV12 CV11 CV10 CV26 CV25 CV24 CV23 CV22 CV21 CV20 0 0 0 0 ? ? 0 0 ? ? 0 0 ? ? ? ? ? ? ? 0 ? ? ? ? CS21 CS20 CS11 CS10 MD20 CO05 CO15 CO25 CO35 CO03 CO02 CO01 CO13 CO12 CO11 CO23 CO22 CO21 CO33 CO32 CO31 MD10 0 0 0 0 CC2 CC1 CC0 OP7 OP6 OP5 OUT R/G/B VSYC HSYC 0 0 0 0 ADM4 0 0 CK1 CK0 ADM2 ADM1 ADM0 0 0 0 0 0 0 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0 0 T12M4 T12M3 T12M2 T12M1 T12M0 T34M5 T34M4 T34M3 T34M2 T34M1 T34M0 Interrupt input polarity register (RE) Test register (TEST) CPU mode register (CPUM) Interrupt request register 1 (IREQ1) Interrupt request register 2 (IREQ2) Interrupt control register 1 (ICON1) Interrupt control register 2 (ICON2) 0 1 IT3R RE5 RE4 RE3 CK0 0 CM2 0 0 0 0 0 0 0 0 ? 1 1 0016 11 MSR CK0 VSCR CRTR TM4R TM3R TM2R TM1R 0 IT3E S1R IT2R IT1R VSCE CRTE TM4E TM3E TM2E TM1E 0 0 0 MSE 0 S1E IT2E IT1E 65 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER sSFR Area (addresses 21716 to 21B16) < Bit allocation > < State immediately after reset > 0 : “0” immediately after reset Function bit 1 : “1” immediately after reset ? : Undefined immediately after reset : Name : : No function bit 0 : Fix this bit to “0” (do not write “1”) 1 : Fix this bit to “1” (do not write “0”) Address 21716 21816 21916 21A16 21B16 Register b7 Bit allocation b0 b7 State immediately after reset 0016 0016 0016 0016 ?0 b0 ROM correction address 1 (high-order) ROM correction address 1 (low-order) ROM correction address 2 (high-order) ROM correction address 2 (low-order) ROM correction enable register (RCR) 0 0 RC1RC0 ? ? ? 0 0 0 66 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Internal State of Processor Status Register and Program Counter at Reset < Bit allocation > < State immediately after reset > 0 : “0” immediately after reset : Name : Function bit 1 : “1” immediately after reset ? : Undefined immediately after reset : No function bit 0 : Fix this bit to “0” (do not write “1”) 1 : Fix this bit to “1” (do not write “0”) Register b7 Processor status register (PS) Program counter (PCH) Program counter (PCL) Bit allocation b0 b7 State immediately after reset b0 N V T B D I Z C ? ????1?? Contents of address FFFF 16 Contents of address FFFE 16 67 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Structure of Register The figure of each register structure describes its functions, contents at reset, and attributes as follows: CPU Mode Register b7 b6 b5 b4 b3 b2 b1 b0 11 00 Bit attributes (Note 2) Bits Values immediately after reset release (Note 1) CPU mode register (CPUM) (CM) [Address FB 16] B Name 0, 1 Processor mode bits (CM0, CM1) Functions b1 b0 After reset R W 0 RW 0 0 1 1 0: Single-chip mode 1: 0: Not available 1: 0 1 1 2 Stack page selection bit (Note) (CM2) 0: 0 page 1: 1 page RW RW RW RW 3, 4 Fix these bits to “1.” Nothing is assigned. This bit is write disable bit. When this bit is read out, the value is “0.” b7 b6 6, 7 Clock switch bits (CM6, CM7) 0 0: f(X IN) = 8 MHz 0 1: f(X IN) = 12 MHz 1 0: f(X IN) = 16 MHz 1 1: Do not set 5 0 : Bit in which nothing is assigned Notes 1: Values immediately after reset release 0••••••“0” after reset release 1••••••“1” after reset release ?••••••Indeterminate after reset release 2: Bit attributes••••••The attributes of control register bits are classified into 3 types : read-only, write-only and read and write. In the figure, these attributes are represented as follows : W••••••Write R••••••Read ••••••Write enabled ••••••Read enabled ! ••••••Write disabled ! ••••••Read disabled V ••••••“0” can be set by software, but “1” cannot be set. 68 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Port Pi Direction Register b7 b6 b5 b4 b3 b2 b1 b0 Port Pi direction register (Di) (i=0,1,2) [Addresses 00C116, 00C316, 00C516] B 0 1 2 3 4 5 6 7 Name Port Pi direction register Functions 0 : Port Pi0 input mode 1 : Port Pi0 output mode 0 : Port Pi1 input mode 1 : Port Pi1 output mode 0 : Port Pi2 input mode 1 : Port Pi2 output mode 0 : Port Pi3 input mode 1 : Port Pi3 output mode 0 : Port Pi4 input mode 1 : Port Pi4 output mode 0 : Port Pi5 input mode 1 : Port Pi5 output mode 0 : Port Pi6 input mode 1 : Port Pi6 output mode 0 : Port Pi7 input mode 1 : Port Pi7 output mode After reset R W 0 0 0 0 0 0 0 0 RW RW RW RW RW RW RW RW Port Pi Direction Register Addresses 00C116, 00C316, 00C516 Port P3 Direction Register b7 b6 b5 b4 b3 b2 b1 b0 Port P3 direction register (D3) [Address 00C716] B 0 1 2 3 to 7 Name Port P3 direction register Functions 0 : Port P30 input mode 1 : Port P30 output mode 0 : Port P31 input mode 1 : Port P31 output mode 0 : Port P32 input mode 1 : Port P32 output mode After reset R W 0 0 0 0 RW RW RW R— Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Port P3 Direction Register Address 00C716 69 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Port P5 Direction Register b7 b6 b5 b4 b3 b2 b1 b0 Port P5 direction register (D5) [Address 00CB16 ] B Name Functions After reset R W 0 0 0 0 0 R— RW RW RW RW 0, 1, Nothing is assigned. These bits are write disable bits. 6, 7 When these bits are read out, the values are “0.” 2 to 5 Port P5 direction register 0 : CRT output (R) 1 : Output port P5 2 0 : CRT output (G) 1 : Output port P5 3 0 : CRT output (B) 1 : Output port P5 4 0 : CRT output (OUT) 1 : Output port P5 5 Port P5 Direction Register Addresses 00CB16 Port P3 Output Mode Control Register b7 b6 b5 b4 b3 b2 b1 b0 Port P3 output mode control register (P3S) [address 00CD16] B 0 1 2 3 4 to 7 Name P30 output structure selection bit (P30S) P31 output structure selection bit (P31S) DA1 output enable bit DA2 output enable bit Functions 0 : CMOS output 1 : N-channel open-drain output 0 : CMOS output 1 : N-channel open-drain output 0 : P30 input/output 1 : DA1 output 0 : P31 input/output 1 : DA2 output After reset R W 0 0 0 0 0 RW RW RW RW R— Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Port P3 Output Mode Control Register Address 00CD16 70 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER PWM Output Control Register 1 b7 b6 b5 b4 b3 b2 b1 b0 PWM output control register 1 (PW) [Address 00D516] B Name Functions 0 DA, PWM count source 0 : Count source supply 1 : Count source stop selection bit (PW0) 1 2 3 4 5 6 7 DA/PN4 output selection bit (PW1) P00/PWM0 output selection bit (PW2) P01/PWM1 output selection bit (PW3) P02/PWM2 output selection bit (PW4) P03/PWM3 output selection bit (PW5) P04/PWM4 output selection bit (PW6) P05/PWM5 output selection bit (PW7) 0 : DA output 1 : PN4 output 0: P00 output 1: PWM0 output 0: P01 output 1: PWM1 output 0: P02 output 1: PWM2 output 0: P03 output 1: PWM3 output 0: P04 output 1: PWM4 output 0: P05 output 1: PWM5 output After reset R W RW 0 0 0 0 0 0 0 0 RW RW RW RW RW RW RW PWM Output Control Register 1 Address 00D516 PWM Output Control Register 2 b7 b6 b5 b4 b3 b2 b1 b0 PWM output control register 2 (PN) [Address 00D6 16] B Name Functions After reset R W 0, 1 Nothing is assigned. These bits are write disable bits. 0 R— When these bits are read out, the values are “0.” 2 3 4 DA output polarity selection bit (PN3) PWM output polarity selection bit (PN4) DA general-purpose output bit (PN5) 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity 0 : Output LOW 1 : Output HIGH 0 0 0 RW RW RW 5 Nothing is assigned. These bits are write disable bits. to When these bits are read out, the values are “0.” 7 0 R— PWM Output Control Register 2 Address 00D616 71 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Serial I/O Mode Register b7 b6 b5 b4 b3 b2 b1 b0 0 Serial I/O mode register (SM) [Address 00DC 16] B Name b1 0 0 1 1 Functions b0 0: f(X IN)/4 1: f(X IN)/16 0: f(X IN)/32 1: f(X IN)/64 After reset R W RW 0 0, 1 Internal synchronous clock selection bits (SM0, SM1) 2 3 Synchronous clock selection bit (SM2) Serial I/O port selection bit (SM3) Fix this bit to “0.” Transfer direction selection bit (SM5) Serial input pin selection bit (SM6) 0: External clock 1: Internal clock 0: P2 0, P2 1 functions as port 1: S CLK, SOUT 0 RW 0 RW 4 5 6 7 0 0: LSB first 1: MSB first 0: Input signal from S IN pin 1: Input signal from S OUT pin 0 0 0 RW RW RW R— Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Serial I/O Mode Register Address 00DC16 DAi Conversion Register b7 b6 b5 b4 b3 b2 b1 b0 0 DAi conversion register (DAi) (i = 1 and 2) [Address 00DE16, 00DF 16] B Name b7 0 1 0 b5 0 0 0 b4 0 0 0 b3 0 0 0 Functions b2 0 0 0 b1 0 0 1 b0 0 : 0/128Vcc 1 : 1/128Vcc 0 : 2/128Vcc After reset RW 0 to 5, DA conversion set 7 bits (DAi0 to DAi5) Indeterminate R W 11 01 11 1 1 1 1 1 1 1 1 1 1 1 1 0 : 125/128Vcc 1 : 126/128Vcc 1 : 127/128Vcc 6 Fix this bit to “0.” 0 RW DAi Conversion Register Addresses 00DE16, 00DF16 72 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Horizontal Position Register b7 b6 b5 b4 b3 b2 b1 b0 Horizontal position register (HR) [Address 00E016 ] B 0 to 5 Name Horizontal display start positions (HR0 to HR5) Functions 64 steps (0016 to 3F16) After reset 0 0 RW RW R— 6, 7 Nothing is assigned. These bits are write disable bits. When thses bits are read out, the values are “0.” Horizontal Position Register Address 00E016 Vertical Position Register i b7 b6 b5 b4 b3 b2 b1 b0 Vertical position register i (CVi) (i = 1 and 2) [Addresses 00E116, 00E216] B 0 to 6 7 Name Vertical display start positions (CVi : CVi0 to CVi6) Functions 128 steps (00 16 to 7F16 ) After reset RW Indeterminate R W Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” 0 R— Vertical Position Register i Address 00E116, 00E216 Character Size Register b7 b6 b5 b4 b3 b2 b1 b0 Character size register (CS) [Address 00E416] B Name Functions 00 : Minimum size 01 : Medium size 10 : Large size 11 : Do not set. 00 : Minimum size 01 : Medium size 10 : Large size 11 : Do not set. After reset RW 0, 1 Character size of block 1 selection bits (CS10, CS11) 2,3 Character size of block 2 selection bits (CS20,CS21) 4 to 7 Indeterminate R W Indeterminate R W Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” 0 R— Character Size Register Address 00E416 73 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Border Selection Register b7 b6 b5 b4 b3 b2 b1 b0 Border selection register (MD) [Address 00E5 16] B 0 1 2 3 to 7 Name Functions After reset RW Block 1 OUT output 0 : Same output as R, G, B is output border selection bit (MD10) 1 : Border output Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Block 2 OUT output 0 : Same output as R, G, B is output border selection bit (MD20) 1 : Border output Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Indeterminate R W 0 R— Indeterminate R W 0 R— Border Selection Register Address 00E516 Color Register i b7 b6 b5 b4 b3 b2 b1 b0 0 Color register i (COi) (i = 0 to 3) [Addresses 00E6 16 to 00E9 16] B 0 1 2 3 Name Fix this bit to “0.” B signal output selection bit (COi1) G signal output selection bit (COi2) R signal output selection bit (COi3) Functions After reset R W 0 R— RW RW RW R— RW 0 : No character is output 1 : Character is output 0 : No character is output 1 : Character is output 0 : No character is output 1 : Character is output 0 0 0 0 0 4, Nothing is assigned. These bits are write disable bits. 6, 7 When these bits are read out, the values are “0.” 5 OUT signal output control bit (COi5) 0 : Character is output 1 : Blank is output Color Register i Addresses 00E616 to 00E916 74 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER CRT Control Register b7 b6 b5 b4 b3 b2 b1 b0 CRT control register (CC) [Address 00EA 16] B 0 1 2 3 to 7 Name All-blocks display control bit (CC0) (See note) Block 1 display control bit (CC1) Block 2 display control bit (CC2) Functions 0 : All-blocks display off 1 : All-blocks display on 0 : Block 1 display off 1 : Block 1 display on 0 : Block 2 display off 1 : Block 2 display on After reset R W 0 0 0 0 RW RW RW R— Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Note: Display is controlled by logical product (AND) between the all-blocks display control bit and each block control bit. CRT Control Register Address 00EA16 CRT Port Control Register b7 b6 b5 b4 b3 b2 b1 b0 CRT port control register (CRTP) [Address 00EC16] B 0 1 2 3 4 5 6 7 Name HSYNC input polarity switch bit (HSYC) VSYNC input polarity switch bit (VSYC) Functions 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity After reset R W 0 0 0 0 0 0 0 0 RW RW RW R— RW RW RW RW R/G/B output polarity switch 0 : Positive polarity 1 : Negative polarity bit (R/G/B) Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” OUT output polarity switch bit (OUT) R signal output switch bit (OP5) G signal output switch bit (OP6) B signal output switch bit (OP7) 0 : Positive polarity 1 : Negative polarity 0 : R signal output 1 : MUTE signal output 0 : G signal output 1 : MUTE signal output 0 : B signal output 1 : MUTE signal output CRT Port Control Register Address 00EC16 75 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER CRT Clock Selection Register b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 0 0 0 CRT clock selection register (CK) [Address 00ED16 ] B Name b1 b0 0 0 Functions Functions 0 The clock for display is supplied by connecting RC or LC across the pins OSC1 and OSC2. 1 Since the main clock is used as the clock for CRT oscillation display, the oscillation frequency is limited. frequency Because of this, the character size in width = f(X IN) (horizontal) direction is also limited. In this CRT oscillation 0 case, pins OSC1 and OSC2 are also used frequency as input ports P3 3 and P34 respectively. = f(XIN )/1.5 1 The clock for display is supplied by connecting the following across the pins OSC1 and OSC2. • a ceramic resonator only for CRT display and a feedback resistor • a quartz-crystal oscillator only for CRT display and a feedback resistor (Note) After reset R W 0 RW 0, 1 CRT clock selection bits (CK0,CK1) 1 1 2 to 7 Fix these bits to “0.” 0 RW Note: It is necessary to connect other ceramic resonator or quartz-crystal oscillator across the pins X IN and X OUT . CRT Clock Selection Register Address 00ED16 A-D Control Register 1 b7 b6 b5 b4 b3 b2 b1 b0 A-D control register 1 (AD1) [Address 00EE16] B 0 to 2 Name Analog input pin selection bits (ADM0 to ADM2) b2 0 0 0 0 1 1 1 1 b1 0 0 1 1 0 0 1 1 Functions b0 0 : A-D1 1 : A-D2 0 : A-D3 1 : A-D4 0 : A-D5 1 : A-D6 0: Do not set. 1: After reset R W 0 RW 3, Nothing is assigned. These bits are write disable bits. 5 to 7 When these bits are read out, the values are “0.” 4 Storage bit of comparison result (ADM4) 0: Input voltage < reference voltage 1: Input voltage > reference voltage 0 Indeterminate R— R— A-D Control Register 1 Address 00EE16 76 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER A-D Control Register 2 b7 b6 b5 b4 b3 b2 b1 b0 A-D control register 2(AD2) [Address 00EF 16 ] B 0 to 5 Name D-A converter set bits (ADC0 to ADC5) b5 0 0 0 b4 0 0 0 b3 0 0 0 Functions b2 0 0 0 b1 0 0 1 b0 0 : 1/128Vcc 1 : 3/128Vcc 0 : 5/128Vcc After reset 0 RW RW 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 : 123/128Vcc 0 : 125/128Vcc 1 : 127/128Vcc 0 R— 6, 7 Nothing is assigned. These bits are write disable bits. When these bits are reed out, the values are “ 0.” A-D Control Register 2 Address 00EF16 Timer 12 Mode Register b7 b6 b5 b4 b3 b2 b1 b0 0 Timer 12 mode register (T12M) [Address 00F4 16] B Name 0 Timer 1 count source selection bit (T12M0) 1 Timer 2 count source selection bit (T12M1) Timer 1 count stop bit (T12M2) Timer 2 count stop bit (T12M3) Timer 2 internal count source selection bit (T12M4) Fix this bit to “0.” Functions 0: f(XIN)/16 1: f(XIN)/4096 0: Internal clock 1: External clock from TIM2 pin 0: Count start 1: Count stop 0: Count start 1: Count stop 0: f(XIN)/16 1: Timer 1 overflow After reset R W 0 RW 0 RW 2 3 4 0 0 0 RW RW RW 5 0 0 RW R— 6,7 Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Timer 12 Mode Register Address 00F416 77 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Timer 34 Mode Register b7 b6 b5 b4 b3 b2 b1 b0 Timer 34 mode register (T34M) [Address 00F516] B Name 0 Timer 3 count source selection bit (T34M0) 1 Timer 4 internal count source selection bit (T34M1) Timer 3 count 1 stop bit (T34M2) Timer 4 count stop bit (T34M3) Timer 4 count source selection bit (T34M4) Functions 0: f(XIN)/16 1: External clock 0: Timer 3 overflow 1: f(X IN)/16 0: Count start 1: Count stop 0: Count start 1: Count stop 0: Internal clock 1: f(XIN)/2 After reset R W 0 RW 0 RW 2 3 4 5 0 0 0 0 0 RW RW RW RW R— Timer 3 external count 0: External clock from TIM3 pin source selection bit (T34M5) 1: External clock from H SYNC pin 6,7 Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Timer 34 Mode Register Address 00F516 Interrupt Input Polarity Register b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 Interrupt input polarity register(RE) [Address 00F916 ] B 0 Name Functions After reset Indeterminate 0 RW R— RW RW RW RW R— RW Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is indeterminate. 1, 2 Fix these bits to “0.” 3 4 5 6 7 INT1 polarity switch bit (RE3) INT2 polarity switch bit (RE4) INT3 polarity switch bit (RE5) 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity 0 0 0 0 0 Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Fix this bit to “0.” Interrupt Input Polarity Register Address 00F916 78 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER CPU Mode Register b7 b6 b5 b4 b3 b2 b1 b0 00 11111 CPU mode register (CPUM (CM)) [Address FB 16] B Name 0, 1 Processor mode bits (CM0, CM1) Functions b1 b0 After reset R W 0 RW 0 0 1 1 0: Single-chip mode 1: 0: Not available 1: 1 1 RW RW 2 Stack page selection bit (CM2) (See note) 0: 0 page 1: 1 page 3 Fix these bits to “1.” to 7 Note: This bit is set to “1” after the reset release. CPU Mode Register Address 00FB16 Interrupt Request Register 1 b7 b6 b5 b4 b3 b2 b1 b0 Interrupt request register 1 (IREQ1) [Address 00FC16] B 0 Name Functions After reset R W 0 0 0 0 0 0 0 0 RV RV RV RV RV RV R— RV 0 : No interrupt request issued Timer 1 interrupt 1 : Interrupt request issued request bit (TM1R) 1 Timer 2 interrupt 0 : No interrupt request issued request bit (TM2R) 1 : Interrupt request issued 0 : No interrupt request issued 2 Timer 3 interrupt 1 : Interrupt request issued request bit (TM3R) 0 : No interrupt request issued 3 Timer 4 interrupt 1 : Interrupt request issued request bit (TM4R) 0 : No interrupt request issued 4 CRT interrupt request bit (CRTR) 1 : Interrupt request issued 0 : No interrupt request issued 5 V SYNC interrupt request bit (VSCR) 1 : Interrupt request issued 6 Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” 7 INT3 interrupt 0 : No interrupt request issued request bit (IT3R) 1 : Interrupt request issued Interrupt Request Register 1 Address 00FC16 79 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Interrupt Request Register 2 b7 b6 b5 b4 b3 b2 b1 b0 0 Interrupt request register 2 (IREQ2) [Address 00FD16] B 0 Name Functions After reset R W 0 0 0 0 0 0 RV RV RV R— RV RW INT1 interrupt 0 : No interrupt request issued request bit (ITIR) 1 : Interrupt request issued 1 INT2 interrupt 0 : No interrupt request issued request bit (IT2R) 1 : Interrupt request issued 0 : No interrupt request issued 2 Serial I/O interrupt request bit (SIR) 1 : Interrupt request issued 3, Nothing is assigned. These bits are write disable bits. 5, 6 When these bits are read out, the values are “0.” 4 f(XIN)/4096 interrupt 0 : No interrupt request issued request bit (MSR) 1 : Interrupt request issued 7 Fix this bit to “0.” V: “0” can be set by software, but “1” cannot be set. Interrupt Request Register 2 Address 00FD16 Interrupt Control Register 1 b7 b6 b5 b4 b3 b2 b1 b0 Interrupt control register 1 (ICON1) [Address 00FE16] B 0 1 2 3 4 5 6 7 Name Timer 1 interrupt enable bit (TM1E) Timer 2 interrupt enable bit (TM2E) Timer 3 interrupt enable bit (TM3E) Timer 4 interrupt enable bit (TM4E) CRT interrupt enable bit (CRTE) VSYNC interrupt enable bit (VSCE) Functions 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled After reset R W 0 0 0 0 0 0 0 0 RW RW RW RW RW RW R— RW Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” INT3 interrupt enable bit 0 : Interrupt disabled (IN3E) 1 : Interrupt enabled Interrupt Control Register 1 Address 00FE16 80 MITSUBISHI MICROCOMPUTERS M37224M3-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Interrupt Control Register 2 b7 b6 b5 b4 b3 b2 b1 b0 000 0 Interrupt control register 2 (ICON2) [Address 00FF16] B 0 Name Functions 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled After reset R W 0 0 0 0 0 : Interrupt disabled 1 : Interrupt enabled 0 RW RW RW RW RW INT1 interrupt enable bit (IT1E) 1 INT2 interrupt enable bit (IT2E) 2 Serial I/O interrupt enable bit (SIE) 3, Fix these bits to “0.” 5 to 7 4 f(XIN)/4096 interrupt enable bit (MSE) Interrupt Control Register 2 Address 00FF16 ROM Correction Enable Register b7 b6 b5 b4 b3 b2 b1 b0 0 0 ROM correction enable register (RCR) [Address 021B16] B 0 1 Name Block 1 enable bit (RC0) Block 2 enable bit (RC1) Functions 0: Disabled 1: Enabled 0: Disabled 1: Enabled After reset R W 0 0 0 0 RW RW RW R— 2,3 Fix these bits to “0.” 4 to 7 Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” ROM Correction Enable Register Address 021B16 81 Keep safety first in your circuit designs! • Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials • • • These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer’s application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party. Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party’s rights, originating in the use of any product data, diagrams, charts or circuit application examples contained in these materials. All information contained in these materials, including product data, diagrams and charts, represent information on products at the time of publication of these materials, and are subject to change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product listed herein. Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein. • • • • © 1997 MITSUBISHI ELECTRIC CORP. New publication, effective Nov. 1997. Specifications subject to change without notice. REVISION DESCRIPTION LIST Rev. No. 1.0 2.0 2.1 First Edition M37221EF-XXXSP, M37221EFSP DATA SHEET Revision Description Rev. date 9708 971130 980731 Information about copywright note, revision number, release data added (last page). Correct note (P43) (1/1)
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