MC100ES6030EG

MOTOROLA Freescale Semiconductor, Inc. SEMICONDUCTOR TECHNICAL DATA Order Number: MC100ES6030 Rev 0, 10/2003 DATA SHEET Preliminary Information 2.5/3.3V ECL DTriple D with Flip-- Flop 2.5/3.3V ECL Triple Flip-Flop Set and Reset with Set and Reset MC100ES6030 MC100ES6030 The MC100ES6030 is a triple master--slave D flip--flop with differential outputs. When the clock input is low, data enters the master latch and transfers to the slave during a positive transition on the clock input. Freescale Semiconductor, Inc... Each flip--flop has individual Reset inputs while the Set input is shared. The Set and Reset inputs are asynchronous and override the clock inputs. DW SUFFIX 20--LEAD SOIC PACKAGE CASE 751D Features 1.2 GHz minimum toggle frequency • • • • • • 450 ps typical propagation delay ORDERING INFORMATION LVPECL operating range: VCC = 2.375 V to 3.8 V, VEE = 0 V Device Package LVECL operating range: VCC = 0 V, VEE = --2.375 V to --3.8 V 20--lead SOIC package MC100ES6030DW SO--20 Ambient temperature range --40°C to +85°C MC100ES6030DWR2 SO--20 PIN DESCRIPTION PIN VCC Q0 Q0 VCC Q1 Q1 VCC Q2 Q2 VEE 20 19 18 17 16 15 14 13 12 11 Q Q S Q R Q S Q R Q S R FUNCTION D0--D2 ECL Data Inputs R0--R2 ECL Reset Inputs CLK0--CLK2 ECL Clock Inputs S012 ECL Common Set Input Q0--Q2, Q0--Q2 ECL Differential Data Outputs VCC Positive Supply VEE Negative Supply TRUTH TABLE 1 2 3 4 5 6 7 8 9 10 R S D CLK Q Q S012 D0 CLK0 R0 D1 CLK1 R1 D2 CLK2 R2 L L L Z L H L L H Z H L H L L H X X X X L H H L H H X X Undef Undef Figure 1. 20--Lead Pinout (Top View) and Logic Diagram Z = LOW to HIGH Transition X = Don’t Care This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. IDT™ 2.5/3.3V ECL Triple D Flip-Flop with Set and Reset For1 More Information On This Product, © Motorola, Inc. 2003 Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Go to: www.freescale.com 1 MC100ES6030 MC100ES6030 2.5/3.3V ECL Triple D Flip-Flop with Set and Reset NETCOM Freescale Semiconductor, Inc. MC100ES6030 Table 1. GENERAL SPECIFICATIONS Characteristics Value Internal Input Pulldown Resistor TBD Internal Input Pullup Resistor ESD Protection TBD Human Body Model Machine Model Charged Device Model TBD TBD TBD 0 LFPM, 20 SOIC 500 LFPM, 20 SOIC TBD TBD θJA Thermal Resistance (Junction--to--Ambient) Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Table 2. ABSOLUTE MAXIMUM RATINGSa Freescale Semiconductor, Inc... Symbol Rating Conditions Rating Units Difference between VCC & VEE 3.9 V VCC -- VEE ± 3.6 V VCC + 0.3 VEE -- 0.3 V V Continuous Surge 50 100 mA mA Operating Temperature Range --40 to +85 °C Storage Temperature Range --65 to +150 °C VSUPPLY Power Supply Voltage VIN Input Voltage Iout Output Current TA Tstore a Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute--maximum--rated conditions is not implied. Table 3. DC CHARACTERISTICS (VCC = 0 V, VEE = --2.5 V ±5% or --3.8 V to --3.135 V; VCC = 2.5 V ±5% or 3.135 V to 3.8 V, VEE = 0 V) - 40°C Symbol IEE Characteristic Min Typ Power Supply Current 0°C to 85°C Max Min TBD Typ Max TBD Unit mA VOH Output HIGH Voltagea VCC--1085 VCC--1005 VCC--880 VCC--1025 VCC--955 VCC--880 mV VOL Output LOW Voltagea VCC--1830 VCC--1695 VCC--1555 VCC--1810 VCC--1705 VCC--1620 mV VIH Input HIGH Voltage VCC--1165 VCC--880 VCC--1165 VCC--880 mV VIL Input LOW Voltage VCC--1810 VCC--1475 VCC--1810 VCC--1475 mV IIN Input Current ±150 µV ±150 a Outputs are terminated through a 50Ω resistor to VCC--2 volts. Output termination voltage VTT = 0 V for VCC = 2.5 V operation is supported, but the power consumption of the device will increase. IDT™ 2.5/3.3V ECL Triple D Flip-Flop with Set and Reset MOTOROLA 2 Freescale Timing Solutions Organization has been by Integrated Device Technology, Inc For acquired More Information On This Product, 2 Go to: www.freescale.com MC100ES6030 TIMING SOLUTIONS MC100ES6030 2.5/3.3V ECL Triple D Flip-Flop with Set and Reset NETCOM Freescale Semiconductor, Inc. MC100ES6030 Table 4. AC CHARACTERISTICS (VCC = 0 V, VEE = --2.5 V ±5% or --3.8 V to --3.135 V; VCC = 2.5 V ±5% or 3.135 V to 3.8 V, VEE = 0 V) - 40°C Symbol Characteristic Min Maximum Toggle Frequency tPLH tPHL Propagation Delay to Output ts th Setup Time Hold Time tRR Set/Reset Recovery tPW Minimum Pulse Width tJITTER Cycle--to--Cylce Jitter tr/tf Output Rise/Fall Time (20%--80%) Freescale Semiconductor, Inc... fmax 25°C Typ Max 1.2 Min 85°C Max 1.2 CLK S, R CLK S, R Typ Min Typ Max 1.2 Unit GHz 600 ps 150 200 0 100 150 200 0 100 150 200 0 100 ps ps 200 100 200 100 200 100 ps 400 650 400 650