DATASHEET
MK2703
PLL AUDIO CLOCK SYNTHESIZER
Description
Features
The MK2703 is a low-cost, low-jitter, high-performance PLL
clock synthesizer designed to replace oscillators and PLL
circuits in set-top box and multimedia systems. Using IDT’s
patented analog Phase Locked Loop (PLL) techniques, the
device uses a 27 MHz crystal or clock input to produce a
buffered reference clock and a selectable audio clock.
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Packaged in 8-pin SOIC
IDT manufactures the largest variety of Set-Top Box and
multimedia clock synthesizers for all applications. Consult
IDT to eliminate VCXOs, crystals and oscillators from your
board.
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Patented zero ppm synthesis error in all clocks
Available in Pb (lead) free package
Uses an inexpensive, fundamental mode crystal or clock
Supports MPEG sampling rates of 32 kHz, 44.1 kHz, 48
kHz, and 96 kHz
All frequencies are frequency locked
Advanced, low power, sub-micron CMOS process
Operating voltage of 3.3 V or 5 V
Industrial temperature version available
The MK2703B is recommended for new designs
NOTE: EOL for non-green parts to occur on 5/13/10
per PDN U-09-01
Block Diagram
VDD
PLL Clock
Synthesis
and Control
Circuitry
S1:0 2
Audio Clock
X1
27 MHz
crystal or
clock input
Crystal
Oscillator
27M
X2
Capacitors are required for crystal tuning
IDT™ PLL AUDIO CLOCK SYNTHESIZER
GND
1
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PLL AUDIO CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
Pin Assignment
AUDIO CLOCK OUTPUT SELECT TABLE
S1
S0
CLK (MHz)
X1
1
8
X2
0
0
8.192
VDD
2
7
S0
0
1
11.2896
GND
3
6
S1
1
0
12.288
27M
4
5
CLK
1
1
24.576
Key: 0 = Connect pin directly to ground
8-pin (150 mil) SOIC
1 = Connect pin directly to VDD
Pin Descriptions
Pin
Pin
Number Name
Pin
Type
Pin Description
1
X1
XI
Crystal Connection. Connect to a 27 MHz fundamental crystal or clock.
2
VDD
Power
Connect to +3.3 V or +5 V.
3
GND
Power
Connect to ground.
4
27M
Output
27 MHz buffered reference clock output.
5
CLK
Output
Audio clock output per table above.
6
S1
Input
Audio clock frequency select input #1. Determines CLK output per table
above. Internal pull-up resistor.
7
S0
Input
Audio clock frequency select input #0. Determines CLK output per table
above. Internal pull-up resistor.
8
X2
XO
Crystal connection to a 27 MHz crystal, or leave unconnected for clock
output.
External Components
Decoupling Capacitor
Series Termination Resistor
As with any high-performance mixed-signal IC, the MK2703
must be isolated from system power supply noise to perform
optimally.
A 33Ω terminating resistor can be used next to the clock
outputs for trace lengths over one inch.
Crystal Load Capacitors
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 2 and 3. It must be
connected close to the MK2703 to minimize lead
inductance. No external power supply filtering is required for
the MK2703.
IDT™ PLL AUDIO CLOCK SYNTHESIZER
The total on-chip capacitance is approximately 16 pF. A
parallel resonant, fundamental mode, AT cut 27 MHz crystal
should be used. The device crystal connections should
include pads for small capacitors from X1 to ground and
from X2 to ground. These capacitors are used to adjust the
2
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PLL AUDIO CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
connected from each of the pins X1 and X2 to ground.
stray capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming process,
it is important to keep stray capacitance to a minimum by
using very short PCB traces (and no vias) between the
crystal and device. Crystal capacitors, if needed, must be
The value (in pF) of these crystal caps should equal (CL -16
pF)*2. In this equation, CL= crystal load capacitance in pF.
Example: For a crystal with an 18 pF load capacitance, each
crystal capacitor would be 4 pF [(18-16) x 2] = 4.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK2703. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Rating
Supply Voltage, VDD
-0.5 V to 7 V
All Inputs and Outputs
-0.5 V to VDD+0.5 V
Ambient Operating Temperature, MK2703S (commercial)
0 to +70° C
Ambient Operating Temperature, MK2703SI (industrial)
-40 to +85° C
Storage Temperature
-65 to +150° C
Soldering Temperature
260° C
Recommended Operation Conditions
Parameter
Min.
Max.
Units
-40
+85
°C
+3.13
+5.50
V
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Typ.
DC Electrical Characteristics
VDD=3.3 V ±5% , Ambient temperature -40 to +85° C, unless stated otherwise
Parameter
Symbol
Conditions
Operating Voltage
VDD
Input High Voltage
VIH
X1 pin only
Note 1
Input Low Voltage
VIL
X1 pin only
Note 1
Input High Voltage
VIH
S0, S1 pins
Input Low Voltage
VIL
S0, S1 pins
Output High Voltage
VOH
IOH = -12 mA
IDT™ PLL AUDIO CLOCK SYNTHESIZER
Min.
Typ.
3.13
3
Max.
Units
5.50
V
(VDD/2)+1 VDD/2
V
VDD/2 (VDD/2)-1
2.0
V
V
0.8
2.4
V
V
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Parameter
CLOCK SYNTHESIZER
Symbol
Conditions
Min.
Typ.
Max.
Units
0.4
V
Output Low Voltage
VOL
IOL = 12 mA
Output High Voltage, CMOS level
VOH
IOH = -4 mA
Operating Supply Current
IDD
No load
VDD = 3.3 V
25
mA
CLK output
+50
mA
S0, S1 pins
5
pF
20
Ω
Short Circuit Current
Input Capacitance
CIN
VDD-0.4
Nominal Output Impedance
Frequency Synthesis Error
Internal Pull-up Resistor
V
All Clocks
RPUP
0
S1, S0 pins
500
ppm
kΩ
Note 1: CMOS level input. Nominal trigger point is VDD/2 for 3.3 V or 5 V operation.
AC Electrical Characteristics
VDD = 3.3 V ±5%, Ambient Temperature -40 to +85° C, unless stated otherwise
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Input Crystal or Clock Frequency
FIN
Output Clock Rise Time
tOR
0.8 to 2.0 V, Note 1
1.5
ns
Output Clock Fall Time
tOF
2.0 to 8.0 V, Note 1
1.5
ns
Clock Stabilization Time after
Power-up
10
ms
Changing Frequency Setting
10
ms
60
%
Output Clock Duty Cycle
Maximum Absolute Jitter, short
term
27
Units
at VDD/2, Note 1
tja
40
Deviation from
mean
MHz
±190
ps
Note 1: Measured with 15 pF load.
Thermal Characteristics
Parameter
Thermal Resistance Junction to
Ambient
Thermal Resistance Junction to Case
IDT™ PLL AUDIO CLOCK SYNTHESIZER
Symbol
Conditions
Min.
Typ.
Max. Units
θJA
Still air
150
° C/W
θJA
1 m/s air flow
140
° C/W
θJA
3 m/s air flow
120
° C/W
40
° C/W
θJC
4
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PLL AUDIO CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
Marking Diagram - MK2703S
µCLOCK
MK2703S
YYWW
Marking Diagram - MK2703SI
MK2703I
######
YYWW$$
Bottom Marking:
Line 1: ######
Line 2 & 3: Origin
Marking Diagram - MK2703SLF
µCLOCK
MK2703SL
YYWW
Bottom Marking:
Origin
Marking Diagram - MK2703SILF
MK2703IL
######
YYWW$$
Bottom Marking:
Line 1: ######
Line 2 & 3: Origin
Bottom Marking:
Origin
Notes:
1. ###### is the lot number.
2. YYWW is the last two digits of the year and the week number that the part was assembled.
3. Bottom mark denotes country of origin.
IDT™ PLL AUDIO CLOCK SYNTHESIZER
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CLOCK SYNTHESIZER
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
8
Millimeters
Symbol
E
A
A1
B
C
D
E
e
H
h
L
α
H
INDEX
AREA
1 2
D
A
Min
Max
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
4.80
5.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
0°
8°
Inches
Min
Max
.0532
.0688
.0040
.0098
.013
.020
.0075
.0098
.1890
.1968
.1497
.1574
0.050 BASIC
.2284
.2440
.010
.020
.016
.050
0°
8°
h x 45
A1
C
-Ce
B
SEATING
PLANE
L
.10 (.004)
C
Ordering Information
Part / Order Number
MK2703S*
MK2703STR*
MK2703SLF
MK2703SLFTR
MK2703SI*
MK2703SITR*
MK2703SILF
MK2703SILFTR
Marking
see page 5
see page 5
see page 5
see page 5
Shipping Packaging
Package
Temperature
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
0 to +70° C
0 to +70° C
0 to +70° C
0 to +70° C
-40 to +85° C
-40 to +85° C
-40 to +85° C
-40 to +85° C
*NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01
“LF” denotes Pb (lead) free package.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes
no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No
other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications
such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT
does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
IDT™ PLL AUDIO CLOCK SYNTHESIZER
6
MK2703
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PLL AUDIO CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
Innovate with IDT and accelerate your future networks. Contact:
www.IDT.com
For Sales
For Tech Support
800-345-7015
408-284-8200
Fax: 408-284-2775
www.idt.com/go/clockhelp
Corporate Headquarters
Integrated Device Technology, Inc.
www.idt.com
© 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device
Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered
trademarks used to identify products or services of their respective owners.
Printed in USA