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MK2771-16RLF

MK2771-16RLF

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    SSOP-28

  • 描述:

    IC CLK SRC VCXO/SET-TOP 28-QSOP

  • 数据手册
  • 价格&库存
MK2771-16RLF 数据手册
DATASHEET MK2771-16 VCXO AND SET-TOP CLOCK SOURCE Description Features The MK2771-16 is a low-cost, low-jitter, high-performance VCXO and clock synthesizer designed for set-top boxes. The on-chip Voltage Controlled Crystal Oscillator accepts a 0 to 3 V input voltage to cause the output clocks to vary by ±100 ppm. Using IDT’s patented VCXO and analog Phase-Locked Loop (PLL) techniques, the device uses an inexpensive 13.5 MHz pullable crystal input to produce multiple output clocks including two selectable processor clocks, a selectable audio clock, two communications clocks, a 13.5 MHz clock, and three 27 MHz clocks. All clocks are frequency locked to the 27 MHz output (and to each other) with zero ppm error, so any output can be used as the VCXO output. • Packaged in 28-pin QSOP • RoHS 5 (green) or RoHS 6 (green and lead free) compliant package • On-chip patented VCXO with pull range of 200 ppm • VCXO tuning voltage of 0 to 3 V • Processor frequencies include 16.66, 20, 25, 32, 40, and • • • • • • 50 MHz Audio clocks support 32 kHz, 44.1 kHz, 48 kHz, and 96 kHz sampling rates Zero ppm synthesis error in all clocks (all exactly track 27 MHz VCXO) Uses an inexpensive 13.5 MHz pullable crystal Full CMOS output swings with 25 mA output drive capability at TTL levels Advanced, low-power, sub-micron CMOS process 5 V operating voltage with 3.3 V capable I/O Block Diagram VDD5 VDDIO 3 ACLK AS2:0 3 PS1, PS0 2 CS1, CS0 2 PCLK PLL Clock Synthesis Circuitry CCLK1 CCLK2 VIN 13.5 MHz pullable crystal X1 X2 Voltage Controlled Crystal Oscillator x2 PLL 3 divide by 2 Optional crystal capacitors. 27.000 MHz 13.500 MHz 6 GND IDT™ VCXO AND SET-TOP CLOCK SOURCE 1 MK2771-16 REV G 051310 MK2771-16 VCXO AND SET-TOP CLOCK SOURCE VCXO AND SYNTHESIZER Pin Assignment Processor Clock Select Table (MHz) PS1 PS0 PCLK 0 0 50 0 1 16.667 M 0 25 GND M 1 32 23 27M 1 0 40 7 22 VDD5 1 1 20 8 21 AS2 CS1 9 20 GND GND 10 19 GND AS2 AS1 AS0 ACLK GND 11 18 27M 0 0 0 8.192 PCLK 12 17 CCLK1 CCLK2 13 16 0 0 1 11.2896 PS1 ACLK 14 15 13.5M 0 1 0 12.288 0 1 1 5.6448 1 0 0 18.432 1 0 1 16.9344 1 1 0 49.152 1 1 1 21.576 PS0 1 28 AS1 X2 2 27 AS0 GND 3 26 CS0 X1 4 25 27M VDD5 5 24 VIN 6 VDDIO VDD5 Audio Clock Table (MHz) 28-pin QSOP Communications Clock Table (MHz) CS1 CS0 CCLK1 CCLK2 0 0 Low 33.333 0 1 Low 24.576 1 0 11.0592 18.432 1 1 11.0592 3.6864 0 = connect directly to ground 1 = connect directly to VDDIO M = leave floating or unconnected IDT™ VCXO AND SET-TOP CLOCK SOURCE 2 MK2771-16 REV G 051310 MK2771-16 VCXO AND SET-TOP CLOCK SOURCE VCXO AND SYNTHESIZER Pin Descriptions Pin Number 1 Pin Name PS0 2 X2 3, 10, 11 4 GND X1 5, 8, 22 6 VDD5 VIN 7 VDDIO 9 CS1 12 13 PCLK CCLK2 14 ACLK 15 16 13.5M PS1 17 CCLK1 18, 23, 25 19, 20, 24 21 27M GND AS2 26 CS0 27 AS0 28 AS1 Pin Type Pin Description Processor clock select 0. Selects PCLK frequency. See table above. Internal pull-up resistor. XO Crystal connection. Connect to a 13.5 MHz fundamental mode pullable crystal. Power Connect to ground. XI Crystal connection. Connect to a 13.5 MHz fundamental mode pullable crystal. Power Connect to +5 V. Input Voltage input to VCXO. Zero to 3 V signal which controls the frequency of the VCXO. Power Connect to +3.3 V or +5 V. Amplitude of inputs and outputs will match this. Input Communications clock select pin 1. Selects CCLK 1 and 2 per table above. Internal pull-up. Output Processor clock output. Determined by status of PS1, PS0. Output Communications clock output 2 determined by status of CS1, CS0 per table above. Output Audio clock output. Determined by status of AS2:0 per table above. Output 13.5 MHz VCXO clock output. Tri-level Input Processor Clock Select 1. Selects PCLK frequency. See table above. Self-biased to M. Output Communications clock output 1 determined by status of CS1, CS0 per table above. Output 27 MHz VCXO clock output. Power Connect to ground. Input Audio clock select 2. Selects ACLK on pin 14. See table above. Internal pull-up resistor. Input Communications clock select pin 0. Selects CCLK 1 and 2 per table above. Internal pull-up. Input Audio clock select 0. Selects ACLK on pin 14. See table above. Internal pull-up resistor. Input Audio clock select 1. Selects ACLK on pin 14. See table above. Internal pull-up resistor. IDT™ VCXO AND SET-TOP CLOCK SOURCE Input 3 MK2771-16 REV G 051310 MK2771-16 VCXO AND SET-TOP CLOCK SOURCE VCXO AND SYNTHESIZER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK2771-16. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD (referenced to GND) 7V Inputs and Clock Outputs (referenced to GND) -0.5 V to VDD+0.5 V Ambient Operating Temperature 0 to +70° C Storage Temperature -65 to +150° C Junction Temperature 125° C Soldering Temperature 260° C DC Electrical Characteristics Unless stated otherwise, VDD = 5 V ±5%, Ambient Temperature 0 to +70° C Parameter Symbol Operating Voltage VDD Operating Voltage VDDIO Conditions All inputs/outputs Min. Typ. Max. Units 4.75 5.25 V 3.00 5.25 V Input High Voltage, X1 pin only VIH Input Low Voltage, X1 pin only VIL Input High Voltage (except PS1) VIH Input Low Voltage (except PS1) VIL Input High Voltage (PS1 only) VIH Input Low Voltage (PS1 only) VIL Output High Voltage VOH IOH = -25 mA 2.4 Output Low Voltage VOL IOL = 25 mA – Output High Voltage, CMOS Level VOH IOH = -8 mA VDD-0.4 Operating Supply Current IDD5 No load, Note 1 42 mA Operating Supply Current IDDIO No load, VDDIO = 3.3 V 19 mA ±100 mA 7 pF 3.5 2.5 1.5 VDD-0.5 Input Capacitance, except X1 CIN Except X1, X2 All clocks VIN, VCXO Control Voltage 0 4 V V 0.5 Each output V V 0.8 IOS IDT™ VCXO AND SET-TOP CLOCK SOURCE V 2 Short Circuit Current Frequency Synthesis Error 2.5 V V – 0.4 V V 0 ppm 3 V MK2771-16 REV G 051310 MK2771-16 VCXO AND SET-TOP CLOCK SOURCE VCXO AND SYNTHESIZER AC Electrical Characteristics Unless stated otherwise, VDD = 5 V±5%, Ambient Temperature 0 to +70° C Parameter Symbol Conditions Min. Crystal Input Frequency Typ. Max. Units 13.5 MHz Output Clock Rise Time tOR 0.8 to 2.0 V 1.5 ns Output Clock Fall Time tOF 2.0 to 0.8 V 1.5 ns Output Clock Duty Cycle tOD At 1.4 V Maximum Absolute Jitter, short term tja 40 0V < VIN < 3 V, Note 3 27 MHz Output Pullability ±100 60 % 300 ps ±140 ppm Note 1: With all clocks at highest frequencies. Note 2: With a pullable crystal that conforms to IDT’s specifications. Pullable Crystal Specifications Frequency 13.500000 MHz Correlation (load) Capacitance 14 pF C0/C1 240 max. ESR 25 Ω max. Operating Temperature 0 to 70°C Initial Accuracy ±20 ppm Temperature plus Aging Stability ±50 ppm External Components The MK2771-16 requires a minimum number of external components for proper operation. Use a low inductance ground plane, connect all GNDs to this. Connect 0.01µF decoupling caps on pins 5, 7, 8 and 22 directly to the ground plane, as close to the MK2771-16 as possible. A series termination resistor of 33Ω may be used for each clock output.The 13.500 MHz crystal must be connected as close to the chip as possible. The crystal should be a parallel mode, pullable, with load capacitance of 14 pF. Consult IDT full specifications. Please obey Application Note MAN05 for pullable crystal layout info except for the following: the MK2771-16 introduces a GND pin (pin #3) between the pullable crystal pins. This ground should be brought in straight from the right side underneath the device. IDT™ VCXO AND SET-TOP CLOCK SOURCE 5 MK2771-16 REV G 051310 MK2771-16 VCXO AND SET-TOP CLOCK SOURCE VCXO AND SYNTHESIZER Package Outline and Package Dimensions (28-pin QSOP) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters 28 Symbol E1 INDEX AREA A A1 A2 b c D E E1 e L α E 1 2 D Min Inches* Max 1.35 1.75 0.10 0.25 -1.50 0.20 0.30 0.18 0.25 9.80 10.00 5.80 6.20 3.80 4.00 0.635 Basic 0.40 1.27 0° 8° Min Max 0.053 0.069 0.004 0.010 -.059 0.008 0.012 0.007 0.010 0.386 0.394 0.228 0.244 0.150 0.157 0.025 Basic 0.016 0.050 0° 8° *For reference only. Controlling dimensions in mm. A A2 A1 c - Ce b SEATING PLANE L aaa C Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature MK2771-16RLF MK2771-16RLF Tubes 28-pin SSOP 0 to +70° C MK2771-16RLFTR MK2771-16RLF Tape and Reel 28-pin SSOP 0 to +70° C "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. IDT™ VCXO AND SET-TOP CLOCK SOURCE 6 MK2771-16 REV G 051310 MK2771-16 VCXO AND SET-TOP CLOCK SOURCE VCXO AND SYNTHESIZER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales For Tech Support 800-345-7015 408-284-8200 Fax: 408-284-2775 www.idt.com/go/clockhelp Corporate Headquarters Integrated Device Technology, Inc. www.idt.com © 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only for development of an application that uses Renesas products. Other reproduction or use of these resources is strictly prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property. Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products. (Rev.1.0 Mar 2020) Corporate Headquarters Contact Information TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku, Tokyo 135-0061, Japan www.renesas.com For further information on a product, technology, the most up-to-date version of a document, or your nearest sales office, please visit: www.renesas.com/contact/ Trademarks Renesas and the Renesas logo are trademarks of Renesas Electronics Corporation. All trademarks and registered trademarks are the property of their respective owners. © 2020 Renesas Electronics Corporation. All rights reserved.
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