Clock Generator for PowerQUICC and PowerPC
Microprocessors and Microcontrollers
MPC9819
DATA SHEET
NRND
The MPC9819 is a PLL-based clock generator specifically designed for Freescale
Microprocessor and Microcontroller applications including the PowerPC and PowerQUICC.
This device generates the microprocessor input clock and other microprocessor system and
bus clocks at any one of four output frequencies. These frequencies include the popular 66and 133-MHz PCI/X bus frequencies. The device offers five low-skew clock outputs plus three
reference outputs. The clock input reference is 25 MHz and may be derived from an external
source or by the addition of a 25-MHz crystal to the on-chip crystal oscillator. The extended
temperature range of the MPC9819 supports telecommunication and networking requirements.
MICROPROCESSOR
CLOCK GENERATOR
Features
•
•
•
•
•
•
•
•
•
•
•
5 LVCMOS outputs for processor and other system circuitry
3 Buffered 25-MHz reference clock outputs
Crystal oscillator or external reference input
25-MHz input reference frequency
Selectable output frequencies include: 66, 100, 125, or 133 MHz
Low cycle-to-cycle and period jitter
Package: 20-lead SSOP
3.3-V supply
Supports computing, networking, and telecommunications applications
Ambient temperature range: –40°C to +85°C
NOT RECOMMENDED FOR NEW DESIGNS
Functional Description
SD SUFFIX
20 SSOP PACKAGE
CASE 1461-02
EN SUFFIX
20 SSOP PACKAGE
Pb-FREE PACKAGE
CASE 1461-02
The MPC9819 uses a PLL with a 25-MHz input reference frequency to generate a single
bank of five configurable LVCMOS output clocks. The output frequency of this bank is
configurable to either 66, 100, 125, or 133 MHz by two FSEL pins. The 25-MHz reference may
be either an external frequency source or a 25-MHz crystal. The 25-MHz crystal is directly connected to the XTAL_IN and XTAL_OUT pins with
no additional components required. An external reference may be applied to the XTAL_IN pin with the XTAL_OUT pin left floating. The input
reference, whether provided by a crystal or an external input, is also directly buffered to a second bank of three LVCMOS outputs. These outputs
may be used as the clock source for processor I/O applications such as an Ethernet PHY.
The MPC9819 is packaged in a 20-lead SSOP package.
MPC9819 REVISION 4 AUGUST 16, 2012
1
©2009 Integrated Device Technology, Inc.
MPC9819 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
QA0
XTAL_IN
Ref
OSC
XTAL_OUT
QA1
PLL
400 or 500 MHz
66,100,125,133
MHz
QA2
QA3
FSEL0
QA4
Data
Generator
FSEL1
25 MHz
QREF0
QREF1
QREF2
MR/OE
Figure 1. MPC9819 Logic Diagram
Table 1. Pin Configurations
I/O
Type
QA0, QA1, QA2, QA3, QA4
Pin
Output
LVCMOS
Clock Outputs
QREF0, QREF1, QREF2
Output
LVCMOS
Reference Output (25 MHz)
Input
LVCMOS
Crystal Oscillator Input Pin
XTAL_IN
XTAL_OUT
Function
Output
LVCMOS
Crystal Oscillator Output Pin
FSEL0, FSEL1
Input
LVCMOS
Configures Bank A Clock Output Frequency (pull-up)
MR/OE
Input
LVCMOS
Enables All Outputs (pull-down)
VDD
—
—
3.3-V Supply
GND
—
—
Ground
Table 2. Function Table
Control
FSEL0, FSEL1
Default
00
01
10
11
11
66 MHz
125 MHz
100 MHz
133 MHz
MPC9819 REVISION 4 AUGUST 16, 2012
2
©2009 Integrated Device Technology, Inc.
MPC9819 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
XTAL_IN
1
20
VDD
XTAL_OUT
2
19
QA4
FSEL0
3
18
QA3
VDD
4
17
GND
FSEL1
5
16
QA2
QREF2
6
15
QA1
GND
7
14
VDD
QREF1
8
13
QA0
QREF0
9
12
MR/OE
10
11
GND
VDD
Figure 2. MPC9819 20-Lead SSOP Package Pinout (Top View)
MPC9819 OPERATION
Crystal Oscillator
The MPC9819 features a fully integrated Pierce oscillator to
minimize system implementation costs. Other than the addition of a
25-MHz crystal, no external components are required.The crystal
selection should be: 25 MHz, parallel resonant type with a load
specification of CL = 10 pF. Crystals with a load specification of CL =
20 pF may be used, however, the reference frequency may be
higher than the specified 25 MHz. Externally supplied capacitors on
both the XTAL_IN and XTAL_OUT pins may be used to trim the
frequency as desired.
The crystal should be located as close to the MPC9819 XTAL_IN
and XTAL_OUT pins as possible to avoid any board level parasitic.
Table 3. Crystal Specifications
Parameter
Value
Crystal Cut
Fundamental AT Cut
Resonance
Parallel Resonance
Shunt Capacitance (CO)
5–7 pF
Load Capacitance (CL)
10 pF
Equivalent Series Resistance (ESR)
20–60
External Clock Source
An external reference source of 25 MHz may be applied to the
XTAL_IN pin. In this mode of operation, the XTAL_OUT pin should
be left floating.
Power Supply Bypassing
The MPC9819 should have all VDD pins bypassed with
0.01 capacitors and a minimum of one 1.0 capacitor for the overall
package. All capacitors should be located as close to the SSOP pins
as possible.
MPC9819 REVISION 4 AUGUST 16, 2012
3
©2009 Integrated Device Technology, Inc.
MPC9819 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Table 4. Absolute Maximum Ratings(1)
Symbol
VDD
IIN
IOUT
TS
Characteristics
Supply Voltage
DC Input Current
DC Output Current
Storage Temperature
Min
Max
Unit
–0.3
3.8
V
—
±20
mA
—
±75
mA
–65
125
°C
Condition
1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated
conditions is not implied.
Table 5. General Specifications
Symbol
Characteristics
Min
Typ
Max
Unit
VTT
Output Termination Voltage
—
VDD ÷ 2
—
V
MM
ESD Protection (machine model)
200
—
—
V
HBM
ESD Protection (human body model)
2000
—
—
V
LU
Latch-Up Immunity
200
—
—
mA
CIN
Input Capacitance
—
4
—
pF
Cpd
Power Dissipation Capacitance
—
8.5
—
pF
JA
Thermal Resistance (junction-to-ambient)
—
80.8
—
°C/W
TC
Ambient Temperature
85
°C
–40
Condition
Inputs
Table 6. DC Characteristics (VDD = 3.3 V ± 5%, TA = –40° to +85°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
VIH
Input High Voltage (XTAL_IN)
2.4
—
VDD + 0.3
V
VIH
Input High Voltage
2.0
—
VDD + 0.3
V
VIL
Input Low Voltage
—
—
0.8
V
LVCMOS
IIN
Input Current(1)
—
—
150
A
VIN = VDDL or GND
VOH
Output High Voltage
2.4
—
—
V
IOH = –12 mA
VOL
Output Low Voltage
—
—
0.4
V
IOL = 12 mA
ZOUT
Output Impedance
—
14
—
—
—
23
32
40
50
mA
—
14
—
mA
IDD
IDDBASE
Maximum Supply Current
fA = 66 MHz
fA = 133 MHz
Base Supply Current(2)
(for dynamic power dissipation calculation)
Input threshold = VDD/2
25 MHz reference
frequency
1. Inputs have pull-down resistors affecting the input current.
2. PD = (VDD * IDDBASE) + 5 (VDD2) * Cpd * fA.
MPC9819 REVISION 4 AUGUST 16, 2012
4
©2009 Integrated Device Technology, Inc.
MPC9819 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Table 7. AC Characteristics(1) (2) (VDD = 3.3 V ± 5%, TA = –40° to +85°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
Input and Output Timing Specification
fref
Input Reference Frequency
fVCO
VCO Frequency Range
fMCX
Output Frequency (QAx)
25 MHz Input
XTAL Input
25
25
MHz
MHz
FSEL0, FSEL1 = 00,01,11
FSEL0, FSEL1 = 10
400
500
MHz
MHz
66.66
100
125
133.33
25
—
—
—
—
—
MHz
MHz
MHz
MHz
MHz
PLL locked
10
—
—
ns
@ 25 MHz
45
50
55
%
—
—
100
0
ppm
ppm
FSEL0, FSEL1 = 00
FSEL0, FSEL1 = 10
FSEL0, FSEL1 = 01
FSEL0, FSEL1 = 11
Output Frequency (QREFx)
frefPW
Reference Input Pulse Width
DC
Output Duty Cycle
fout
Output Frequency Accuracy
Crystal(3)
External Reference
With recommended crystal
see Table 3
PLL Specifications
BW
tLOCK
PLL Closed Loop Bandwidth(4)
500
Maximum PLL Lock Time
kHz
10
ms
Skew and Jitter Specifications
Output-to-Output Skew (within a bank)
75
ps
tJIT(CC)
Cycle-to-Cycle Jitter
150
ps
@ 25 MHz Input Reference
QA output
tJIT(PER)
Period Jitter
100
ps
@ 25 MHz Input Reference
QA output
1
ns
20% to 80%
tsk(O)
tr, tf
1.
2.
3.
4.
Output Rise/Fall Time
AC characteristics are design targets and pending characterization.
AC characteristics apply for parallel output termination of 50 to VTT.
Based upon recommended crystal specifications as outlined in operation section.
–3 dB point of PLL transfer characteristics.
Pulse
Generator
Z = 50
Z = 50
Z = 50
RT = 50
DUT MPC9819
RT = 50
VTT
VTT
Figure 3. MPC9819 AC Test Reference (LVCMOS Outputs)
MPC9819 REVISION 4 AUGUST 16, 2012
5
©2009 Integrated Device Technology, Inc.
MPC9819 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Table 8. MPC9819 Pin List
Pin
MPC9819 REVISION 4 AUGUST 16, 2012
Description
Pin
Description
1
XTAL_IN
11
GND
2
XTAL_OUT
12
MR/OE
3
FSEL0
13
QA0
4
VDD
14
VDD
5
FSEL1
15
QA1
6
QREF2
16
QA2
7
GND
17
GND
8
QREF1
18
QA3
9
QREF0
19
QA4
10
VDD
20
VDD
6
©2009 Integrated Device Technology, Inc.
MPC9819 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
PACKAGE DIMENSIONS
PAGE 1 OF 3
CASE 1461-02
ISSUE A
20 SSOP PACKAGE
MPC9819 REVISION 4 AUGUST 16, 2012
7
©2009 Integrated Device Technology, Inc.
MPC9819 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
PACKAGE DIMENSIONS
PAGE 2 OF 3
CASE 1461-02
ISSUE A
20 SSOP PACKAGE
MPC9819 REVISION 4 AUGUST 16, 2012
8
©2009 Integrated Device Technology, Inc.
MPC9819 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
PACKAGE DIMENSIONS
PAGE 3 OF 3
CASE 1461-02
ISSUE A
20 SSOP PACKAGE
MPC9819 REVISION 4 AUGUST 16, 2012
9
©2009 Integrated Device Technology, Inc.
MPC9819 Data Sheet
6024 Silver Creek Valley Road
San Jose, California 95138
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Sales
800-345-7015 (inside USA)
+408-284-8200 (outside USA)
Fax: 408-284-2775
www.IDT.com/go/contactIDT
Technical Support
netcom@idt.com
+480-763-2056
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document,
including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined in the independent state and are not
guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the
suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any
license under intellectual property rights of IDT or any third parties.
IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT
product in such a manner does so at their own risk, absent an express, written agreement by IDT.
Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third
party owners.
Copyright 2009. All rights reserved.