Clock Generator for PowerQUICC and PowerPC
Microprocessors and Microcontrollers
DATASHEET
PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES SEPTEMBER 7, 2016
The MPC9824 is a PLL based clock generator specifically designed for
Freescale Microprocessor and Microcontroller applications including the
PowerPC and PowerQUICC. This device generates the microprocessor input
clock and other microprocessor system and bus clocks at any one of eight output
frequencies. These frequencies include 33, 50, 66, 100, 125, 133.33, 166.66 and
200 MHz. The device offers six low skew clock outputs plus the three reference
outputs. The clock input reference is 25 MHz and may be derived from an
external source of by the addition of a 25 MHz crystal to the on-chip crystal
oscillator. The extended temperature range of the MPC9824 supports
telecommunication and networking requirements.
MPC9824
MPC9824
MICROPROCESSOR
CLOCK GENERATOR
Features
•
•
•
•
•
•
•
•
•
•
•
6 LVCMOS outputs for processor and other system circuitry
3 Buffered 25 MHz reference clock outputs
Crystal oscillator or external reference input
25 MHz Input reference frequency
Selectable output frequencies = 33.33, 50, 66.66, 100, 125, 133.33, 166.66,
or 200 MHz
Low cycle-to-cycle and period jitter
Package = 32 lead LQFP
3.3 V supply
Supports computing, networking, telecommunications applications
Ambient temperature range -40°C to +85°C
For functional replacement use 8T49N285A
FA SUFFIX
32-LEAD LQFP PACKAGE
CASE 873A-04
AC SUFFIX
32-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 873A-04
Functional Description
The MPC9824 uses a PLL with a 25 MHz input reference frequency to generate a single bank of 6 configurable LVCMOS
output clocks. The output frequency of this bank is configurable by three FSEL pins. The 25 MHz reference may be either an
external frequency source or a 25 MHz crystal. The 25 MHz crystal is directly connected to the XTAL_IN and XTAL_OUT pins
with no additional components required. An external reference may be applied to the XTAL_IN pin with the XTAL_OUT pin left
floating. The input reference, whether provided by a crystal or an external input is also directly buffered to a second bank of
3 LVCMOS outputs. These outputs may be used as the clock source for processor I/O applications such as an Ethernet PHY.
The MPC9824 is packaged in a 32 lead LQFP package.
MPC9824 REVISION 2 3/16/16
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©2016 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
QA0
BYPASS
QA1
SEL_XTAL
0
XTAL_IN
OSC
1
XTAL_OUT
1
Ref
125,133.33,166.66,
200, 33.33, 50,
QA2
66.66,100 MHz
0
REF_IN
QA3
PLL
400 MHz
or
500 MHz
QA4
QA5
FSEL0
FSEL1
FSEL2
Data
Generator
QREF0
25 MHz
QREF1
QREF2
MR/OE
Figure 1. MPC9824 Logic Diagram
Table 1. Pin configuration
I/O
Type
QA0, QA1, QA2
QA3, QA4, QA5
Pin
Output
LVCMOS
Clock Outputs
QREF0, QREF1,
QREF2
Output
LVCMOS
Reference Output (25 MHz)
Input
LVCMOS
Crystal Oscillator Input Pin
XTAL_IN
XTAL_OUT
Function
Output
LVCMOS
Crystal Oscillator Output Pin
REF_IN
Input
LVCMOS
External Reference Input (internal pull-down)
SEL_XTAL
Input
LVCMOS
Selects between XTAL or External Source (internal pull-up)
FSEL0
FSEL1
FSEL2
Input
LVCMOS
Configures Bank A Clock Output Frequency (internal pull-up)
BYPASS
Input
LVCMOS
Test Mode to Bypass PLL (active low, internal pull-up)
MR/OE
Input
LVCMOS
Master Reset (internal pull-down)
Analog Supply, An external filter is recommended
VDDA
VDD
—
—
3.3 V Supply
GND
—
—
Ground
MPC9824 REVISION 2 3/16/16
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©2016 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Table 2. FSEL Function Table
FSEL0
FSEL1
FSEL2
VCO
Frequency
Output
Frequency
0
0
0
400
33.33 MHz
0
0
1
400
66.66 MHz
0
1
0
400
50 MHz
0
1
1
400
100 MHz
1
0
0
500
125 MHz
1
0
1
500
166.66 MHz
1
1
0
400
133.33 MHz
1
1
1
400
200 MHz
Table 3. Function Table
Crystal Input
BYPASS
PLL Bypassed
Normal Operation
MR/OE
Normal
Reset
20
19
QA4
26
15
QREF2
GND
27
14
GND
QA3
28
13
QREF1
NC
21
GND
24 23
25
22
QA5
VDD
FSEL2
External Reference
VDD
SEL_XTAL
FSEL1
1
GND
0
FSEL0
Control
18 17
16
VDD
MPC9824
QA2
29
12
VDD
VDD
30
11
QREF0
QA1
31
10
GND
QA0
32
SEL_XTAL
XTAL_IN
6
7
8
VDDA
REF_IN
5
BYPASS
4
MR/OE
3
XTAL_OUT
2
GND
9
1
NC
Figure 2. MPC9824 32-Lead LQFP Package Pinout (Top View)
MPC9824 REVISION 2 3/16/16
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©2016 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
MPC9824 OPERATION
Crystal Oscillator
The MPC9824 features a fully integrated Pierce oscillator
to minimize system implementation costs. The MPC9824
may be operated with a 25 MHz crystal without other components. For operation without external components, the crystal
selection should be of a 25 MHz parallel resonant type with a
load specification of CL = 10 pF. See Table 4 for complete
crystal specifications.
If more precise frequency control is desired, the addition of
capacitors from each of the XTAL_IN and XTAL_OUT pins to
ground may be used to trim the frequency as shown in Figure
3. In this case the recommended crystal should have a CL =
18 pF.
In either case the crystal should be located as close to the
MPC9824 XTAL_IN and XTAL_OUT pins as possible to
minimize any board level parasitic capacitance.
Table 4. Crystal Specifications
Parameter
Value
Value (with trim caps)
Crystal Cut
Fundamental AT Cut
Fundamental AT Cut
Resonance
Parallel Resonance
Parallel Resonance
Shunt Capacitance (CO)
5–7 pF
5–7 pF
Load Capacitance (CL)
18 pF
18 pF
Equivalent Series Resistance (ESR)
20–50
20–50
Figure 3 Crystal with Trim Caps
*NOTE: These are recommended values and are subject to change due to specific crystal paramter and board layout. Refer to
ICS Application Notes for futher information on the crystal selection.
Power-Supply Bypassing
The MPC9824 should have all VDD pins bypassed with
0.01 µF capacitors and a minimum of one 1.0 µF capacitor for
the overall package. All capacitors should be located as close
to the package as possible.
An external RC filter from VDD to VDDA is recommended as
shown in Figure 4.
VDD
RF = 10-15
CF = 22 F
VDDA
C2
MPC9824
VDD
C1, C2 = 0.01...0.1 F
C1
Figure 4. Power Supply Filter
MPC9824 REVISION 2 3/16/16
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©2016 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Table 5. Absolute Maximum Ratings(1)
Symbol
VDD
IIN
IOUT
TS
Characteristics
Supply Voltage
Min
Max
Unit
–0.3
3.8
V
±20
mA
±75
mA
125
°C
DC Input Current
DC Output Current
Storage Temperature
–65
Condition
1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated
conditions is not implied.
Table 6. General Specifications
Symbol
Characteristics
Min
Typ
Max
Unit
VDD ÷ 2
VTT
Output Termination Voltage
MM
ESD Protection (Machine model)
200
V
HBM
ESD Protection (Human body model)
2000
V
LU
Latch-Up Immunity
200
mA
CIN
Input Capacitance
TC
Ambient Temperature
CPD
V
4
pF
–40
85
Power Dissipation Capacitance
Condition
°C
10
pF
RPU, RPD Pull-up/Pull-down Resistance
Inputs
75
Per output
K
Table 7. DC Characteristics (VDD = 3.3 V ± 5%, TA = –40°C to +85°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
VIH
Input High Voltage (xtal_in)
2.4
VDD + 0.3
V
VIH
Input High Voltage
2.0
VDD + 0.3
V
VIL
Input Low Voltage
0.8
V
LVCMOS
±150
A
VIN = VDD or GND
V
IOH = –12 mA
0.4
V
IOL = 12 mA
IIN
Input Current
(1)
VOH
Output High Voltage
VOL
Output Low Voltage
ZOUT
Output Impedance
2.4
Input threshold = VDD/2
14
IDD
Maximum Quiescent Supply Current
3.5
mA
VDD pins, output not
loaded
IDDA
Maximum Quiescent Supply Current
6.5
mA
VDDA pins, output not
loaded
1. Inputs have pull-down or pull-down resistors affecting the input current.
MPC9824 REVISION 2 3/16/16
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©2016 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Table 8. AC Characteristics (VDD = 3.3 V ± 5%, TA = –40°C to +85°C) (1)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
Input and Output Timing Specification
fref
fVCO
fMCX
Input Reference Frequency (25 MHz input)
XTAL Input
25
25
MHz
MHz
MHz
VCO Frequency Range
FSEL0, FSEL1, FSEL2 = 000,001,
010,011,110,111
FSEL0, FSEL1, FSEL2 = 100,101
400
500
Output Frequency (QAx)
FSEL0, FSEL1, FSEL2 = 000
FSEL0, FSEL1, FSEL2 = 001
FSEL0, FSEL1, FSEL2 = 010
FSEL0, FSEL1, FSEL2 = 011
FSEL0, FSEL1, FSEL2 = 100
FSEL0, FSEL1, FSEL2 = 101
FSEL0, FSEL1, FSEL2 = 110
FSEL0, FSEL1, FSEL2 = 111
Output Frequency (QREFx)
33.33
66.66
50
100
125
166.66
133.33
200
25
DC
Output Duty Cycle
fout
Output Frequency Accuracy
PLL locked
45
Crystal(2)
External Reference
50
0
MHz
55
%
100
0
ppm
ppm
PLL Specifications
BW
PLL Closed Loop Bandwidth(3)
500
kHz
10
ms
Output-to-Output Skew
100
ps
within bank
tJIT(CC)
Cycle-to-Cycle Jitter
100
ps
QA output
tJIT(PER)
Period Jitter
75
ps
QA output
tLOCK
Maximum PLL Lock Time
Skew and Jitter Specifications
tsk(O)
tJIT(Ø)
I/O Phase Jitter, RMS
30
ps
tr, tf
Output Rise/Fall Time
750
ps
20% to 80%
tJIT
Phase Noise Jitter, RMS; 25MHz,
Integration Range: 1.875MHz - 20MHz
2.5
ps
QREF pin
1. AC characteristics apply for parallel output termination of 50 to VTT.
2. Based upon recommended crystal specifications and tune-in capacitors as outlined in operation section..
3. dB point of PLL transfer characteristics.
Pulse
Generator
Z = 50
Z = 50
Z = 50
RT = 50
DUT MPC9824
RT = 50
VTT
VTT
Figure 5. MPC9824 AC Test Reference (LVCMOS Outputs)
MPC9824 REVISION 2 3/16/16
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©2016 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
RELIABILITY INFORMATION
Table 9. JA vs. Air Flow Table for 32 Lead LQFP
JA BY VELOCITY (LINEAR FEET PER MINUTE)
67.8°C/W
47.9°C/W
0
55.9°C/W
42.1°C/W
200
50.1°C/W
39.4°C/W
500
Single-Laye PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
MPC9824 REVISION 2 3/16/16
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©2016 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
PACKAGE DIMENSIONS
PAGE 2 OF 3
CASE 873A-04
ISSUE C
32-LEAD LQFP PACKAGE
MPC9824 REVISION 2 3/16/16
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©2016 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
PACKAGE DIMENSIONS
PAGE 3 OF 3
CASE 873A-04
ISSUE C
32-LEAD LQFP PACKAGE
MPC9824 REVISION 2 3/16/16
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©2016 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
PACKAGE DIMENSIONS
PAGE 1 OF 3
CASE 873A-04
ISSUE C
32-LEAD LQFP PACKAGE
MPC9824 REVISION 2 3/16/16
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©2016 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Revision History Sheet
Rev
Table
Page
Description of Change
Date
2
1
NRND – Not Recommend for New Designs
2
1
Removed NRND.
5/5/15
1
Product Discontinuation Notice - Last time buy expires September 7, 2016.
PDN N-16-02
3/16/16
2
MPC9824 REVISION 2 3/16/16
11
2/15/2013
©2016 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
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