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R1LV1616RBG-7S

R1LV1616RBG-7S

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

  • 描述:

    R1LV1616RBG-7S - 16Mb Advanced LPSRAM (1M wordx16bit / 2M wordx8bit) - Renesas Technology Corp

  • 数据手册
  • 价格&库存
R1LV1616RBG-7S 数据手册
R1LV1616R Series 16Mb Advanced LPSRAM (1M wordx16bit / 2M wordx8bit) REJ03C0101-0400Z Rev.4.00 2007.09.12 Description The R1LV1616R Series is a family of low voltage 16-Mbit static RAMs organized as 1048576-words by 16-bit, fabricated by Renesas's high-performance 0.15um CMOS and TFT technologies. The R1LV1616R Series is suitable for memory applications where a simple interfacing , battery operating and battery backup are the important design objectives. The R1LV1616R Series is packaged in a 52pin micro thin small outline mount device[µTSOP / 10.79mm x 10.49mm with the pin-pitch of 0.4mm], a 48pin thin small outline mount device[TSOP / 12mm x 20mm with the pinpitch of 0.5mm] or a 48balls fine pitch ball grid array [f-BGA / 7.5mmx8.5mm with the ball-pitch of 0.75mm and 6x8 array] . It gives the best solution for a compaction of mounting area as well as flexibility of wiring pattern of printed circuit boards. Features • Single 2.7-3.6V power supply • Small stand-by current:2µA (3.0V, typ.) • Data retention supply voltage =2.0V • No clocks, No refresh • All inputs and outputs are TTL compatible • Easy memory expansion by CS1#, CS2, LB# and UB# • Common Data I/O • Three-state outputs: OR-tie capability • OE# prevents data contention on the I/O bus • Process technology: 0.15um CMOS REJ03C0101-0400Z Rev.4.00 2007.09.12 page 1 of 15 R1LV1616R Series Ordering Information Type No. R1LV1616RSD-5S% R1LV1616RSD-7S% R1LV1616RSD-8S% R1LV1616RBG-5S% R1LV1616RBG-7S% R1LV1616RBG-8S% R1LV1616RSA-5S% R1LV1616RSA-7S% R1LV1616RSA-8S% Access time 55 ns (Note0) 70 ns 85 ns 55 ns (Note0) 70 ns 85 ns 55 ns (Note0) 70 ns 85 ns Package 350-mil 52-pin plastic µ - TSOP(II) (normal-bend type) (52PTG) 7.5mmx8.5mm f-BGA 0.75mm pitch 48ball 12mm x 20mm plastic TSOP(I) (normal-bend type) (48P3R) Note0. 55ns parts can be supported under the condition of the input timing limitation toward SRAM on customer’s system. Please contact our sales office in your region, in case of the inquiry for 55ns parts. % - Temperature version; see table below % R I Temperature Range 0 ~ +70 ºC -40 ~ +85 ºC REJ03C0101-0400Z Rev.4.00 2007.09.12 page 2 of 15 R1LV1616R Series Pin Arrangement 52-pin µTSOP A15 A14 A13 A12 A11 A10 A9 A8 A19 CS1# WE# NC NC Vcc CS2 NC NC A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 A16 BYTE# UB# Vss LB# DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 NC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE# Vss NC A0 48-pin fBGA 1 A B C D E F G H LB# 2 OE# 3 A0 A3 A5 A17 Vss or NC 4 A1 A4 A6 A7 A16 A15 A13 A10 5 A2 CS1# 6 CS2 DQ0 DQ15 UB# DQ13 DQ14 DQ1 DQ2 Vss Vcc DQ10 DQ12 DQ3 Vcc Vss DQ5 DQ11 DQ4 DQ9 A19 A8 A14 A12 A9 DQ6 DQ8 WE# A11 DQ7 A18 N.C. 48-pin TSOP A15 A14 A13 A12 A11 A10 A9 A8 A19 NC WE# CS2 NC UB# LB# A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE# Vss DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 Vcc DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE# Vss CS1# A0 REJ03C0101-0400Z Rev.4.00 2007.09.12 page 3 of 15 R1LV1616R Series Pin Description Pin name A0 to A19 DQ 0 to DQ15 CS1# &CS2 WE# OE# LB# UB# Vcc Vss BYTE# NC Function Address input Data input/output Chip select Write enable Output enable Lower byte select Upper byte select Power supply Ground Byte (x8 mode) enable input Non connection Block Diagram SENSE Amp. DQ0 DATA SELECTOR OUTPUT BUFFER ADDRESS BUFFER A0 Memory Array DECODER SENSE Amp. A19 CS2 CS1# LB# UB# BYTE# WE# OE# OUTPUT BUFFER 1048576 Words x 16BITS OR 2097152 Words x 8BITS CLOCK GENERATOR DQ7 DQ8 DQ15 / A-1 DATA SELECTOR DATA INPUT BUFFER Vcc Vss Note. BYTE# pin supported by only TSOP and uTSOP types. REJ03C0101-0400Z Rev.4.00 2007.09.12 page 4 of 15 DATA INPUT BUFFER x8/x16 SWITCHING CIRCUIT R1LV1616R Series Operating Table CS1# H X X L L L L L L L L L CS2 X L X H H H H H H H H H BYTE# X X H H H X H H H H L L LB# X X H L L X H H L L L L UB# X X H H H X L L L L L L WE# X X X L H H L H L H L H OE# X X X X L H X L X L X L DQ0-7 High-Z High-Z High-Z Din Dout High-Z High-Z High-Z Din Dout Din Dout DQ8-14 High-Z High-Z High-Z High-Z High-Z High-Z Din Dout Din Dout High-Z High-Z DQ15 High-Z High-Z High-Z High-Z High-Z High-Z Din Dout Din Dout A-1 A-1 Operation Stand by Stand by Stand by Write in lower byte Read from lower byte Output disable Write in upper byte Read from upper byte Write Read Write Read Note 1. H:VIH L:VIL X: VIH or VIL 2. BYTE# pin supported by only TSOP and uTSOP types. When apply BYTE# =“L” , please assign LB#=UB#=“L”. Absolute Maximum Ratings Parameter Power supply voltage relative to Vss Terminal voltage on any pin relation toVss Power dissipation Operation temperature Storage temperature Storage temperature range under bias Symbol Vcc VT PT R ver. Topr I ver. Tstg R ver. Tbias I ver. Value -0.5 to +4.6 -0.5*1 to Vcc+0.3*2 0.7 0 to +70 -40 to +85 -65 to +150 0 to +70 -40 to +85 Unit V V W ºC ºC ºC ºC ºC Note 1. -2.0V in case of AC (Pulse width ≤ 30ns) 2. Maximum voltage is +4.6V REJ03C0101-0400Z Rev.4.00 2007.09.12 page 5 of 15 R1LV1616R Series Recommended Operating Conditions Parameter Supply voltage Input high voltage Input low voltage Ambient temperature range R ver. I ver. Symbol Vcc Vss VIH VIL Ta Min. 2.7 0 2.4 -0.2 0 -40 Typ. 3.0 0 - Max. 3.6 0 Vcc+0.2 0.4 +70 +85 Unit V V V V ºC ºC Note 1 2 2 Note 1. –2.0V in case of AC (Pulse width ≤ 30ns) 2. Ambient temperature range depends on R/I-version. Please see table on page 2. DC Characteristics Parameter Input leakage current Output leakage current Symbol |ILI| |ILo| Min. - Typ.*1 - Max. 1 1 Unit µA µA Test conditions*2 Vin=Vss to Vcc CS1# =VIH or CS2=VIL or OE# = VIH or WE# =VIL or LB# =UB# =VIH,VI/O=Vss to Vcc Min. cycle, duty =100% I I/O = 0 mA, CS1# =VIL, CS2=VIH Others = VIH / VIL Cycle time = 1 µs, I I/O = 0 mA, CS1#≤ 0.2V, CS2 ≥ VCC-0.2V VIH ≥ VCC-0.2V , VIL ≤ 0.2V, duty=100% CS2=VIL ~+25ºC ~+40ºC ~+70ºC ~+85ºC V in ≥ 0V (1) 0V≤CS2≤0.2V or (2) CS2≥Vcc-0.2V, CS1# ≥Vcc-0.2V or (3)LB# =UB# ≥Vcc-0.2V, CS2≥Vcc-0.2V, CS1# ≤0.2V Average value Icc1 Average operating current - 25 40 mA Icc2 Standby current - 2 5 mA ISB - 0.1 2 4 - 0.3 6 12 25 40 0.4 mA µA µA µA µA V V Standby current ISB1 - Output hige voltage Output Low voltage VOH VOL 2.4 - IOH = -1mA IOL = 2mA Note 1. Typical parameter indicates the value for the center of distribution at 3.0V (Ta= 25ºC), and not 100% tested. 2. BYTE# pin supported by only TSOP and uTSOP types. BYTE# ≥ Vcc-0.2V or BYTE# ≤ 0.2V REJ03C0101-0400Z Rev.4.00 2007.09.12 page 6 of 15 R1LV1616R Series Capacitance (Ta = +25ºC, f =1MHz) Parameter Input capacitance Input / output capacitance Symbol C in C I/O Min. - Typ. - Max. 10 10 Unit pF pF Test conditions V in = 0V V I/O = 0V Note 1 1 Note 1:This parameter is sampled and not 100% tested. AC Characteristics Test Conditions (Vcc=2.7~3.6V, Ta = 0~+70ºC / -40~+85ºC *) • Input pulse levels: VIL= 0.4V,VIH=2.4V • Input rise and fall time : 5ns • Input and output timing reference levels : 1.4V • Output load : See figures (Including scope and jig) 1.4V RL=500Ω DQ CL=30pF Note: Temperature range depends on R/I-version. Please see table on page 2. REJ03C0101-0400Z Rev.4.00 2007.09.12 page 7 of 15 R1LV1616R Series Read Cycle Parameter Read cycle time Address access time Chip select access time Output enable to output valid Output hold from address change LB#,UB# access time Chip select to output in low-Z LB#,UB# enable to low-Z Output enable to output in low-Z Chip deselect to output in high-Z LB#,UB# disable to high-Z Output disable to output in high-Z Symbol R1LV1616R**5S (Note0) Min. Max. 70 55 55 35 55 20 20 20 20 55 10 10 5 5 0 0 0 0 R1LV1616R**7S Min. 70 10 10 5 5 0 0 0 0 Max. 70 70 70 35 70 25 25 25 25 R1LV1616R**8S Min. 85 10 10 5 5 0 0 0 0 Max. 85 85 85 45 85 30 30 30 30 ns ns ns ns ns ns ns ns ns ns ns ns ns ns 2,3 2,3 2,3 1,2,3 1,2,3 1,2,3 1,2,3 Unit Notes tRC tAA tACS1 tACS2 tOE tOH tBA tCLZ tBLZ tOLZ tCHZ1 tCHZ2 tBHZ tOHZ REJ03C0101-0400Z Rev.4.00 2007.09.12 page 8 of 15 R1LV1616R Series Write Cycle Parameter Write cycle time Address valid to end of write Chip selection to end of write Write pulse width LB#,UB# valid to end of write Address setup time Write recovery time Data to write time overlap Data hold from write time Output active from end of write Output disable to output in high-Z Write to output in high-Z Symbol R1LV1616R**5S (Note0) Min. Max. 20 20 55 50 55 40 50 0 0 25 0 5 0 0 R1LV1616R**7S Min. 70 65 65 55 65 0 0 35 0 5 0 0 Max. 25 25 R1LV1616R**8S Min. 85 70 70 60 70 0 0 40 0 5 0 0 Max. 30 30 ns ns ns ns ns ns ns ns ns ns ns ns 2 1,2 1,2 6 7 5 4 Unit Notes tWC tAW tCW tWP tBW tAS tWR tDW tDH tOW tOHZ tWHZ Note0. 55ns parts can be supported under the condition of the input timing limitation toward SRAM on customer’s system. Please contact our sales office in your region, in case of the inquiry for 55ns parts. In case of tAA =70ns, tRC =70ns. 1. tCHZ, tOHZ, tWHZ and tBHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referred to output voltage levels. 2. This parameter is sampled and not 100% tested. 3. AT any given temperature and voltage condition, tHZ max is less than tLZ min both for a given device and form device to device. 4. A write occurs during the overlap of a low CS1#, a high CS2, a low WE# and a low LB# or a low UB#. A write begins at the latest transition among CS1# going low, CS2 going high, WE# going low and LB# going low or UB# going low . A write ends at the earliest transition among CS1# going high, CS2 going low, WE# going high and LB# going high or UB# going high. tWP is measured from the beginning of write to the end of write. 5. tCW is measured from the later of CS1# going low or CS2 going high to end of write. 6. tAS is measured the address valid to the beginning of write. 7. tWR is measured from the earliest of CS1# or WE# going high or CS2 going low to the end of write cycle. REJ03C0101-0400Z Rev.4.00 2007.09.12 page 9 of 15 R1LV1616R Series Byte enable (supported by only 48-pin TSOP and 52-pin µTSOP ) Parameter Byte setup time Byte recovery time Symbol R1LV1616R**-5S Max. Min. 5 5 R1LV1616R**-7S Min. Max. 5 5 R1LV1616R**-8S Min. Max. 5 5 Unit ms ms Notes tBS tBR BYTE# Timing Waveform CS2 CS1# tBS BYTE# tBR REJ03C0101-0400Z Rev.4.00 2007.09.12 page 10 of 15 R1LV1616R Series Timing Waveform Read Cycle tRC A 0~19 (Word Mode) Valid address A -1~19 (Byte Mode) tAA tBA tOH LB#,UB# tBHZ CS1# tACS1 tCHZ1 CS2 tACS2 tCHZ2 tOE OE# WE# = "H" level tOLZ tCLZ tBLZ tOHZ Valid data DQ0~15 (Word Mode) DQ0~7 (Byte Mode) REJ03C0101-0400Z Rev.4.00 2007.09.12 page 11 of 15 R1LV1616R Series Write Cycle (1) (WE# Clock) tWC A 0~19 (Word Mode) A -1~19 (Byte Mode) Valid address tBW tCW tCW tAW tAS tWP tWHZ tOW tDW tDH tWR LB#,UB# CS1# CS2 WE# DQ0~15 (Word Mode) Valid data DQ0~7 (Byte Mode) REJ03C0101-0400Z Rev.4.00 2007.09.12 page 12 of 15 R1LV1616R Series Write Cycle (2) (CS1# ,CS2 Clock, OE#=VIH) tWC A 0~19 (Word Mode) A -1~19 (Byte Mode) Valid address tBW LB#,UB# CS1# tAS CS2 tCW tCW tWP tDW tWR WE# DQ0~15 (Word Mode) tDH DQ0~7 (Byte Mode) Valid data REJ03C0101-0400Z Rev.4.00 2007.09.12 page 13 of 15 R1LV1616R Series Write Cycle (3) ( LB#,UB# Clock, OE#=VIH) A 0~19 (Word Mode) tWC Valid address A -1~19 (Byte Mode) tAS tBW tWR LB#,UB# CS1# tCW tCW CS2 WE# tWP tDW tDH DQ0~15 (Word Mode) DQ0~7 (Byte Mode) Valid data REJ03C0101-0400Z Rev.4.00 2007.09.12 page 14 of 15 R1LV1616R Series Data Retention Characteristics Parameter Symbol MIn. Typ.*1 Max. Unit Test conditions*2,3 V in ≥ 0V (1) 0V ≤ CS2 ≤ 0.2V or (2) CS2 ≥ Vcc-0.2V, CS1# ≥ Vcc-0.2V or (3) LB# =UB# ≥ Vcc-0.2V, CS2 ≥ Vcc-0.2V, CS1# ≤ 0.2V Vcc for data retention VDR 2.0 - 3.6 V Data retention current 2 4 - 6 12 25 40 - µA µA µA µA ns ~+25ºC Vcc=3.0V,Vin≥0V ~+40ºC ~+70ºC ~+85ºC IccDR - (1) 0V ≤ CS2 ≤ 0.2V or (2) CS2 ≥ Vcc-0.2V, CS1# ≥ Vcc-0.2V or (3) LB# =UB# ≥Vcc-0.2V, CS2 ≥ Vcc-0.2V, CS1# ≤ 0.2V Average value Chip deselect to data retention time Operation recovery time tCDR tR 0 5 See retention waveform ms Note 1. Typical parameter of IccDR indicates the value for the center of distribution at Vcc=3.0V and not 100% tested. 2. BYTE# pin supported only by TSOP and uTSOP types. BYTE# ≥ Vcc-0.2V or BYTE# ≤ 0.2V 3. Also CS2 controls address buffer, WE# buffer ,CS1# buffer ,OE# buffer ,LB# ,UB# buffer and Din buffer .If CS2 controls data retention mode,Vin levels (address, WE# ,OE#,CS1#,LB#,UB#,I/O) can be in the high impedance state. If CS1# controls data retention mode, CS2 must be CS2 ≥ Vcc-0.2V or 0V ≤ CS2 ≤ 0.2V. The other input levels (address, WE# ,OE#,CS1#,LB#,UB#,I/O) can be in the high impedance state. Data Retention timing Waveform (1) (LB#,UB# Controlled) Vcc tCDR 2.4V LB# UB# 2.70V tR 2.4V LB# =UB# ≥ Vcc-0.2V Data Retention timing Waveform (2) (CS1# Controlled) Vcc tCDR 2.4V CS1# 2.70V tR 2.4V CS1# ≥ Vcc-0.2V Data Retention timing Waveform (3) (CS2 Controlled) Vcc CS2 tCDR 0.2V 2.70V tR 0.2V 0V ≤ CS2 ≤ 0.2V REJ03C0101-0400Z Rev.4.00 2007.09.12 page 15 of 15 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document. 2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document, including, but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples. 3. You should not use the products or the technology described in this document for the purpose of military applications such as the development of weapons of mass destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws and regulations, and procedures required by such laws and regulations. 4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document, please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com ) 5. Renesas has used reasonable care in compiling the information included in this document, but Renesas assumes no liability whatsoever for any damages incurred as a result of errors or omissions in the information included in this document. 6. When using or otherwise relying on the information in this document, you should evaluate the information in light of the total system before deciding about the applicability of such information to the intended application. Renesas makes no representations, warranties or guaranties regarding the suitability of its products for any particular application and specifically disclaims any liability arising out of the application and use of the information in this document or Renesas products. 7. With the exception of products specified by Renesas as suitable for automobile applications, Renesas products are not designed, manufactured or tested for applications or otherwise in systems the failure or malfunction of which may cause a direct threat to human life or create a risk of human injury or which require especially high quality and reliability such as safety systems, or equipment or systems for transportation and traffic, healthcare, combustion control, aerospace and aeronautics, nuclear power, or undersea communication transmission. If you are considering the use of our products for such purposes, please contact a Renesas sales office beforehand. Renesas shall have no liability for damages arising out of the uses set forth above. 8. Notwithstanding the preceding paragraph, you should not use Renesas products for the purposes listed below: (1) artificial life support devices or systems (2) surgical implantations (3) healthcare intervention (e.g., excision, administration of medication, etc.) (4) any other purposes that pose a direct threat to human life Renesas shall have no liability for damages arising out of the uses set forth in the above and purchasers who elect to use Renesas products in any of the foregoing applications shall indemnify and hold harmless Renesas Technology Corp., its affiliated companies and their officers, directors, and employees against any and all damages arising out of such applications. 9. You should use the products described herein within the range specified by Renesas, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas shall have no liability for malfunctions or damages arising out of the use of Renesas products beyond such specified ranges. 10. Although Renesas endeavors to improve the quality and reliability of its products, IC products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Please be sure to implement safety measures to guard against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other applicable measures. Among others, since the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. 11. In case Renesas products listed in this document are detached from the products to which the Renesas products are attached or affixed, the risk of accident such as swallowing by infants and small children is very high. You should implement safety measures so that Renesas products may not be easily detached from your products. Renesas shall have no liability for damages arising out of such detachment. 12. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written approval from Renesas. 13. Please contact a Renesas sales office if you have any questions regarding the information contained in this document, Renesas semiconductor products, or if you have any other inquiries. RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: (408) 382-7500, Fax: (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: (1628) 585-100, Fax: (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: (21) 5877-1818, Fax: (21) 6887-7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: 2265-6688, Fax: 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: (2) 2715-2888, Fax: (2) 2713-2999 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: 6213-0200, Fax: 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: (2) 796-3115, Fax: (2) 796-2145 http://www.renesas.com Renesas Technology Malaysia Sdn. Bhd Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: 7955-9390, Fax: 7955-9510 © 2007. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .7.0
R1LV1616RBG-7S 价格&库存

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