R2A20112SP

R2A20112SP/DD Critical Conduction Mode Interleaved PFC Control IC REJ03D0904-0200 Preliminary Rev.2.00 Nov 13, 2007 Description The R2A20112 controls a boost converter to provide a active power factor correction. The R2A20112 adopts critical conduction mode for power factor correction and realizes high efficiency and a low switching noise by zero current switching. Interleaving function improve ripple current on input or output capacitor by 180 degrees phase shift. The feedback loop open detection, two mode overvoltage protection, overcurrent protection are built in the R2A20112, and can constitute a power supply system of high reliability with few external parts. Features • Maximum Ratings  Supply voltage Vcc: 24 V  Operating junction temperature Tjopr: –40 to +150°C • Electrical characteristics  VREF output voltage VREF: 5.0 V ± 3%  UVLO operation start voltage VH: 10.5 V ± 0.7 V  UVLO operation shutdown voltage VL: 9.3 V ± 0.5 V  UVLO hysteresis voltage Hysuvl: 1.2 V ± 0.5 V • Functions  Boost converter control with critical conduction mode  Interleaving control  Two mode overvoltage protection Mode1: Dynamic OVP corresponding to a voltage rise by load change Mode2: Static OVP corresponding to overvoltage in stable  Feedback loop open detection  Master and Slave independence overcurrent protection  280 µs restart timer  Package lineup: Pb-free SOP-16/DILP-16 REJ03D0904-0200 Rev.2.00 Nov 13, 2007 Page 1 of 7 R2A20112SP/DD Pin Arrangement ZCD-M ZCD-S NC VREF SGND RT RAMP COMP 1 2 3 4 5 6 7 8 16 VCC 15 GD-M 14 PGND 13 GD-S 12 NC 11 OCP-M 10 OCP-S 9 FB (Top view) Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name ZCD-M ZCD-S N.C. VREF SGND RT RAMP COMP FB OCP-S OCP-M N.C. GD-S PGND GD-M VCC Input/Output Input Input — Output — Input/Output Input/Output Output Input Input Input — Output — Output Input Function Master converter zero current detection input terminal Slave converter zero current detection input terminal Open Reference voltage output terminal Ground for small signal circuit Oscillator frequency setting terminal Ramp waveform setting terminal Error amplifier output terminal Error amplifier input terminal Slave converter overcurrent detection terminal Master converter overcurrent detection terminal Open Slave converter Power MOSFET drive terminal Ground for power stage Master converter Power MOSFET drive terminal Supply voltage terminal REJ03D0904-0200 Rev.2.00 Nov 13, 2007 Page 2 of 7 R2A20112SP/DD Block Diagram VREF: 5 V – + ZCD-M 0.8V ~ 6.4V UVLO ON: 10.5 V OFF: 9.3 V VCC Clamp GD-M PGND Slave Control + OSC OCP COMP1 OCP-S TIMER OCP-M – + Vzcd_lo = 1.5 V 300 mVhys ZCD-S NC VREF SGND 0.8V ~ 6.4V Clamp GD-S NC OCP-M – + Vzcd_lo = 1.5 V 300 mVhys OCP COMP2 OCP-S – + 0.3 V FB 2.5 V 9.1 V OCP-S RT OSC OCP-M A SQ RQ – + GD Disable OVP BLOCK COMP Discharge SQ VCC Iramp RAMP – + 0.92 V Ramp Low 0.2 V detect R A Error Amp – + FB COMP Static OVP FB VFB × 1.09 V/100 mVhys GD Disable FB open detect OVP BLOCK REJ03D0904-0200 Rev.2.00 Nov 13, 2007 Page 3 of 7 – + COMP Discharge Dynamic OVP VFB × 1.05 V – + + – 0.5 V/0.2 Vhys R2A20112SP/DD Absolute Maximum Ratings (Ta = 25°C) Item Supply voltage GD-M Peak current GD-M DC current GD-S Peak current GD-S DC current ZCD terminal current RT terminal current Vref terminal current COMP terminal current Terminal voltage Vref terminal voltage Power dissipation Operating junction temperature Storage temperature Notes: 1. 2. 3. 4. Symbol Vcc Ipk-gdm Idc-gdm Ipk-gds Idc-gds Izcd Irt Iref Icomp Vt-group1 Vt-group2 Vt-ref Pt Tj-opr Tstg Ratings –0.3 to 24 ±200 ±10 ±200 ±10 ±10 –200 –5 ±1 –0.3 to Vcc –0.3 to Vref –0.3 to Vref+0.3 1 –40 to +150 –55 to +150 Unit V mA mA mA mA mA µA mA mA V V V W °C °C Note 3 3 4 5 6 Rated voltages are with reference to the SGND terminal. For rated currents, inflow to the IC is indicated by (+), and outflow by (–). Shows the transient current when driving a capacitive load. This is the rated voltage for the following pins: RAMP, FB 5. This is the rated voltage for the following pins: RT, OCP-M , OCP-S 6. In case of R2A20112DD (DILP): θja = 120°C/W In case of R2A20112SP (SOP): θja = 120°C/W This value is a thing mounting on 40 × 40 × 1.6 [mm], a glass epoxy board of wiring density 10%. Electrical Characteristics (Ta = 25°C, Vcc = 12 V, RT = 22 kΩ, OCP = GND, CRAMP = 680 pF, RZCD-GND = 51 kΩ, FB = COMP) Item Supply UVLO Turn-on threshold UVLO Turn-off threshold UVLO hysteresis Standby current Operating current VREF Output voltage Line regulation Load regulation Temperature stability Symbol Vuvlh Vuvll Hysuvl Istby Icc Vref Vref-line Vref-load dVref Min 9.8 8.8 0.7 — — 4.85 — — — Typ 10.5 9.3 1.2 120 4.9 5.00 5 5 ±80 Max 11.2 9.8 1.7 200 7.0 5.15 20 20 — Unit V V V µA mA V mV mV ppm/°C Isource = –1 mA Isource = –1 mA, Vcc = 10 V to 24 V Isource = –1 mA to –5 mA Ta = –40 to 125°C * 1 Test Conditions Vcc = 8.9 V, ZCD = Open Note: 1. Design spec. REJ03D0904-0200 Rev.2.00 Nov 13, 2007 Page 4 of 7 R2A20112SP/DD Electrical Characteristics (cont.) (Ta = 25°C, Vcc = 12 V, RT = 22 kΩ, OCP = GND, CRAMP = 680 pF, RZCD-GND = 51 kΩ, FB = COMP) Item Error amplifier Feedback voltage Input bias current Open loop gain Upper clamp voltage Low voltage Source current Sink current 1 Sink current 2 Transconductance RAMP RAMP charge current RAMP discharge current Low voltage Ifb Av Vclamp-comp Vl-comp Isrc-comp Isnkcomp1 Isnkcomp2 gm Ic-ramp Id-ramp Vl-ramp Symbol Vfb Min 2.40 –0.5 — 8.0 — — — — 150 130 7 — Typ 2.50 0 60 9.1 0.1 –120 120 300 200 150 16 17 Max 2.60 0.5 — 10.6 0.3 — — — 290 170 29 200 Unit V µA dB V V µA µA µA µs µA mA mV Test Conditions FB-COMP short, RAMP = 0 V Measured pin: FB *1 FB = 2.0 V, COMP: Open FB = 3.0 V, COMP: Open FB = 1.5 V, COMP = 2.5 V *1 FB = 3.5 V, COMP = 2.5 V FB = 2.45 V ↔ 2.55 V, COMP = 2.5 V RAMP = 0 V to 7 V FB = 1 V, COMP = 2 V, RAMP = 0 V to 1.5 V to 1 V FB = 1 V, COMP = 3 V, RAMP = 0 V to 2.5 V to open Isink = 100 µA Zero current detector Upper clamp voltage Lower clamp voltage ZCD low threshold voltage ZCD hysteresis Input bias current Slave control Restart Phase delay On time ratio Restart time delay Vzcdh Vzcdl Vzcd_lo Hyszcd Izcd Phase Ton-ratio Tstart 5.8 0.3 1.05 180 –1 160 –5 210 6.4 0.8 1.50 300 — 180 — 280 7.0 1.3 1.75 390 1 200 5 350 V V V mV µA deg. % µs Isource = –3 mA Isink = 3 mA *1 *1 1.2 V < Vzcd < 5 V *1, *2 *1, *2 Cramp = 3300 pF FB = 2.0 V, COMP = 5 V Note: 1. Design spec. 2. Tperiod (25 µs) Ton-m (12.5 µs) GD-M Tdelay GD-S Ton-s Phase = Tdelay × 360 [deg.] Tperiod Ton-s Ton-m × 100 [%] Ton-ratio = 1 – REJ03D0904-0200 Rev.2.00 Nov 13, 2007 Page 5 of 7 R2A20112SP/DD Electrical Characteristics (cont.) (Ta = 25°C, Vcc = 12 V, RT = 22 kΩ, OCP = GND, CRAMP = 680 pF, RZCD-GND = 51 kΩ, FB = COMP) Item Gate drive Master gate drive rise time Slave gate drive rise time Master gate drive fall time Slave gate drive fall time Master gate drive low voltage Master gate drive high voltage Slave gate drive low voltage Slave gate drive high voltage Over current protection Over voltage protection Dynamic OVP threshold voltage Static OVP threshold voltage Static OVP hysteresis FB open detect threshold voltage FB open detect hysteresis Vdovp Vsovp Hys-sovp Vfbopen Hysfbopen VFB× 1.035 VFB× 1.075 50 0.45 0.16 VFB× 1.050 VFB× 1.090 100 0.50 0.20 VFB× 1.065 VFB× 1.105 150 0.55 0.24 V V mV V V COMP = Open COMP = Open COMP = Open COMP = Open OCP threshold voltage Symbol tr-gdm tr-gds tf-gdm tf-gds Vol1-gdm Vol2-gdm Voh-gdm Vol1-gds Vol2-gds Voh-gds Vocp Min — — — — — — 11.5 — — 11.5 0.27 Typ 30 30 30 30 0.05 0.03 11.9 0.05 0.03 11.9 0.3 Max 100 100 100 100 0.2 0.7 — 0.2 0.7 — 0.33 V V V V Unit ns ns ns ns V Test Conditions CL = 100 pF, Cramp = 3300 pF FB = 2.0 V, COMP = 5 V CL = 100 pF, Cramp = 3300 pF FB = 2.0 V, COMP = 5 V CL = 100 pF, Cramp = 3300 pF FB = 2.0 V, COMP = 5 V CL = 100 pF, Cramp = 3300 pF FB = 2.0 V, COMP = 5 V Isink = 2 mA Isink = 1 mA, VCC = 5 V Isource = –2 mA Isink = 2 mA Isink = 1 mA, VCC = 5 V Isource = –2 mA * 1 Note: 1. Design spec. REJ03D0904-0200 Rev.2.00 Nov 13, 2007 Page 6 of 7 R2A20112SP/DD Package Dimensions JEITA Package Code P-SOP16-5.5x10.06-1.27 RENESAS Code PRSP0016DH-B Previous Code FP-16DAV MASS[Typ.] 0.24g *1 D F 9 16 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. bp HE E Index mark *2 Terminal cross section ( Ni/Pd/Au plating ) 1 Z e *3 8 bp x M L1 Reference Dimension in Millimeters Symbol c θ A1 y L Detail F D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Min Nom Max 10.06 10.5 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15 JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV D 16 A MASS[Typ.] 1.05g 9 1 0.89 b3 8 Z A1 A E Reference Symbol Dimension in Millimeters Min e bp θ e1 c ( Ni/Pd/Au plating ) e1 D E A A1 bp b3 c θ e Z L Nom Max 7.62 19.2 20.32 6.3 7.4 5.06 L 0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0° 15° 2.29 2.54 2.79 1.12 2.54 REJ03D0904-0200 Rev.2.00 Nov 13, 2007 Page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. 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