R2J20658NP

Preliminary Datasheet R2J20658NP Integrated Driver - MOS FET (DrMOS) Description R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 The R2J20658NP multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver in a single QFN package. The on and off timing of the power MOS FET is optimized by the built-in driver, making this device suitable for large-current buck converters. The chip also incorporates a high-side bootstrap switch, eliminating the need for an external SBD for this purpose. Features                Based on Intel 6  6 DrMOS Specification. Built-in power MOS FET suitable for Desktop, Server application. Low-side MOS FET with built-in SBD for lower loss and reduced ringing. Built-in driver circuit which matches the power MOS FET Built-in tri-state input function which can support a number of PWM controllers High-frequency operation (above 1 MHz) possible VIN operating-voltage range: 20 Vmax Large average output current (Max.40 A) Achieve low power dissipation Controllable driver: Remote on/off Low-side MOS FET disabled function for DCM operation Double thermal protection: Thermal Warning & Thermal Shutdown Built-in bootstrapping Switch Small package: QFN40 (6 mm  6 mm  0.95 mm) Pb-free/Halogen-free Outline Integrated Driver-MOS FET (DrMOS) QFN40 package 6 mm × 6 mm VCIN Reg5V BOOT GH VIN 40 THWN Driver Pad High-side MOS Pad 1 10 11 DISBL# MOS FET Driver LSDBL# Low-side MOS Pad PWM 31 CGND GL PGND 30 (Bottom view) 21 20 VSWH R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 1 of 16 R2J20658NP Preliminary Block Diagram Driver Chip VCIN Reg5V BOOT GH THWN DISBL# THWN THDN UVL Boot SW VIN High-side MOS FET Reg5V 2 μA CGND Supervisor Level Shifter 20 k CGND Reg5V 160 k LSDBL# VSWH Overlap Protection. & Logic Reg5V Reg5V Low-side MOS FET PWM Input Logic (TTL Level) (3 state in) 35 k PGND CGND GL Notes: 1. Truth table for the DISBL# pin DISBL# Input Driver Chip Status "L" Shutdown (GL, GH = "L") "Open" Shutdown (GL, GH = "L") "H" Enable (GL, GH = "Active") 3. Output signal from the UVL block UVL output Logic Level "H" For shutdown "L" VL VH VCIN For active 2. Truth table for the LSDBL# pin LSDBL# Input GL Status "L" "Open" "H" "L" "Active" "Active" 4. Output signal from the THWN block "H" Thermal Warning Logic Level "L" Thermal Warning TIC(°C) TwarnL TwarnH Normal operating 5. Truth table for the THDN block Driver IC Temp. Driver Chip Status < 150°C Enable (GL, GH = "Active") > 150°C Shutdown (GL, GH = "L") (latch-off) R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 2 of 16 R2J20658NP Preliminary Pin Arrangement Reg5V 2 VSWH CGND BOOT 10 9 8 7 6 5 4 VCIN 3 VIN VIN VIN GH VIN VIN VIN VIN VSWH PGND PGND PGND PGND PGND LSDBL# 1 40 39 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 PWM DISBL# THWN CGND GL VSWH VSWH VSWH VSWH VSWH VIN CGND 38 37 36 35 VSWH 34 33 32 31 PGND PGND PGND PGND PGND PGND PGND PGND VSWH (Top view) Note: All die-pads (three pads in total) should be soldered to PCB. Pin Description Pin Name LSDBL# Reg5V VCIN BOOT CGND GH VIN VSWH PGND GL THWN DISBL# Pin No. 1 2 3 4 5, 37, Pad 6 8 to 14, Pad 7, 15, 29 to 35, Pad 16 to 28 36 38 39 Description Low-side gate disable +5 V logic power supply output Control input voltage Bootstrap voltage pin Control signal ground High-side gate signal Input voltage Phase output/Switch output Power ground Low-side gate signal Thermal warning Signal disable Remarks When asserted "L" signal, Low-side gate disable Driver Vcc input To be supplied +5 V through internal switch Should be connected to PGND externally Pin for monitor Pin for monitor Thermal warning when over 115°C Disabled when DISBL# is "L". This Pin is pulled low when internal IC over the thermal shutdown level, 150°C. Capable of both 3.3 V and 5 V logic input PWM 40 PWM drive logic input R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 VSWH Page 3 of 16 R2J20658NP Preliminary Absolute Maximum Ratings (Ta = 25°C) Item Power dissipation Average output current Input voltage Switch node voltage BOOT voltage Supply voltage PWM voltage Symbol Pt(25) Pt(110) Iout VIN(DC) VIN(AC) VSWH(DC) VSWH(AC) VBOOT(DC) VBOOT(AC) VCIN Vpwm Rating 25 8 40 –0.3 to +20 30 20 30 25 36 –0.3 to +27 –0.3 to +5.5 @UVL OFF –0.3 to +0.3 @UVL ON –0.3 to Reg5V + 0.3 –0.3 to VCIN + 0.3 –0.3 to +6 –20 to +0.1 0 to 1.0 –40 to +150 –55 to +150 Units W A V V V V V Note 1 2 2, 4, 6 2 2, 4, 6 2 2, 4, 6 2 2, 4 2, 5 2, 7, 8 2 2, 7 3 3 Other I/O voltage Reg5V voltage Reg5V current THWN/THDN current Operating junction temperature Storage temperature Notes: 1. 2. 3. 4. 5. 6. 7. 8. Vdisbl, Vlsdbl Vreg5V Ireg5V Ithwn, Idisbl Tj-opr Tstg V V mA mA °C °C Pt(25) represents a PCB temperature of 25°C, and Pt(110) represents 110C. Rated voltages are relative to voltages on the CGND and PGND pins. For rated current, (+) indicates inflow to the chip and (–) indicates outflow. This rating is when UVL (Under Voltage Lock out) is ineffective (normal operation mode). This rating is when UVL (Under Voltage Lock out) is effective (lock out mode). The specification values indicated "AC" is limited within 10 ns. This rating is when the external power-source is applied to Reg5V pin. Reg5V + 0.3 V < 6 V Safe Operating Area 50 45 Average Output Current (A) 40 35 30 25 20 15 10 5 0 0 VIN = 12 V VCIN = Reg5V = 5 V VOUT = 1.3 V fPWM = 1 MHz L = 0.45 μH 25 50 75 100 PCB Temperature (°C) 125 150 175 R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 4 of 16 R2J20658NP Preliminary Recommended Operating Condition Item Input voltage Supply voltage & Drive voltage Symbol VIN VCIN Rating 4.5 to 16 4.5 to 5.5 or 8 to 22 Units V V Note When the usage of VCIN = 4.5 V to 5.5 V, VCIN should be connected to Reg5V (Refer to "Pin Connection") Electrical Characteristics (Ta = 25°C, VCIN = 12 V, VSWH = 0 V, unless otherwise specified) Supply Item VCIN start threshold VCIN shutdown threshold UVLO hysteresis VCIN operating current VCIN disable current PWM input PWM input high level PWM input low level PWM input resistance PWM input tri-state range Shutdown hold-off time Enable level Disable level Input current THDN on resistance Low-side activation level Low-side disable level Input current Warning temperature Temperature hysteresis THWN on resistance THWN leakage current Shutdown temperature Output voltage Line regulation Load regulation Note: Symbol VH VL dUVL ICIN ICIN-DISBL VH-PWM VL-PWM RIN-PWM VIN-tri tHOLD-OFF * VENBL VDISBL IDISBL 1 RTHDN * VLSDBLH VLSDBLL ILSDBL TTHWN *1 THYS *1 RTHWN *1 ILEAK 1 Tstdn * Vreg Vreg-line Vreg-load 1 Min 7.0 6.6 — — — 2.6 — 6.5 1.4 — 2.0 — — 0.2 2.0 — –52 100 — 0.2 — 130 4.95 –10 –10 Typ 7.4 7.0 0.4 43 — — — 12.5 — 150 — — 2.0 0.5 — — –26 115 15 0.5 — 150 5.2 0 0 Max 7.8 7.4 — — 800 — 0.8 25 2.0 — — 0.8 5.0 1.0 — 0.8 –12 130 — 1.0 1.0 — 5.45 10 10 Units V V V mA A V V k V ns V V A k V V A °C °C k A °C V mV mV Test Conditions VH – VL fPWM = 1 MHz, Ton_pwm = 120 ns DISBL# = 0 V, PWM = LSDBL# = Open 3.3 V/5.0 V PWM interface PWM = 1 V 3.3 V/5.0 V PWM interface DISBL# input DISBL# = 1 V THDN = 0.2 V LSDBL# input Thermal warning LSDBL# = 1 V Driver IC temperature THWN = 0.2 V THWN = 5 V Driver IC temperature Thermal shutdown 5V regulator VCIN = 12 V to 16 V Ireg = 0 to 10 mA 1. Reference values for design. Not 100% tested in production. R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 5 of 16 R2J20658NP Preliminary Typical Application +12 V VCIN THWN DISBL# Reg5V BOOT VIN R2J20658NP PWM CGND LSDBL# GH VSWH PGND GL +5 V VCIN THWN DISBL# Reg5V BOOT VIN R2J20658NP PWM CGND LSDBL# GH PWM1 VSWH PGND GL PWM Control Circuit PWM2 +1.3 V PWM3 PWM4 VCIN THWN DISBL# Reg5V BOOT VIN R2J20658NP PWM CGND LSDBL# GH VSWH Power GND Signal GND PGND GL VCIN THWN DISBL# Reg5V BOOT VIN R2J20658NP PWM CGND LSDBL# GH VSWH PGND GL R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 6 of 16 R2J20658NP Preliminary Pin Connection (1) Single 12 V Application 0.1 μF 0 to 10 Ω 1.0 μF CGND VIN 12 V 1.0 μF Low-side Disable Signal INPUT CGND 10 μF × 4 11 12 10 9 8 VIN 7 VSWH 6 GH 5 CGND 4 BOOT 3 VCIN 2 Reg5V 1 LSDBL# PWM 40 PWM INPUT Thermal Shutdown PGND 13 14 VIN 15 VSWH 16 PGND 17 18 19 VIN PAD CGND PAD DISBL# 39 THWN 38 CGND 37 10 kΩ R2J20658NP VSWH PAD VSWH GL 36 VSWH 35 34 33 10 kΩ VCIN VCIN Thermal Warning 32 PGND 20 31 21 22 23 24 25 26 27 28 29 30 Power GND Signal GND 0.45 μH Vout PGND PGND (2) VCIN 5 V Application 0.1 μF 0 to 10 Ω VIN 12 V 1.0 μF Low-side Disable Signal INPUT 5.0 V External Power Supply 10 μF × 4 11 12 CGND 10 9 8 VIN 7 VSWH 6 GH 5 CGND 4 BOOT 3 VCIN 2 Reg5V 1 LSDBL# PWM 40 PWM INPUT Thermal Shutdown PGND 13 14 VIN 15 VSWH 16 PGND 17 18 19 VIN PAD CGND PAD DISBL# 39 THWN 38 CGND 37 10 kΩ R2J20658NP VSWH PAD VSWH GL 36 VSWH 35 34 33 10 kΩ 5V 5V Thermal Warning 32 PGND 20 31 21 22 23 24 25 26 27 28 29 30 Power GND Signal GND 0.45 μH Vout PGND PGND R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 7 of 16 R2J20658NP Preliminary Test Circuit Vinput A IIN V VIN Vcont A ICIN VCIN V VCIN DISBL# BOOT VIN R2J20658NP Reg5V LSDBL# VSWH 5 V pulse PWM CGND GH GL PGND Electric load IO Note: PIN = IIN × VIN + ICIN × VCIN POUT = IO × VO Efficiency = POUT / PIN PLOSS(DrMOS) = PIN – POUT Ta = 27°C Averaging Output Voltage Averaging V VO circuit R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 8 of 16 R2J20658NP Preliminary Typical Data Power Loss vs. Output Current 10 VIN = 12 V Power Loss vs. Input Voltage 1.8 VCIN = Reg5V = 5 V 9 VCIN = Reg5V = 5 V L = 0.45 μH 1.7 VOUT = 1.3 V Normalized Power Loss @ VIN = 12 V 8f PWM = 600 kHz Power Loss (W) VOUT = 1.3 V 1.6 L = 0.45 μH 1.5 1.4 1.3 1.2 1.1 1.0 0.9 fPWM = 600 kHz 7 6 5 4 3 2 1 0 0 IOUT = 25 A 5 10 15 20 25 30 35 40 0.8 4 6 8 10 12 14 16 Output Current (A) Input Voltage (V) Power Loss vs. Output Voltage 1.8 VIN = 12 V Power Loss vs. Switching Frequency 1.8 VIN = 12 V 1.7 VCIN = Reg5V = 5 V Normalized Power Loss @ VOUT = 1.3 V Normalized Power Loss @ fPWM = 600 kHz 1.7 VCIN = Reg5V = 5 V 1.6 L = 0.45 μH 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 250 500 750 1000 1250 VOUT = 1.3 V IOUT = 25 A 1.6 L = 0.45 μH 1.5 1.4 1.3 1.2 1.1 1.0 0.9 fPWM = 600 kHz IOUT = 25 A 0.8 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 Output Voltage (V) Switching Frequency (kHz) R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 9 of 16 R2J20658NP Preliminary Typical Data (cont.) Power Loss vs. Output Inductance 1.8 VIN = 12 V Power Loss vs. VCIN 1.8 VIN = 12 V 1.7 VCIN = Reg5V = 5 V 1.7 VOUT = 1.3 V Normalized Power Loss @ L = 0.45 μH Normalized Power Loss @ VCIN = Reg5V = 5 V 1.6 f PWM = 600 kHz 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Output Inductance (μH) IOUT = 25 A VOUT = 1.3 V 1.6 L = 0.45 μH 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 4.5 fPWM = 600 kHz IOUT = 25 A 5.0 5.5 6.0 VCIN = Reg5V (V) Average ICIN vs. Switching Frequency 60 VIN = 12 V VCIN = Reg5V = 5 V VOUT = 1.3 V L = 0.45 μH IOUT = 0 A 50 Average ICIN (mA) 40 30 20 10 250 500 750 1000 1250 Switching Frequency (kHz) R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 10 of 16 R2J20658NP Preliminary Description of Operation The DrMOS multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver in a single QFN package. Since the parasitic inductance between each chip is extremely small, the module is highly suitable for use in buck converters to be operated at high frequencies. The control timing between the high-side MOS FET, lowside MOS FET, and driver is optimized so that high efficiency can be obtained at low output-voltage. VCIN & DISBL# The VCIN pin is connected to the UVL (under-voltage lockout) module, so that the built-in 5 V regulator is disabled as long as VCIN is 7.4 V or less. On cancellation of UVL, the built-in 5 V regulator remains enabled until the UVL input is driven to 7.0 V or less. The built-in 5 V regulator is a series regulator with temperature compensation. A ceramic capacitor with a value of 0.1 F or more must be connected between the CGND plane and the Reg5V pin. The output of 5 V regulator is monitored by the internal Supervisor circuits. When the Supervisor detects this output is more than 4.3 V (typ.), the driver state becomes active (figure 1.1). Supervisor circuit has hysteresis and its shutdown level of Supervisor is 3.8 V (typ.). Figure 1.2 shows the application when the external 5 V regulator is used. When the Reg5V pin is applied into external 5 V, the Supervisor can activate the driver. In this application usage, VCIN should be connected to Reg5V. The signal on pin DISBL# also enables or disables the circuit. When UVL disables the circuit, the built-in 5 V regulator does not operate, but when the signal on DISBL# disables the circuit, only output-pulse generation is terminated, and the 5 V regulator is not disabled. Voltages from –0.3 V to VCIN+0.3 V can be applied to the DISBL# pin, so on/off control by a logic IC or the use of a resistor, etc., to pull the DISBL# line up to VCIN are both possible. VCIN L H H H DISBL#  L H Open Reg5V 0 Active Active Active Driver State Disable (GL, GH = L) Disable (GL, GH = L) Active Disable (GL, GH = L) 12 V VCIN VCIN > 7.4 V VCIN 5V IN OUT OUT Reg5V IN Reg5V External 5 V UVL & 5 V Regulator To Internal Logic Supervisor UVL & 5 V Regulator To Internal Logic Supervisor Figure 1.1 Typical 12 V Input Application (Activate Built-in 5 V Regulator) Figure 1.2 External 5 V Application R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 11 of 16 R2J20658NP PWM & LSDBL# Preliminary The PWM pin is the signal input pin for the driver chip. When the PWM input is high, the gate of the high-side MOS FET (GH) is high and the gate of the low-side MOS FET (GL) is low. PWM L H GH L H GL H L The LSDBL# pin is the Low Side Gate Disable pin for "Discontinuous Conduction Mode (DCM)" when LSDBL# is low. Figure 2 shows the Typical high-side and low-side gate switching and Inductor current (IL) during "Continuous Conduction Mode (CCM)" and low-side gate disabled when asserting LSDBL# signal. This pin is internally pulled up to Reg5V with 160 k resistor. When low-side disable function is not used, keep this pin open or pulled up to VCIN. CCM Operation (LSDBL# = "H" or Open mode) IL GH GL Figure 2.1 Typical Signals during CCM DCM Operation (LSDBL# = "L") IL 0A GH GL Figure 2.2 Typical Signals during DCM R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 12 of 16 R2J20658NP Preliminary The PWM input is TTL level and has hysteresis. When the signal route from the control IC is high impedance, the tristate function turns off the high- and low-side MOS FETs. This function operates when the PWM input signal stays in the input hysteresis window for 150 ns (typ.). After the tri-state mode has been entered and GH and GL have become low, a PWM input voltage of 2.6 V or more is required to make the circuit return to normal operation. 150 ns (tHOLD-OFF) 150 ns (tHOLD-OFF) 2.0 V PWM 1.4 V GH GL 150 ns (tHOLD-OFF) 150 ns (tHOLD-OFF) 2.0 V PWM 1.4 V GH GL Figure 3 PWM Shutdown-Hold Time Signal R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 13 of 16 R2J20658NP Preliminary The equivalent circuit for the PWM-pin input is shown in the next figure. M1 is in the ON state during normal operation; after the PWM input signal has stayed in the hysteresis window for 150 ns (typ.) and the tri-state detection signal has been driven high, the transistor M1 is turned off. When VCIN is powered up, M1 is started in the OFF state regardless of PWM Low or Open state. After PWM is asserted high signal, M1 becomes ON and shifts to normal operation. Reg5V M1 25 k PWM Pin Input Logic 12.5 k Tri-state detection signal To internal control Figure 4 Equivalent Circuit for the PWM-pin Input THWN & THDN This device has two level thermal detection, one is thermal warning and the other is thermal shutdown function. This Thermal Warning feature is the indication of the high temperature status. THWN is an open drain logic output signal and need to connect a pull-up resistor (ex.51 k) to THWN for Systems with the thermal warning implementation. When the chip temperature of the internal driver IC becomes over 115°C, Thermal warning function operates. This signal is only indication for the system controller and does not disable DrMOS operation. When thermal warning function is not used, keep this pin open. Thermal warning "H" THWN output Logic Level "L" Normal operating 100 115 TIC (°C) Figure 5 THWN Trigger Temperature R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 14 of 16 R2J20658NP THDN is an internal thermal shutdown signal when driver IC becomes over 150°C. Preliminary This function makes High-Side MOS FET and Low-Side MOS FET turn off for the device protection from abnormal high temperature situation and at the same time DISBL# pin is pulled low internally to give notice to the system controller. Once thermal shutdown function operates, driver IC keeps DISBL# pin pulled low until VCIN becomes under UVL level (or under supervisor shutdown level). Figure 6 shows the example of two types of DISBL# connection with the system controller signal. Driver IC Temp. < 150°C > 150°C Driver Chip Status Enable (GL, GH = "Active") Shutdown (GL, GH = "L") 5V 10 k DISBL# 2 μA To Internal Logic 10 k DISBL# 2 μA To Internal Logic To shutdown signal Thermal Shutdown Detection ON/OFF signal Thermal Shutdown Detection Figure 6.1 THDN Signal to the System Controller Figure 6.2 ON/OFF Signal from the System Controller MOS FET The MOS FETs incorporated in R2J20658NP are highly suitable for synchronous-rectification buck conversion. For the high-side MOS FET, the drain is connected to the VIN pin and the source is connected to the VSWH pin. For the lowside MOS FET, the drain is connected to the VSWH pin and the source is connected to the PGND pin. R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 Page 15 of 16 R2J20658NP Preliminary Package Dimensions JEITA Package Code P-HVQFN40-p-0606-0.50 RENESAS Code PVQN0040KE-A Previous Code — MASS[Typ.] — HD D 2.2 0.2 0.2 B INDEX 1pin 40 4-C0.50 40 1pin B 2.2 C0.3 E /2 1.95 A 2.2 0.7 0.2 Reference Symbol HD/2 D /2 HE E 1.95 HE/2 t S AB e y1 S X4 f S AB b 2.2 X4 20° 20° L1 x S AB S A A2 0.69 A1 c2 Lp yS Ordering Information Part Name R2J20658NP#G0 Quantity 2500 pcs Shipping Container Taping Reel R07DS0248EJ0100 Rev.1.00 Jan 25, 2011 2.05 ZD ZE 4(0 .1 39 ) 1.95 2-A section CAV No. Die No. Dimension in Millimeters 1.95 2.05 Min Nom Max D 5.95 6.00 6.05 5.95 6.00 6.05 E A2 0.87 0.89 0.91 f — — 0.20 A 0.865 0.91 0.95 A1 0.005 0.02 0.04 b 0.17 0.22 0.27 b1 0.16 0.20 0.24 — 0.50 — e Lp 0.40 0.50 0.60 x — — 0.05 y — — 0.05 y1 — — 0.20 t — — 0.20 HD 6.15 6.20 6.25 HE 6.15 6.20 6.25 ZD — 0.75 — ZE — 0.75 — L1 0.06 0.10 0.14 c1 0.17 0.20 0.23 c2 0.17 0.22 0.27 Page 16 of 16 Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. 3. 4. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 5. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. 6. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. 7. Renesas Electronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas Electronics product depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics. The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc. "Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; safety equipment; and medical equipment not specifically designed for life support. "Specific": Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life. 8. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges. 9. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. 10. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. 11. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. 12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) (Note 2) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries. "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics. SALES OFFICES Refer to "http://www.renesas.com/" for the latest and detailed information. Renesas Electronics America Inc. 2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A. Tel: +1-408-588-6000, Fax: +1-408-588-6130 Renesas Electronics Canada Limited 1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada Tel: +1-905-898-5441, Fax: +1-905-898-3220 Renesas Electronics Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K Tel: +44-1628-585-100, Fax: +44-1628-585-900 Renesas Electronics Europe GmbH Arcadiastrasse 10, 40472 Düsseldorf, Germany Tel: +49-211-65030, Fax: +49-211-6503-1327 Renesas Electronics (China) Co., Ltd. 7th Floor, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100083, P.R.China Tel: +86-10-8235-1155, Fax: +86-10-8235-7679 Renesas Electronics (Shanghai) Co., Ltd. Unit 204, 205, AZIA Center, No.1233 Lujiazui Ring Rd., Pudong District, Shanghai 200120, China Tel: +86-21-5877-1818, Fax: +86-21-6887-7858 / -7898 Renesas Electronics Hong Kong Limited Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong Tel: +852-2886-9318, Fax: +852 2886-9022/9044 Renesas Electronics Taiwan Co., Ltd. 7F, No. 363 Fu Shing North Road Taipei, Taiwan Tel: +886-2-8175-9600, Fax: +886 2-8175-9670 Renesas Electronics Singapore Pte. Ltd. 1 harbourFront Avenue, #06-10, keppel Bay Tower, Singapore 098632 Tel: +65-6213-0200, Fax: +65-6278-8001 Renesas Electronics Malaysia Sdn.Bhd. Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: +60-3-7955-9390, Fax: +60-3-7955-9510 Renesas Electronics Korea Co., Ltd. 11F., Samik Lavied' or Bldg., 720-2 Yeoksam-Dong, Kangnam-Ku, Seoul 135-080, Korea Tel: +82-2-558-3737, Fax: +82-2-558-5141 http://www.renesas.com © 2011 Renesas Electronics Corporation. All rights reserved. Colophon 1.0