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RAA207705GBM#HC0

RAA207705GBM#HC0

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    20-XFBGA,CSPBGA

  • 描述:

    ICREGBUCKADJ5ASYNC20CSP

  • 数据手册
  • 价格&库存
RAA207705GBM#HC0 数据手册
Data Sheet RAA207700GBM/7701GBM/7702GBM R07DS0891EJ0100 Rev.1.00 Aug 02, 2013 Synchronous Buck Regulator with Internal Power MOSFETs Description The RAA207700GBM is monolithic synchronous buck regulator with power MOSFETs in extremely small package. The RAA207700GBM delivers high output current by small Rds(on) Power MOSFETs. Constant on time control architecture provides fast transient response, and minimize external components. The RAA207700GBM operates skip mode at light load, it provides high efficiency in all load condition. Three current ability products can be selected. Features · · · · · · · · · · · · · · · · · Wide input voltage range: 3 V to 16 V Output voltage range: 0.8 V to 5 V Constant-On-Time control Built-in power MOSFETs suitable for PC, Server application Very low stand-by current: 0.1 mA (typ.) Very low quiescent current :300 mA (typ. at no load) Switching frequency: Adjustable up to 2 MHz High average output current, up to 15 A (7700GBM), 10 A (7701GBM), 5 A (7702GBM) Controllable driver: Remote ON/OFF Power Good function Over current protection/Over voltage protection/Thermal shutdown function Built-in bootstrapping diode Soft Start period adjustable Enhanced light load mode function for higher efficiency High drivability built-in line switch driver for low-loss line switch driving Extremely small chip size package with solder bump Pb-Free/Halogen-Free Application Circuit VCIN VIN VCIN SET BOOT VIN ON/OFF SS RAA207700GBM RAA207701GBM SW RAA207702GBM Vout_1 PGOOD Line SW control signal FB LS_IN PGND LS_OUT SGND Discrete Line SW Vout_2 R07DS0891EJ0100 Rev.1.00 Aug 02, 2013 Page 1 of 25 RAA207700GBM/7701GBM/7702GBM Pin Arrangement Top View 1 2 3 4 5 VCIN SGND FB LS_ IN LS_ OUT BOOT SET PGO OD SS SW VIN VIN SW SW SW 1 2 3 4 5 1 2 3 4 5 A VCIN SGND FB LS_ IN LS_ OUT A VCIN SGND FB LS_ IN LS_ OUT A ON/ OFF B BOOT SET PGO OD SS ON/ OFF B BOOT SET PGO OD SS ON/ OFF B VIN VIN C SW VIN VIN VIN VIN C SW SW VIN VIN VIN C SW SW VIN D SW SW SW SW VIN D SW SW PGND PGND PGND D PGND PGND PGND PGND E SW PGND PGND PGND PGND E SW SW SW PGND PGND F SW SW SW PGND PGND F SW PGND PGND PGND PGND G Bottom View 5 4 3 2 1 LS_ OUT LS_ IN FB SGND VCIN ON/ OFF SS PGO OD SET VIN VIN VIN VIN SW PGND 5 4 3 2 1 A LS_ OUT LS_ IN FB SGND VCIN BOOT B ON/ OFF SS PGO OD SET VIN SW C VIN VIN VIN SW SW SW D VIN SW PGND PGND PGND SW E PGND PGND PGND SW SW SW F PGND PGND PGND PGND PGND SW G CSP 35-pin package 2.67 mm × 3.87 mm R07DS0891EJ0100 Rev.1.00 Aug 02, 2013 5 4 3 2 1 A LS_ OUT LS_ IN FB SGND VCIN A BOOT B ON/ OFF SS PGO OD SET BOOT B VIN SW C VIN VIN VIN SW SW C SW SW SW D PGND PGND PGND SW SW D PGND PGND PGND SW E PGND SW SW SW F CSP 30-pin package 2.67 mm × 3.37 mm CSP 20-pin package 2.67 mm × 2.37 mm Page 2 of 25 RAA207700GBM/7701GBM/7702GBM Pin Description Pin Name Pin No. Description Remarks VCIN SGND 1A 2A Controller input voltage (+5 V input) Controller analog GND FB LS_IN 3A 4A Feedback voltage input pin Line SW driver control pin LS_OUT BOOT 5A 1B Line SW driver output pin Bootstrap voltage pin To be supplied +5 V through integrated SBD SET PGOOD 2B 3B Constant on time program pin Power good indicator pin Tie resistor between SW and SET Pull low when No Good (open drain output) SS ON/OFF 4B 5B Soft start period program pin Operation enable pin Tie capacitor between SS and SGND Operation stop when "L" signal asserted VIN SW — — Input voltage Switching node — Power GND PGND Note: Controller supply input Should be connected to PGND on PCB pattern Should be connected to SGND on PCB pattern Pin assign of 1A-5A & 1B-5B is common through RAA207700GBM, RAA207701GBM and RAA207702GBM. R07DS0891EJ0100 Rev.1.00 Aug 02, 2013 Page 3 of 25 RAA207700GBM/7701GBM/7702GBM Block Diagram SET VCIN VIN Enable ON/OFF 1M TSD UVLO 4.3 V BOOT TSD UVLO 2.5 mA SS Enable UVLO Fault Ripple Comparator 0.8 V + + – 1.0 V OCP OCP 1 shot timer OVP – FB 0.72 V – Control Logic UVLO + ZCD Enable PGOOD TSD delay SW ZCD Comparator + – + VCIN Fault VIN Protection Function LS_IN Fault OVP PGND 1M OCP TSD OVP LS_OUT 1. Truth table for the ON/OFF pin ON/OFF Input SGND 2. Truth table for Line Switch driver "L" Driver Chip Status Shutdown (operation STOP) "L" GND "Open" "H" Shutdown (operation STOP) Enable (Normal operation) "Open" "H" GND VIN R07DS0891EJ0100 Rev.1.00 Aug 02, 2013 LS_IN Input LS_OUT Status Page 4 of 25 RAA207700GBM/7701GBM/7702GBM Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings –0.3 to +20 Unit V Notes 1 20(DC), 23(
RAA207705GBM#HC0 价格&库存

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