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RAA230401GFT#AA0

RAA230401GFT#AA0

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    TQFP32_EP

  • 描述:

    ICREGQDBCK/LINEARSYNC32TQFP

  • 数据手册
  • 价格&库存
RAA230401GFT#AA0 数据手册
Data Sheet RAA207703GBM/7704GBM/7705GBM R07DS0892EJ0100 Rev.1.00 Aug 02, 2013 Synchronous Buck Regulator with Internal Power MOSFETs Description The RAA207703GBM is monolithic synchronous buck regulator with power MOSFETs in extremely small package. The RAA207703GBM delivers high output current by small Rds(on) Power MOSFETs. Constant on time control architecture provides fast transient response, and minimize external components. The RAA207703GBM operates skip mode at light load, it provides high efficiency in all load condition. The RAA207703GBM incorporates internal 5V LDO, so the regulator can operates single power supply. Three current ability products can be selected. Features · · · · · · · · · · · · · · · · Input voltage range: 5.5 V to 16 V (internal LDO use), 3.0 V to 16 V (external 5 V use) Output voltage range: 0.8 V to 5.0 V Constant-On-Time control Built-in power MOSFETs suitable for PC, Server application Internal 5 V LDO for single power supply operation 5 V LDO / external 5 V input selectable (LDO remote ON/OFF) Switching frequency: Adjustable up to 2 MHz High average output current, up to 15 A (7703GBM), 10 A (7704GBM), 5 A (7705GBM) Controllable driver: Remote ON/OFF Power Good function Over current protection/Over voltage protection/Thermal shutdown function Built-in bootstrapping diode Soft Start period adjustable Enhanced light load mode function for higher efficiency Extremely small chip size package with solder bump Pb-Free/Halogen-Free Application Circuit VIN V5_OUT SET BOOT VIN AVIN ON/OFF SS RAA207703GBM RAA207704GBM SW RAA207705GBM Vout PGOOD FB LDO_EN# PGND SGND R07DS0892EJ0100 Rev.1.00 Aug 02, 2013 Page 1 of 23 RAA207703GBM/7704GBM/7705GBM Pin Arrangement Top View 1 2 3 4 5 V5_ OUT SGND FB LDO_ EN# AVIN BOOT SET PGO OD SS SW VIN VIN SW SW SW 1 2 3 4 5 1 2 3 4 5 A V5_ OUT SGND FB LDO_ EN# AVIN A V5_ OUT SGND FB LDO_ EN# AVIN A ON/ OFF B BOOT SET PGO OD SS ON/ OFF B BOOT SET PGO OD SS ON/ OFF B VIN VIN C SW VIN VIN VIN VIN C SW SW VIN VIN VIN C SW SW VIN D SW SW SW SW VIN D SW SW PGND PGND PGND D PGND PGND PGND PGND E SW PGND PGND PGND PGND E SW SW SW PGND PGND F SW SW SW PGND PGND F SW PGND PGND PGND PGND G Bottom View 5 4 3 2 1 AVIN LDO_ EN# FB SGND V5_ OUT ON/ OFF SS PGO OD SET VIN VIN VIN VIN SW PGND 5 4 3 2 1 A AVIN LDO_ EN# FB SGND V5_ OUT BOOT B ON/ OFF SS PGO OD SET VIN SW C VIN VIN VIN SW SW SW D VIN SW PGND PGND PGND SW E PGND PGND PGND SW SW SW F PGND PGND PGND PGND PGND SW G CSP 35-pin package 2.67 mm × 3.87 mm R07DS0892EJ0100 Rev.1.00 Aug 02, 2013 5 4 3 2 1 A AVIN LDO_ EN# FB SGND V5_ OUT A BOOT B ON/ OFF SS PGO OD SET BOOT B VIN SW C VIN VIN VIN SW SW C SW SW SW D PGND PGND PGND SW SW D PGND PGND PGND SW E PGND SW SW SW F CSP 30-pin package 2.67 mm × 3.37 mm CSP 20-pin package 2.67 mm × 2.37 mm Page 2 of 23 RAA207703GBM/7704GBM/7705GBM Pin Description Pin Name Pin No. Description Remarks V5_OUT SGND 1A 2A Controller voltage Controller analog GND FB LDO_EN# 3A 4A Feedback voltage input pin Internal 5 V LDO enable pin AVIN BOOT 5A 1B Analog input voltage Bootstrap voltage pin Should be connected to VIN on PCB pattern To be supplied +5 V through integrated SBD SET PGOOD 2B 3B Constant on time program pin Power good indicator pin Tie resistor between SW and SET pin Pull low when No Good (open drain output) SS ON/OFF 4B 5B Soft start period program pin Operation enable pin Tie capacitor between SS and SGND Operation stop when "L" signal asserted VIN SW — — Input voltage Switching node — Power GND PGND Note: Controller supply (5 V regulator output) Should be connected to PGND on PCB pattern Should be connected to SGND on PCB pattern Pin assign of 1A-5A & 1B-5B is common through RAA207703GBM, RAA207704GBM and RAA207705GBM. R07DS0892EJ0100 Rev.1.00 Aug 02, 2013 Page 3 of 23 RAA207703GBM/7704GBM/7705GBM Block Diagram V5_OUT AVIN VIN Enable ON/OFF 1M 5V LDO TSD LDO_EN# TSD 1M UVLO 4.3 V SET BOOT UVLO 2.5 mA Ripple Comparator 0.8 V + + – SS Enable UVLO Fault 1.0 V – OCP OCP 1 shot timer OVP + FB 0.72 V – Control Logic UVLO + ZCD Enable PGOOD TSD delay – + V5_OUT Fault Protection Function SW ZCD Comparator Fault OVP PGND TSD OCP OVP SGND 1. Truth table for the ON/OFF pin ON/OFF Input Driver Chip Status 2. Truth table for LDO_EN# pin LDO_EN# Input 5 V Regulator Status "L" "Open" Shutdown (operation STOP) Shutdown (operation STOP) "L" "Open" LDO enable LDO enable "H" Enable (Normal operation) "H" LDO disable R07DS0892EJ0100 Rev.1.00 Aug 02, 2013 Page 4 of 23 RAA207703GBM/7704GBM/7705GBM Absolute Maximum Ratings (Ta = 25°C) Item Input voltage Symbol VIN, AVIN Switch node voltage BOOT voltage SW VBOOT 20(DC), 23(
RAA230401GFT#AA0 价格&库存

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