RD74LVC1G79WPE

RD74LVC1G79 Single Positive Edge-triggered D-type Flip Flop REJ03D0695–0100 Rev.1.00 Feb 23, 2006 Description The RD74LVC1G79 has D-type flip flop in a 5-pin package. The input data is transferred to the output at the rising edge of clock pulse CLK. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features The basic gate function is lined up as Renesas uni logic series. Supply voltage range: 1.65 to 5.5 V Operating temperature range: –40 to +85°C All inputs: VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs: VO (Max.) = 5.5 V (@VCC = 0 V) Output current: ±4 mA (@VCC = 1.65 V) ±8 mA (@VCC = 2.3 V) ±24 mA (@VCC = 3.0 V) ±32 mA (@VCC = 4.5 V) • Ordering Information Part Name RD74LVC1G79WPE Package Type WCSP-5 pin Package Code (Previous Code) (Previous SXBG0005LB–A (TBS-5CV) (TBS-5CV) Package Abbreviation WP Taping Abbreviation (Quantity) E (3,000 pcs/reel) • • • • • • Article Indication Marking Year code Month code EFYM Rev.1.00 Feb 23, 2006 page 1 of 6 RD74LVC1G79 Function Table Inputs CLK ↑ ↑ L H: L: X: ↑: Q0 : High level Low level Immaterial Low to high transition Level of Q before the indicated steady input conditions was established. D H L X Output Q H L Q0 Pin Arrangement 0.7 mm Height 0.4 mm 0.4 mm pitch 0.17 mm 5–Ball (WP) GND 3 4 Q CLK 2 1.1 mm Pin#1 INDEX D 1 5 VCC (Bottom (Bottom view) (Top view) Logic Diagram CLK C C C TG C C C Q C D TG TG TG C C C Rev.1.00 Feb 23, 2006 page 2 of 8 RD74LVC1G79 Absolute Maximum Ratings Item Supply voltage range Input voltage range *1 Output voltage range Input clamp current Output clamp current Continuous output current Continuous current through VCC or GND Package Thermal impedance Storage temperature Notes: *1, 2 Symbol VCC VI VO IIK IOK IO ICC or IGND θja Tstg Ratings –0.5 to 6.5 –0.5 to 6.5 –0.5 to VCC +0.5 –0.5 to 6.5 –50 –50 ±50 ±100 200 –65 to 150 Unit V V V mA mA mA mA °C/W °C WP Test Conditions Output: H or L VCC: OFF VI < 0 VO < 0 VO = 0 to VCC The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are ngs output observed. 2. This value is limited to 5.5 V maximum. Recommended Operating Conditions Item Supply voltage range Input voltage range Output voltage range Output current Symbol VCC VI VO IOL Min Min 1.65 0 0 — — — — — — — — — — –40 Max 5.5 5.5 VCC 4 8 16 16 24 32 32 –4 –8 –8 –16 –24 –32 85 Unit V V V mA Conditions VCC = 1.65 V VCC = 2.3 V VCC = 3.0 V VCC = 4.5 V VCC = 1.65 V VCC = 2.3 V VCC = 3.0 V VCC = 4.5 V IOH mA Operating Operating free-air temperature Ta °C Note: Unused or floating inputs must be held high or low. Rev.1.00 Feb 23, 2006 page 3 of 8 RD74LVC1G79 Electrical Characteristics Ta = –40 to 85°C Item Input voltage Symbol VIH VCC (V) 1.65 to 1.95 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 VIL 1.65 to 1.95 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 Output voltage VOH 1.65 to 5.5 1.65 2.3 3.0 4.5 VOL Min Min to Max 1.65 1.65 2.3 3.0 4.5 Input current Quiescent supply current IIN ICC ∆ICC Output leakage current Input capacitance IOFF OFF CIN 0 to 5.5 5.5 3 to 5.5 0 3.3 Min VCC×0.65 1.7 2.0 VCC×0.7 — — — — VCC–0.1 1.2 1.9 2.4 2.3 3.8 — — — — — — — — — — — Typ — — — — — — — — — — — — — — — — — — — — — — — — 3.5 Max — — — — VCC×0.35 0.7 0.8 VCC×0.3 — — — — — — 0.1 0.45 0.3 0.4 0.4 0.55 0.55 ±5 10 500 ±10 — µA pF µA µA V IOH = –100 µA IOH = –4 mA IOH = –8 mA IOH = –16 mA IOH = –24 mA IOH = –32 mA IOL = 100 µA IOL = 4 mA IOL = 8 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA VIN = 5.5 V or GND VIN = VCC or GND, IO = 0 One input at VCC–0.6 V, Other input at VCC or GND VIN or VO = 0 to 5.5 V VIN = VCC or GND Unit V Test condition Note: Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. Rev.1.00 Feb 23, 2006 page 4 of 8 RD74LVC1G79 Switching Characteristics VCC = 1.8±0.15 V Item Maximum clock frequency Propagation delay time Setup time Hold time Pulse width Symbol fmax tPLH, tPHL tsu th tw Min 160 4.4 2.2 0.3 2.5 Typ      Max  9.9    Unit MHz ns ns ns ns CLK “H” or “L” Test conditions CL = 30 pF CL = 30 pF CLK D Q FROM (Input) TO (Output) VCC = 2.5±0.2 V Item Maximum clock frequency Propagation delay time Setup time Hold time Pulse width Symbol fmax tPLH, tPHL tsu th tw Min 160 2.3 1.4 0.4 2.5 Typ      Max  7.0    Unit MHz ns ns ns ns CLK “H” or “L” Test conditions CL = 30 pF CL = 30 pF CLK D Q FROM (Input) TO (Output) VCC = 3.3±0.3 V Item Maximum clock frequency Propagation delay time Setup time Hold time Pulse width Symbol fmax tPLH, tPHL tsu th tw Min 160 2.0 1.3 1.0 2.5 Typ Typ      Max Max  5.0    Unit MHz ns ns ns ns CLK “H” or “L” Test conditions CL = 50 pF CL = 50 pF CLK D Q FROM (Input) TO (Output) VCC = 5.0±0.5 V Item Maximum Maximum clock frequency Propagation Propagation delay time Setup time Hold time Pulse width Symbol fmax max tPLH, tPHL tsu th tw Min Min 160 1.3 1.2 0.5 2.5 Typ      Max  4.5    Unit MHz ns ns ns ns CLK “H” or “L” Test conditions CL = 50 pF CL = 50 pF CLK D Q FROM (Input) TO (Output) Operating Characteristics Item Power dissipation capacitance Symbol CPD VCC (V) 1.8 2.5 3.3 5.0 Min — — — — Ta = 25°C Typ 20 21 22 26 Max — — — — Unit pF Test Conditions f = 10 MHz Rev.1.00 Feb 23, 2006 page 5 of 8 RD74LVC1G79 Test Circuit VCC Input Pulse Generator Zout = 50 Ω Input D Q Output Q Pulse Generator Zout = 50 Ω CLK CL RL Note: CL includes probe and jig capacitance. Rev.1.00 Feb 23, 2006 page 6 of 8 RD74LVC1G79 • Waveform - 1 tr 90 % 10 % t su Vref th 90 % tf VI 10 % GND Timming input Data input VI Vref tw VI Vref GND Input Vref Vref GND • Waveform - 2 tr 90 % Vref 90 % tf VI 10 % t PLH GND Input 10 % VOH Same-phase output t PHL VOH Opposite-phase output Vref VOL Vref VOL VCC (V) VI 1.8±0.15 2.5±0.2 3.3±0.3 5.0±0.5 INPUTS tr / tf Vref VCC / 2 VCC / 2 1.5 V VCC / 2 CL 30 pF 30 pF 50 pF 50 pF RL VCC VCC 3V VCC Rev.1.00 Feb 23, 2006 page 7 of 8 RD74LVC1G79 Package Dimensions JEITA Package Code RENESAS Code SXBG0005LB-A Previous Code TBS-5CV MASS[Typ.] 0.001g D ZD e C ZE B E B e A Pin #1 index 1 C 2 5×φb φx M C A B φx M C C Seating plane A1 A2 Reference Symbol Dimension in Millimeters Min Nom Max 0.40 0.110 0.140 (0.235) * 0.15 0.70 1.10 0.40 0.05 0.05 0.15 0.15 0.19 A A1 A2 yC *Reference value. A b D E e x y ZD ZE Rev.1.00 Feb 23, 2006 page 8 of 8 Sales Strategic Planning Div. Keep safety first in your circuit designs! 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