RD74LVC240BTELL

RD74LVC240B Octal Buffers / Line Drivers with 3-state Outputs REJ03D0219–0200 Rev.2.00 Feb. 17, 2005 Description The RD74LVC240B has eight inverter drivers with three state outputs in a 20 pin package. This device is a inverting buffer and has two active low enables (1G and 2G). Each enable independently controls four buffers. Low voltage and high speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. Features • • • • • • VCC = 1.65 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) High output current ±4 mA (@VCC = 1.65 V) ±8 mA (@VCC = 2.3 V) ±12 mA (@VCC = 2.7 V) ±24 mA (@VCC = 3.0 V to 5.5 V) • Ordering Information Part Name RD74LVC240BFPEL RD74LVC240BTELL Package Type SOP–20 pin (JEITA) TSSOP–20 pin Package Code (Previous Code) PRSP0020DD–B (FP–20DAV) PTSP0020JB–A (TTP–20DAV) Package Abbreviation FP T Taping Abbreviation (Quantity) EL (2,000 pcs/reel) ELL (2,000 pcs/reel) Function Table Inputs G H L L H: High level L: Low level X: Immaterial Z: High impedance A X H L Output Y Z L H Rev.2.00 Feb. 17, 2005 page 1 of 8 RD74LVC240B Pin Arrangement 1G 1 1A1 2 2Y4 3 1A2 4 2Y3 5 1A3 6 2Y2 7 1A4 8 2Y1 9 GND 10 20 VCC 19 2G 18 1Y1 17 2A4 16 1Y2 15 2A3 14 1Y3 13 2A2 12 1Y4 11 2A1 (Top view) Absolute Maximum Ratings Item Supply voltage Input diode current Input voltage Output diode current Output voltage Output current VCC, GND current / pin Storage temperature Symbol VCC IIK VI IOK VO IO ICC or IGND Tstg Ratings –0.5 to 7.0 –50 –0.5 to 7.0 –50 50 –0.5 to VCC +0.5 –0.5 to 6.0 ±50 100 –65 to +150 Unit V mA V mA mA V V mA mA °C VO = –0.5 V VO = VCC +0.5 V Output "H" or "L" Output "Z" or VCC:OFF VI = –0.5 V Conditions Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Rev.2.00 Feb. 17, 2005 page 2 of 8 RD74LVC240B Recommended Operating Conditions Item Supply voltage Input / Output voltage Symbol VCC VI VO Operating temperature Output current Ta IOH Ratings 1.5 to 5.5 1.65 to 5.5 0 to 5.5 0 to VCC 0 to 5.5 –40 to 85 –4 –8 –12 –24 IOL 4 8 12 24 Input rise / fall time*1 tr, tf 20 10 Notes: 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. ns/V mA °C mA VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V to 5.5 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V to 5.5 V VCC = 1.65 V to 2.7 V VCC = 3.0 V to 5.5 V V Unit V Conditions Data hold At operation G, A Output “H” or “L” Output “Z” or VCC: OFF Rev.2.00 Feb. 17, 2005 page 3 of 8 RD74LVC240B Electrical Characteristics Ta = –40 to 85°C Item Input voltage Symbol VIH VCC (V) 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 Output voltage VOH 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 VOL 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 Input current Output leak current Off state output current Quiescent supply current IIN IOFF IOZ ICC ∆ICC 0 to 5.5 0 2.7 to 5.5 2.7 to 3.6 2.7 to 5.5 2.7 to 3.6 Min VCC×0.65 1.7 2.0 VCC×0.7 — — — — VCC–0.2 1.2 1.7 2.2 2.4 2.2 3.8 — — — — — — — — — — — — Max — — — — VCC×0.35 0.7 0.8 VCC×0.3 — — — — — — — 0.2 0.45 0.7 0.4 0.55 0.55 ±5.0 ±5.0 ±5.0 ±5.0 5.0 500 µA µA µA µA µA VIN = 5.5 V or GND VIN/ VOUT = 5.5 V VIN = VCC or GND VO = 5.5 V or GND VIN = 3.6 V to 5.5 V VIN = VCC or GND VIN = one input at (VCC–0.6)V, other inputs at VCC or GND V IOL = 100 µA IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 24 mA IOH = –24 mA V IOH = –100 µA IOH = –4 mA IOH = –8 mA IOH = –12 mA V Unit V Test Conditions Rev.2.00 Feb. 17, 2005 page 4 of 8 RD74LVC240B Switching Characteristics Ta = –40 to 85°C Item Propagation delay time Symbol tPLH tPHL VCC (V) 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 Output enable time tZH tZL 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 Output disable time tHZ tLZ 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 Between output pins skew* 1 From Unit ns A (Input) Y To (Output) Min 1.0 1.0 1.0 1.5 1.0 1.0 1.0 1.0 1.5 1.0 1.0 1.0 1.0 1.5 1.0 — — — — — — — Typ — — — — — — — — — — — — — — — — — — — — 4.0 8.0 Max 10.9 7.9 6.9 5.9 4.4 12.6 9.6 8.6 7.6 6.1 12.1 7.8 6.8 6.5 5.5 — — — 1.0 1.0 — — ns G Y ns G Y tOSLH tOSHL 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 ns Input capacitance Output capacitance Note: CIN CO 3.3 3.3 pF pF 1. This parameter is characterized but not tested. tOSLH = | tPLHm – tPLHn|, tOSHL = | tPHLm – tPHLn| Operating Characteristics Ta = 25°C Item Power dissipation Capacitance Symbol CPD VCC (V) 1.8 2.5 3.3 5.0 Min — — — — Typ 25 25 27 32 Max — — — — Unit pF Test conditions f = 10 MHz Rev.2.00 Feb. 17, 2005 page 5 of 8 RD74LVC240B Test Circuit VCC VCC 1G, 2G Output RL S1 OPEN V TT GND See Function Table Input 1Y1 to 2Y4 CL 1A1 to 2A4 RL Pulse generator Zout = 50 Ω Symbol t PLH / t PHL t ZH/ t HZ t ZL / t LZ S1 OPEN GND V TT Note: 1. CL includes probe and jig capacitance. Rev.2.00 Feb. 17, 2005 page 6 of 8 RD74LVC240B Waveforms – 1 tf Input A 90 % Vref tr 90 % 10 % t PLH Output Y Vref 10 % t PHL VOH Vref VOL VIH GND Notes: 1. tr = 2.5 ns, tf = 2.5 ns 2. Input waveform : PRR = 10 MHz, duty cycle 50% Waveforms – 2 tf Input G 90 % Vref 10 % t ZL Waveform - A t ZH Waveform - B Vref Vref t HZ VOH – ∆ V tr 90 % Vref 10 % t LZ VIH GND ≈ 1/2VTT VOL + ∆ V VOL VOH ≈ GND INPUTS VCC (V) VCC = 1.8±0.15 V VCC = 2.5±0.2 V VCC = 2.7 V VCC = 3.3±0.3 V VCC = 5.0±0.5 V VI VCC VCC tr/tf Vref VTT CL 30 pF 30 pF 50 pF 50 pF 50 pF RL 1.0 kΩ 500 Ω 500 Ω 500 Ω 500 Ω ∆V 0.15 V 0.15 V 0.3 V 0.3 V 0.3 V ≤ 2 ns 1/2 VCC 2× VCC ≤ 2 ns 1/2 VCC 2× VCC 1.5 V 1.5 V 6V 6V 2.7 V ≤ 2.5 ns 2.7 V ≤ 2.5 ns VCC ≤ 2.5 ns 1/2 VCC 2× VCC Notes: 1. Input waveform : PRR = 10 MHz, duty cycle 50% 2. Waveform – A shows input conditions such that the output is "L" level when enable by the output control. 3. Waveform – B shows input conditions such that the output is "H" level when enable by the output control. Rev.2.00 Feb. 17, 2005 page 7 of 8 RD74LVC240B Package Dimensions JEITA Package Code P-SOP20-5.5x12.6-1.27 RENESAS Code PRSP0020DD-B Previous Code FP-20DAV MASS[Typ.] 0.31g *1 D 11 F NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. 20 bp E HE Index mark Reference Symbol *2 c Dimension in Millimeters Min Nom 12.60 5.50 Max 13.0 Terminal cross section ( Ni/Pd/Au plating ) 1 Z e *3 D E A2 A1 0.00 10 bp x M L1 0.10 0.20 2.20 A bp b1 c c 1 0.34 0.40 0.46 0.15 0.20 0.25 A q HE 0° 7.50 7.80 1.27 8° 8.00 q y e x y A1 L 0.12 0.15 0.80 0.50 1 Detail F Z L L 0.70 1.15 0.90 JEITA Package Code P-TSSOP20-4.4x6.5-0.65 RENESAS Code PTSP0020JB-A Previous Code TTP-20DAV MASS[Typ.] 0.07g *1 D F 11 20 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. bp HE *2 E c Reference Symbol Dimension in Millimeters Min Nom 6.50 4.40 Max 6.80 Index mark Terminal cross section ( Ni/Pd/Au plating ) D E A2 A1 0.03 0.07 0.10 1.10 1 Z e *3 10 bp L1 x M A bp b1 c c1 0.10 0.15 0.15 0.20 0.25 0.20 q A HE 0° 6.20 6.40 0.65 8° 6.60 q A1 L y e x y 0.13 0.10 0.65 0.4 1 Detail F Z L L 0.5 1.0 0.6 Rev.2.00 Feb. 17, 2005 page 8 of 8 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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