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RD74LVC573B

RD74LVC573B

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

  • 描述:

    RD74LVC573B - Octal D-type Transparent Latches with 3-state Outputs - Renesas Technology Corp

  • 数据手册
  • 价格&库存
RD74LVC573B 数据手册
RD74LVC573B Octal D-type Transparent Latches with 3-state Outputs REJ03D0209–0100Z Rev.1.00 Apr.15.2004 Description The RD74LVC573B has eight D type latches with three state outputs in a 20-pin package. When the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Low voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. Features • • • • • • VCC = 1.65 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) High output current ±4 mA (@VCC = 1.65 V) ±8 mA (@VCC = 2.3 V) ±12 mA (@VCC = 2.7 V) ±24 mA (@VCC = 3.0 V to 5.5 V) • Ordering Information Part Name RD74LVC573BFPEL RD74LVC573BTELL Package Type Package Code Package Abbreviation FP T Taping Abbreviation (Quantity) EL (2,000 pcs / Reel) ELL (2,000 pcs / Reel) SOP-20 pin (JEITA) FP-20DAV TSSOP-20 pin TTP-20DAV Function Table Inputs OC L L L H H: L: X: Z: Q0 : LE H H L X D H L X X Output Q H L Q0 Z High level Low level Immaterial High impedance Level of Q before the indicated steady input conditions were established. Rev.1.00, Apr.15.2004, page 1 of 9 RD74LVC573B Pin Arrangement OC 1 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 GND 10 DQ DQ DQ DQ DQ DQ DQ DQ 20 VCC 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q 11 LE (Top view) Rev.1.00, Apr.15.2004, page 2 of 9 RD74LVC573B Absolute Maximum Ratings Item Supply voltage Input diode current Input voltage Output diode current Output voltage Output current VCC, GND current / pin Storage temperature Symbol VCC IIK VI IOK VO IO ICC or IGND Tstg Ratings –0.5 to 7.0 –50 –0.5 to 7.0 –50 50 –0.5 to VCC+0.5 –0.5 to 7.0 ±50 100 –65 to +150 Unit V mA V mA V mA mA °C Conditions VI = –0.5 V VO = –0.5 V VO = VCC+0.5 V Output "H" or "L" Output "Z" or VCC: OFF Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Supply voltage Input/output voltage Symbol VCC VI VO Ta IOH Ratings 1.5 to 5.5 1.65 to 5.5 0 to 5.5 0 to VCC 0 to 5.5 –40 to 85 –4 –8 –12 –24 4 8 12 24 20 10 Unit V V Conditions Data hold At operation OC, LE, D Output "H" or "L" Output "Z" or VCC: OFF VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V to 5.5 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V to 5.5 V VCC = 1.65 V to 2.7 V VCC = 3.0 V to 5.5 V Operating temperature Output current °C mA IOL mA Input rise / fall time*1 tr, tf ns/V Notes: 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Rev.1.00, Apr.15.2004, page 3 of 9 RD74LVC573B Electrical Characteristics Ta = –40 to 85°C Item Input voltage Symbol VIH VCC (V) 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 0 to 5.5 0 2.7 to 5.5 2.7 to 3.6 2.7 to 5.5 2.7 to 3.6 Min VCC×0.65 1.7 2.0 VCC×0.7 — — — — VCC–0.2 1.2 1.7 2.2 2.4 2.2 3.8 — — — — — — — — — — — — Max — — — — VCC×0.35 0.7 0.8 VCC×0.3 — — — — — — — 0.2 0.45 0.7 0.4 0.55 0.55 ±5.0 ±5.0 ±5.0 ±5.0 5.0 500 Unit V Test Conditions VIL Output voltage VOH V IOH = –100 µA IOH = –4 mA IOH = –8 mA IOH = –12 mA IOH = –24 mA IOL = 100 µA IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 24 mA VOL Input current Output leak current Off state output current Quiescent supply current IIN IOFF IOZ ICC ∆ICC µA µA µA µA µA µA VIN = 5.5 V or GND VIN / VOUT = 5.5 V VIN = VCC or GND VOUT = 5.5 V or GND VIN = 3.6 to 5.5 V VIN = VCC or GND VIN = one input at (VCC–0.6)V, other inputs at VCC or GND Rev.1.00, Apr.15.2004, page 4 of 9 RD74LVC573B Switching Characteristics Ta = –40 to 85°C Item Propagation delay time Symbol VCC (V) tPLH tPHL 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 3.3 3.3 Min 1.0 1.0 1.0 1.5 1.0 1.0 1.0 1.0 2.0 1.0 1.0 1.0 1.0 1.5 1.0 1.0 1.0 1.0 1.6 1.0 6.0 4.0 2.0 2.0 2.0 4.0 2.0 1.5 1.5 1.5 9.0 4.0 3.3 3.3 3.3 — — — — — — — Typ — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — 4.0 8.0 Max 19.1 9.6 7.7 6.9 5.4 22.8 10.5 8.4 7.7 6.2 20.0 10.5 8.5 7.5 6.0 19.3 7.8 7.0 6.5 5.5 — — — — — — — — — — — — — — — — — — 1.0 1.0 — — Unit ns From (Input) D To (Output) Q tPLH tPHL ns LE Q Output enable time tZH tZL ns OC Q Output disable time tHZ tLZ ns OC Q Setup time tsu ns Hold time th ns Pulse width tw ns Between output pins skew*1 tOSLH tOSHL ns Input capacitance Output capacitance Note: CIN CO pF pF 1. This parameter is characterized but not tested. tosLH = | tPLHm - tPLHn|, tosHL = | tPHLm - tPHLn| Rev.1.00, Apr.15.2004, page 5 of 9 RD74LVC573B Operating Characteristics Ta = 25°C Item Power dissipation capacitance Symbol CPD VCC (V) 1.8 2.5 3.3 5.0 Min     Typ 27 28 30 35 Max     Unit pF Test Conditions f = 10 MHz Test Circuit VCC VCC Output OC Input RL 1Q to 8Q CL RL S1 OPEN VTT Pulse generator Zout = 50 Ω Input See Function Table GND 1D to 8D Symbol t PLH / t PHL LE t su / t h / t w t ZH/ t HZ t ZL / t LZ S1 OPEN GND VTT Pulse generator Zout = 50 Ω Note: 1. CL includes probe and jig capacitance. Waveforms – 1 tr Input LE 10 % tr Input D 90 % 10 % t PLH Output Q Vref 90 % 90 % Vref 10 % tf 90 % 10 % t PHL Vref VOL Vref GND VIH GND VOH tf VIH Note: Input waveform: PRR = 10 MHz, duty cycle 50%. Rev.1.00, Apr.15.2004, page 6 of 9 RD74LVC573B Waveforms – 2 tr Input LE 90 % 10 % tr 90 % Input D Vref 10 % t PLH Output Q Vref 90 % Vref 10 % t PHL Vref VOL tf VIH GND VIH GND VOH Note: Input waveform: PRR = 10 MHz, duty cycle 50%. Waveforms – 3 tr Input LE 10 % 90 % 90 % Vref Vref tw ts Vref 10 % th VIH Input D Vref GND tf VIH GND Note: Input waveform: PRR = 10 MHz, duty cycle 50% Rev.1.00, Apr.15.2004, page 7 of 9 RD74LVC573B Waveforms – 4 tf Input OC 90 % Vref 10 % t ZL Waveform - A t ZH Waveform - B Vref Vref t HZ VOH – ∆V tr 90 % Vref 10 % t LZ VIH GND ≈1/2 V TT VOL + ∆V VOL VOH ≈GND INPUTS VIH VCC VCC 2.7 V 2.7 V VCC VCC (V) VCC = 1.8±0.15 V VCC = 2.5±0.2 V VCC = 2.7 V VCC = 3.3±0.3 V VCC = 5.0±0.5 V tr/tf ≤ 2 ns ≤ 2 ns ≤ 2.5 ns ≤ 2.5 ns ≤ 2.5 ns Vref 1/2 VCC 1/2 VCC 1.5 V 1.5 V 1/2 VCC VTT 2× VCC 2× VCC 6V 6V 2× VCC CL 30 pF 30 pF 50 pF 50 pF 50 pF RL 1.0 kΩ 500 Ω 500 Ω 500 Ω 500 Ω ∆V 0.15 V 0.15 V 0.3 V 0.3 V 0.3 V Notes: 1. Input waveform: PRR = 10 MHz, duty cycle 50% 2. Waveform – A shows input conditions such that the output is "L" level when enable by the output control. 3. Waveform – B shows input conditions such that the output is "H" level when enable by the output control. Rev.1.00, Apr.15.2004, page 8 of 9 RD74LVC573B Package Dimensions As of January, 2003 12.6 13 Max 20 Unit: mm 11 5.5 1 10 2.20 Max *0.20 ± 0.05 0.20 7.80 + 0.30 – 0.80 Max 1.15 1.27 *0.40 ± 0.06 0.10 ± 0.10 0˚ – 8 ˚ 0.70 ± 0.20 0.15 0.12 M *Ni/Pd/Au plating Package Code JEDEC JEITA Mass (reference value) FP-20DAV — Conforms 0.31 g As of January, 2003 Unit: mm 6.50 6.80 Max 20 11 1 10 0.65 1.0 6.40 ± 0.20 0.65 Max *0.20 ± 0.05 0.13 M 4.40 *0.15 ± 0.05 1.10 Max 0.10 0.07 +0.03 –0.04 0˚ – 8˚ 0.50 ± 0.10 *Ni/Pd/Au plating Package Code JEDEC JEITA Mass (reference value) TTP-20DAV — — 0.07 g Rev.1.00, Apr.15.2004, page 9 of 9 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: (408) 382-7500 Fax: (408) 382-7501 Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: (1628) 585 100, Fax: (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: (89) 380 70 0, Fax: (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: 2265-6688, Fax: 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Tel: (2) 2715-2888, Fax: (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: (21) 6472-1001, Fax: (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: 6213-0200, Fax: 6278-8001 http://www.renesas.com © 2004. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .1.0
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