RD74LVC574B

RD74LVC574B Octal D-type Flip Flops with 3-state Outputs REJ03D0210–0100Z Rev.1.00 Apr.15.2004 Description The RD74LVC574B has eight edge trigger D type flip flops with three state outputs in a 20 pin package. Data at the D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock input. When the clock input goes low, data at the D inputs will be retained at the outputs until clock input returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Low voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. Features • • • • • • VCC = 1.65 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) High output current ±4 mA (@VCC = 1.65 V) ±8 mA (@VCC = 2.3 V) ±12 mA (@VCC = 2.7 V) ±24 mA (@VCC = 3.0 V to 5.5 V) • Ordering Information Part Name RD74LVC574BFPEL RD74LVC574BTELL Package Type Package Code Package Abbreviation FP T Taping Abbreviation (Quantity) EL (2,000 pcs / Reel) ELL (2,000 pcs / Reel) SOP-20 pin (JEITA) FP-20DAV TSSOP-20 pin TTP-20DAV Rev.1.00, Apr.15.2004, page 1 of 8 RD74LVC574B Function Table Inputs OC L L L H H: L: X: Z: ↑: Q0 : CK ↑ ↑ L X D H L X X Output Q H L Q0 Z High level Low level Immaterial High impedance Low to high transition Level of Q before the indicated steady input conditions were established. Pin Arrangement OC 1 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 GND 10 DQ CK DQ CK DQ CK DQ CK DQ CK DQ CK DQ CK DQ CK 20 VCC 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q 11 CK (Top view) Rev.1.00, Apr.15.2004, page 2 of 8 RD74LVC574B Absolute Maximum Ratings Item Supply voltage Input diode current Input voltage Output diode current Output voltage Output current VCC, GND current / pin Storage temperature Symbol VCC IIK VI IOK VO IO ICC or IGND Tstg Ratings –0.5 to 7.0 –50 –0.5 to 7.0 –50 50 –0.5 to VCC +0.5 –0.5 to 7.0 ±50 100 –65 to +150 Unit V mA V mA V mA mA °C Conditions VI = –0.5 V VO = –0.5 V VO = VCC+0.5 V Output "H" or "L" Output "Z" or VCC:OFF Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Supply voltage Input / output voltage Symbol VCC VI VO Ta IOH Ratings 1.5 to 5.5 1.65 to 5.5 0 to 5.5 0 to VCC 0 to 5.5 –40 to 85 –4 –8 –12 –24 4 8 12 24 20 10 Unit V V Conditions Data hold At operation OC, CK, D Output "H" or "L" Output "Z" or VCC:OFF VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V to 5.5 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V to 5.5 V VCC = 1.65 V to 2.7 V VCC = 3.0 V to 5.5 V Operating temperature Output current °C mA IOL mA Input rise / fall time *1 tr, tf ns/V Notes: 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Rev.1.00, Apr.15.2004, page 3 of 8 RD74LVC574B Electrical Characteristics Ta = –40 to 85°C Item Input voltage Symbol VIH VCC (V) Min Max — — — — VCC×0.35 0.7 0.8 VCC×0.3 — — — — — — — 0.2 0.45 0.7 0.4 0.55 0.55 ±5.0 ±5.0 ±5.0 ±5.0 5.0 500 Unit V Test Conditions 1.65 to 1.95 VCC×0.65 2.3 to 2.7 1.7 2.7 to 3.6 4.5 to 5.5 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 0 to 5.5 0 2.7 to 5.5 2.7 to 3.6 2.7 to 5.5 2.7 to 3.6 2.0 VCC×0.7 — — — — VCC–0.2 1.2 1.7 2.2 2.4 2.2 3.8 — — — — — — — — — — — — VIL Output voltage VOH V IOH = –100 µA IOH = –4 mA IOH = –8 mA IOH = –12 mA IOH = –24 mA IOL = 100 µA IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 24 mA VOL Input current Output leak current Off state output current Quiescent supply current IIN IOFF IOZ ICC ∆ICC µA µA µA µA µA µA VIN = 5.5 V or GND VIN / VOUT = 5.5 V VIN = VCC or GND VOUT = 5.5 V or GND VIN = 3.6 to 5.5 V VIN = VCC or GND VIN = one input at(VCC–0.6)V, other inputs at VCC or GND Rev.1.00, Apr.15.2004, page 4 of 8 RD74LVC574B Switching Characteristics Ta = –40 to 85°C Item Maximum clock frequency Symbol VCC (V) fmax 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 3.3 3.3 Min — — — — — 1.0 1.0 1.0 2.2 1.0 1.0 1.0 1.0 1.5 1.0 1.0 1.0 1.0 1.7 1.0 6.0 4.0 2.0 2.0 2.0 4.0 2.0 1.5 1.5 1.5 9.0 4.0 3.3 3.3 3.3 — — — — — — — Typ — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — 4.0 8.0 Max 55.0 95.0 150.0 150.0 150.0 21.6 10.5 8.0 7.0 5.5 19.5 10.5 8.5 7.5 5.5 18.8 7.8 7.0 6.4 5.4 — — — — — — — — — — — — — — — — — — 1.0 1.0 — — Unit MHz From (Input) To (Output) Propagation delay time tPLH tPHL ns CK Q Output enable time tZH tZL ns OC Q Output disable time tHZ tLZ ns OC Q Setup time tsu ns Hold time th ns Pulse width tw ns Between output pins skew*1 tOSLH tOSHL ns Input capacitance Output capacitance Note: CIN CO pF pF 1. This parameter is characterized but not tested. tosLH = | tPLHm - tPLHn|, tosHL = | tPHLm - tPHLn| Rev.1.00, Apr.15.2004, page 5 of 8 RD74LVC574B Operating Characteristics Ta = 25°C Item Power dissipation capacitance Symbol CPD VCC (V) 1.8 2.5 3.3 5.0 Min     Typ 25 26 28 32 Max     Unit pF Test Conditions f = 10 MHz Test Circuit VCC VCC Output OC Input RL 1Q to 8Q CL RL S1 OPEN V TT GND Pulse generator Zout = 50 Ω Input See Function Table 1D to 8D Symbol t PLH / t PHL CK t su / t h / t w t ZH/ t HZ t ZL / t LZ S1 OPEN GND VTT Pulse generator Zout = 50 Ω Note: 1. CL includes probe and jig capacitance. Waveforms – 1 tr Input CK 10 % tr Input D 90 % 10 % t PLH Output Q Vref 90 % 90 % Vref 10 % tf 90 % 10 % t PHL Vref VOL tf VIH Vref GND VIH GND VOH Note: Input waveform: PRR = 10 MHz, duty cycle 50%. Rev.1.00, Apr.15.2004, page 6 of 8 RD74LVC574B Waveforms – 2 tr Input CK 10 % tw ts Input D Vref th VIH Vref GND 90 % 90 % Vref Vref 10 % tw tf VIH Vref GND Note: Input waveform: PRR = 10 MHz, duty cycle 50%. Waveforms – 3 tf 90 % Vref 10 % t ZL Waveform - A t ZH Waveform - B Vref Vref t HZ VOH – ∆V tr 90 % Vref 10 % t LZ VIH GND ≈ 1/2V TT VOL + ∆V VOL VOH ≈ GND INPUTS VIH VCC VCC 2.7 V 2.7 V VCC Input OC VCC (V) VCC = 1.8±0.15 V VCC = 2.5±0.2 V VCC = 2.7 V VCC = 3.3±0.3 V VCC = 5.0±0.5 V tr/tf ≤ 2 ns ≤ 2 ns ≤ 2.5 ns ≤ 2.5 ns ≤ 2.5 ns Vref 1/2 VCC 1/2 VCC 1.5 V 1.5 V 1/2 VCC VTT 2× VCC 2× VCC 6V 6V 2× VCC CL 30 pF 30 pF 50 pF 50 pF 50 pF RL 1.0 kΩ 500 Ω 500 Ω 500 Ω 500 Ω ∆V 0.15 V 0.15 V 0.3 V 0.3 V 0.3 V Notes: 1. Input waveform : PRR = 10 MHz, duty cycle 50%. 2. Waveform – A shows input conditions such that the output is "L" level when enable by the output control. 3. Waveform – B shows input conditions such that the output is "H" level when enable by the output control. Rev.1.00, Apr.15.2004, page 7 of 8 RD74LVC574B Package Dimensions As of January, 2003 12.6 13 Max 20 Unit: mm 11 5.5 1 10 2.20 Max *0.20 ± 0.05 0.20 7.80 + 0.30 – 0.80 Max 1.15 1.27 *0.40 ± 0.06 0.10 ± 0.10 0˚ – 8 ˚ 0.70 ± 0.20 0.15 0.12 M *Ni/Pd/Au plating Package Code JEDEC JEITA Mass (reference value) FP-20DAV — Conforms 0.31 g As of January, 2003 Unit: mm 6.50 6.80 Max 20 11 1 10 0.65 1.0 6.40 ± 0.20 0.65 Max *0.20 ± 0.05 0.13 M 4.40 *0.15 ± 0.05 1.10 Max 0.10 0.07 +0.03 –0.04 0˚ – 8˚ 0.50 ± 0.10 *Ni/Pd/Au plating Package Code JEDEC JEITA Mass (reference value) TTP-20DAV — — 0.07 g Rev.1.00, Apr.15.2004, page 8 of 8 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. 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