RJK03C1DPB-00-J5

Preliminary RJK03C1DPB Silicon N Channel Power MOS FET with Schottky Barrier Diode REJ03G1830-0310 Power Switching Rev.3.10 Sep 29, 2009 Features High speed switching Capable of 4.5 V gate drive Low drive current High density mounting Low on-resistance RDS(on) = 1.7 mΩ typ. (at VGS = 10 V) • Pb-free • Halogen-free • • • • • Outline RENESAS Package code: PTZZ0005DA-A (Package name: LFPAK) 5678 DDDD 5 4 4 G 3 12 1, 2, 3 4 5 Source Gate Drain SSS 123 Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel to Case Thermal Resistance Channel temperature Storage temperature Notes: 1. PW ≤ 10 μs, duty cycle ≤ 1% 2. Value at Tch = 25°C, Rg ≥ 50 Ω 3. Tc = 25°C Symbol VDSS VGSS ID ID(pulse) IDR IAP Note 2 EAR Note 2 Pch Note3 θch-C Tch Tstg Note1 Ratings 30 ±20 60 240 60 28 78.4 65 1.92 150 –55 to +150 Unit V V A A A A mJ W °C/W °C °C REJ03G1830-0310 Rev.3.10 Sep 29, 2009 Page 1 of 6 RJK03C1DPB Preliminary Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Gate Resistance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Notes: 4. Pulse test Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Rg Qg Qgs Qgd td(on) tr td(off) tf VDF trr Min 30 — — 1.2 — — — — — — — — — — — — — — — — Typ — — — — 1.7 2.2 120 6000 1230 550 0.5 42 18 16 18 19 75 15 0.39 40 Max — ±0.5 1 2.5 2.2 3.1 — — — — — — — — — — — — — — Unit V μA mA V mΩ mΩ S pF pF pF Ω nC nC nC ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = ±20 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, ID = 1 mA ID = 30 A, VGS = 10 V Note4 ID = 30 A, VGS = 4.5 V Note4 ID = 30 A, VDS = 10 V Note4 VDS = 10 V, VGS = 0, f = 1 MHz VDD = 10 V, VGS = 4.5 V, ID = 60 A VGS = 10 V, ID = 30 A, VDD ≅ 10 V, RL = 0.33 Ω, Rg = 4.7 Ω IF = 2 A, VGS = 0 Note4 IF = 60 A, VGS = 0 diF/ dt = 100 A/ μs REJ03G1830-0310 Rev.3.10 Sep 29, 2009 Page 2 of 6 RJK03C1DPB Preliminary Main Characteristics Power vs. Temperature Derating 80 1000 Maximum Safe Operation Area Pch (W) ID (A) 60 100 Channel Dissipation 1 ms Drain Current 40 10 PW = 10 ms DC a er Op 20 1 Operation in this area is limited by RDS(on) Tc = 25°C n tio 0 50 100 150 200 0.1 1 shot Pulse 0.1 1 10 100 Case Temperature Tc (°C) Drain to Source Voltage VDS (V) Typical Output Characteristics 100 4.5 V 10 V Pulse Test 2.8 V 100 Typical Transfer Characteristics VDS = 10 V Pulse Test ID (A) 60 2.6 V ID (A) Drain Current 80 80 60 Drain Current 40 2.4 V 40 25°C Tc = 75°C –25°C 20 20 VGS = 2.2 V 0 2 4 6 8 10 0 1 2 3 4 5 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current 10 Pulse Test Drain to Source Saturation Voltage VDS (on) (mV) 200 Pulse Test 3 150 VGS = 4.5 V 10 V 100 1 50 ID = 20 A 10 A 5A 0.3 0 0.1 20 1 3 10 30 100 300 1000 4 8 12 16 Gate to Source Voltage VGS (V) Drain Current ID (A) REJ03G1830-0310 Rev.3.10 Sep 29, 2009 Page 3 of 6 RJK03C1DPB Static Drain to Source on State Resistance vs. Temperature 10 Pulse Test 10000 3000 Preliminary Typical Capacitance vs. Drain to Source Voltage Ciss Capacitance C (pF) 8 1000 Coss 300 100 30 VGS = 0 f = 1 MHz 10 20 30 Crss 6 ID = 5 A, 10 A, 20 A VGS = 4.5 V 2 10 V 0 –25 0 25 50 5 A, 10 A, 20 A 75 100 125 150 4 10 0 Case Temperature Tc (°C) Drain to Source Voltage VDS (V) Reverse Drain Current vs. Source to Drain Voltage Dynamic Input Characteristics VDS (V) VGS VDD = 25 V 10 V 16 Reverse Drain Current IDR (A) ID = 60 A VGS (V) 50 20 100 Pulse Test 10 V 80 5V 40 Drain to Source Voltage 30 VDS 20 12 Gate to Source Voltage 60 8 40 VGS = 0, –5V 10 VDD = 25 V 10 V 0 40 80 120 160 4 20 0 0 200 0 0.4 0.8 1.2 1.6 2.0 Gate Charge Qg (nc) Source to Drain Voltage VSD (V) Maximum Avalanche Energy vs. Channel Temperature Derating Repetitive Avalanche Energy EAR (mJ) 100 80 60 40 20 0 25 50 75 100 125 150 Channel Temperature Tch (°C) REJ03G1830-0310 Rev.3.10 Sep 29, 2009 Page 4 of 6 RJK03C1DPB Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C 1 D=1 0.3 Preliminary 0.5 0.2 0.1 0.1 0.03 0.05 2 0.0 lse 01 t pu 0. o h 1s 1m 10 m PDM PW T 100 m 1 D= PW T 0.01 10 Pulse Width PW (s) Avalanche Test Circuit Avalanche Waveform 1 2 L • IAP2 • VDSS VDSS – VDD V(BR)DSS IAP VDD VDS VDS Monitor L IAP Monitor EAR = Rg D. U. T ID Vin 15 V 0 VDD Switching Time Test Circuit Vin Monitor D.U.T. Rg RL VDS = 10 V Vin Vout Vin 10 V Vout Monitor Switching Time Waveform 90% 10% 10% 10% 90% td(on) tr 90% td(off) tf REJ03G1830-0310 Rev.3.10 Sep 29, 2009 Page 5 of 6 RJK03C1DPB Preliminary Package Dimensions Package Name LFPAK JEITA Package Code SC-100 RENESAS Code PTZZ0005DA-A Previous Code LFPAKV MASS[Typ.] 0.080g Unit: mm 4.9 5.3 Max 4.0 ± 0.2 5 0.25 –0.03 +0.05 3.3 1.0 3.95 1 4 6.1 –0.3 +0.1 0° – 8° 1.1 Max +0.03 0.07 –0.04 0.75 Max 1.27 0.10 0.40 ± 0.06 0.25 M 0.6 –0.20 1.3 Max +0.25 0.20 –0.03 +0.05 (Ni/Pd/Au plating) Ordering Information Part No. RJK03C1DPB-00-J5 Quantity 2500 pcs Taping Shipping Container REJ03G1830-0310 Rev.3.10 Sep 29, 2009 Page 6 of 6 4.2 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. 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