RJK03P7DPA-00#J5A

Preliminary Datasheet RJK03P7DPA MOS1 30 V, 15 A, 9.4 mΩ max. MOS2 30 V, 30 A, 5.3 mΩ max. Built in SBD Dual N-channel Power MOS FET High Speed Power Switching R07DS0906EJ0110 Rev.1.10 Nov 01, 2012 Features      Low on-resistance Capable of 4.5 V gate drive High density mounting Pb-free Halogen-free Outline RENESAS Package code: PWSN0008DD-B (Package name: WPAK-D(3)) 2 3 4 D1 D1 D1 9 S1/D2 5 6 7 8 5 6 7 8 1 G1 8 G2 9 1, 8 Gate 2, 3, 4, 9 Drain 5, 6, 7, 9 Source 4 3 2 1 4 S2 S2 S2 5 6 7 MOS1 3 2 1 (Bottom View) MOS2 and Schottky Barrier Diode Absolute Maximum Ratings (Ta = 25°C) Ratings Item Drain to source voltage Gate to source voltage Drain current Drain peak current Reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Symbol MOS1 MOS2 Unit VDSS VGSS ID 30 ±20 15 30 ±20 30 V V A 60 15 8.5 7.23 10 150 –55 to +150 120 30 12 14.4 20 150 –55 to +150 A A A mJ W °C °C Note1 ID(pulse) IDR IAP Note 2 EAS Note 2 Pch Note3 Tch Tstg Notes: 1. PW  10 s, duty cycle  1% 2. Value at Tch = 25C, Rg  50  3. Tc=25C R07DS0906EJ0110 Rev.1.10 Nov 01, 2012 Page 1 of 10 RJK03P7DPA Preliminary Electrical Characteristics • MOS1 (Ta = 25°C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Gate Resistance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Rg Qg Qgs Qgd td(on) tr td(off) tf VDF trr Min 30 — — 1.2 — — — — — — — — — — — Typ — — — — 7.8 9.7 36 850 150 80 1.55 7.1 2.3 2.0 2.8 Max — ±0.5 1 2.5 9.4 12.6 — 1190 — — 3.1 — — — — Unit V A A V m m S pF pF pF  nC nC nC ns — — — — — 1.7 12.6 3.5 0.84 8.1 — — — 1.09 — ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = ±20 V, VDS = 0 VDS = 24 V, VGS = 0 VDS = 10 V, I D = 1 mA ID = 7.5 A, VGS = 10 V Note4 ID = 7.5 A, VGS = 4.5 V Note4 ID = 7.5 A, VDS = 5 V Note4 VDS = 10 V VGS = 0 f = 1MHz VDD = 10 V VGS = 4.5 V ID = 15 A VGS =10 V, ID = 7.5 A VDD  10 V RL = 1.3  Rg = 4.7  IF = 15 A, VGS = 0 Note4 IF =15 A, VGS = 0 diF/ dt = 500 A/s Notes: 4. Pulse test R07DS0906EJ0110 Rev.1.10 Nov 01, 2012 Page 2 of 10 RJK03P7DPA Preliminary • MOS2 (Ta = 25°C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Gate Resistance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Rg Qg Qgs Qgd td(on) tr td(off) Fall time Schottky Barrier diode forward voltage tf VF Body–drain diode reverse recovery time trr Min 30 — — 1.2 — — — — — — — — — — — — — Typ — — — — 4.4 5.4 65 2110 345 210 1.5 16.5 5.3 5.5 4.7 2.9 35.2 Max — ±0.5 1 2.5 5.3 7.0 — 2950 — — 3.0 — — — — — — Unit V A mA V m m S pF pF pF  nC nC nC ns ns ns — — — 11.4 0.46 6.6 — — — ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = ±20 V, VDS = 0 VDS = 24 V, VGS = 0 VDS = 10 V, I D =1 mA ID =15 A, VGS = 10 V Note4 ID = 15 A, VGS = 4.5 V Note4 ID = 15 A, VDS = 5 V Note4 VDS = 10 V VGS = 0 f = 1MHz VDD = 10 V VGS = 4.5 V ID = 30 A VGS = 10 V, ID = 15 A VDD  10 V RL = 0.7  Rg = 4.7  IF = 2 A, VGS = 0 Note4 IF = 30 A, VGS = 0 diF/ dt = 500 A/s Notes: 4. Pulse R07DS0906EJ0110 Rev.1.10 Nov 01, 2012 Page 3 of 10 RJK03P7DPA Preliminary Main Characteristics • MOS1 Power vs. Temperature Derating Maximum Safe Operation Area 1000 Drain Current ID (A) Channel Dissipation Pch (W) 20 15 10 5 0 50 100 150 1 10 m s 200 1 this area is DS(on) 10 Drain to Source Voltage VDS (V) Typical Output Characteristics Typical Transfer Characteristics 20 Pulse Test Drain Current ID (A) 16 2.8 V 12 2.6 V 8 4 16 VDS = 5 V Pulse Test 12 8 4 25°C Tc = 75°C VGS = 2.4 V 4 6 –25°C 8 0 10 1 2 3 5 4 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source On State Resistance vs. Drain Current Pulse Test 150 100 ID = 10 A 50 5A 2A 4 8 12 16 20 Gate to Source Voltage VGS (V) R07DS0906EJ0110 Rev.1.10 Nov 01, 2012 Static Drain to Source On State Resistance RDS(on) (mΩ) Drain to Source Saturation Voltage VDS(on) (mV) 2 200 0 100 Case Temperature Tc (°C) 4.5 V 10 V 3.0V 0 s 10 Tc = 25 °C 0.1 1 shot Pulse 0.1 1 20 Drain Current ID (A) 100 100 Pulse Test 30 10 VGS = 4.5 V 10 V 3 1 1 3 10 30 100 300 1000 Drain Current ID (A) Page 4 of 10 Preliminary Static Drain to Source On State Resistance vs. Temperature Typical Capacitance vs. Drain to Source Voltage 20 10000 Pulse Test 3000 Capacitance C (pF) ID = 2 A, 5 A, 10 A 16 12 VGS = 4.5 V 8 2 A, 5 A, 10 A 10 V 4 50 0 25 50 75 Crss VGS = 0 f = 1 MHz 10 20 30 Drain to Source Voltage VDS (V) Dynamic Input Characteristics Reverse Drain Current vs. Source to Drain Voltage 20 40 16 VDS VDD = 25 V 10 V 12 VGS 20 10 8 4 VDD = 25 V 10 V 0 0 Coss 100 Case Temperature Tc (°C) ID = 15 A 30 300 10 0 100 125 150 4 8 12 0 20 16 Gate Charge Qg (nc) 50 Reverse Drain Current IDR (A) 0 –25 Ciss 1000 30 Gate to Source Voltage VGS (V) Drain to Source Voltage VDS (V) Static Drain to Source On State Resistance RDS(on) (mΩ) RJK03P7DPA Pulse Test 10 V 40 5V 30 20 VGS = 0, –5 V 10 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage VSD (V) Maximum Avalanche Energy vs. Channel Temperature Derating Avalanche Energy EAS (mJ) 10 IAP = 8.5 A VDD = 15 V duty < 0.1% Rg ≥ 50 Ω 8 6 4 2 0 25 50 75 100 125 150 Channel Temperature Tch (°C) R07DS0906EJ0110 Rev.1.10 Nov 01, 2012 Page 5 of 10 RJK03P7DPA Preliminary Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 1 D=1 0.5 0.3 0.2 0.1 0.05 2 0.0 e 1 uls 0.0 t p ho 1s 0.1 0.03 θch – c(t) = γs (t) • θch – c θch – c = 12.5°C/W, Tc = 25°C PDM D= PW T PW T 0.01 1m 10 m 100 m 1 10 Pulse Width PW (S) Avalanche Test Circuit Avalanche Waveform EAS = L VDS Monitor 1 L • IAP2 • 2 VDSS VDSS – VDD IAP Monitor V(BR)DSS IAP Rg VDS VDD D. U. T ID Vin 15 V 0 VDD Switching Time Test Circuit Switching Time Waveform Vout Monitor Vin Monitor 90% D.U.T. Rg RL Vin Vout Vin 10 V 10% 10% VDS = 10 V 90% td(on) R07DS0906EJ0110 Rev.1.10 Nov 01, 2012 10% tr 90% td(off) tf Page 6 of 10 RJK03P7DPA Preliminary • MOS2 and Schottky Barrier Diode Power vs. Temperature Derating Maximum Safe Operation Area 30 20 10 PW = 10 ms Operation in this area is limited by RDS(on) tio 150 0.1 0.1 200 n 100 1 10 Drain to Source Voltage VDS (V) Typical Output Characteristics Typical Transfer Characteristics 50 2.7 V 4.5 V 10 V Pulse Test Drain Current ID (A) 40 2.6 V 30 2.5 V 20 10 40 VDS = 5 V Pulse Test 30 20 10 25°C Tc = 75°C VGS = 2.4 V 4 6 8 10 0 1 2 3 4 5 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source On State Resistance vs. Drain Current Pulse Test 150 100 ID = 20 A 50 10 A 5A 4 8 12 16 Gate to Source Voltage VGS (V) R07DS0906EJ0110 Rev.1.10 Nov 01, 2012 Static Drain to Source On State Resistance RDS(on) (mΩ) Drain to Source Saturation Voltage VDS(on) (mV) 2 –25°C 200 0 100 Case Temperature Tc (°C) 50 0 μs ra 50 μs pe 1 0 s Tc = 25 °C 1 shot Pulse 0 Drain Current ID (A) 1m 10 O 10 10 100 C Drain Current ID (A) 1000 D Channel Dissipation Pch (W) 40 100 Pulse Test 30 10 VGS = 4.5 V 10 V 3 1 1 3 10 30 100 300 1000 Drain Current ID (A) Page 7 of 10 Preliminary Static Drain to Source On State Resistance vs. Temperature Typical Capacitance vs. Drain to Source Voltage 10000 10 Pulse Test ID = 5 A, 10 A, 20 A 8 3000 Capacitance C (pF) Static Drain to Source On State Resistance RDS (on) (mΩ) RJK03P7DPA VGS = 4.5 V 6 4 5 A, 10 A, 20 A 10 V 2 1000 Coss 300 0 25 50 75 Case Temperature 10 0 100 125 150 Tc (°C) 16 VDD = 25 V 10 V 30 V DS 12 20 8 4 VDD = 25 V 10 V 0 0 10 20 30 40 50 Reverse Drain Current IDR (A) 40 0 20 30 50 Gate to Source Voltage VGS (V) Drain to Source Voltage VDS (V) VGS 10 10 Reverse Drain Current vs. Source to Drain Voltage 20 ID = 30 A VGS = 0 f = 1 MHz Drain to Source Voltage VDS (V) Dynamic Input Characteristics 50 Crss 100 30 0 –25 Ciss Pulse Test 10 V 40 5V 30 20 VGS = 0, –5 V 10 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage VSD (V) Gate Charge Qg (nc) Maximum Avalanche Energy vs. Channel Temperature Derating Avalanche Energy EAS (mJ) 35 IAP = 12 A VDD = 15 V duty < 0.1% Rg ≥ 50 Ω 30 15 10 5 0 25 50 75 100 125 150 Channel Temperature Tch (°C) R07DS0906EJ0110 Rev.1.10 Nov 01, 2012 Page 8 of 10 RJK03P7DPA Preliminary Normalized Transient Thermal Impedance vs. Pulse Width 3 1 D=1 0.5 0.3 0.2 0.1 θch – c (t) = γ s (t) • θch – c θch – c = 6.25°C/W, Tc = 25°C 0.1 0.05 D= PDM ho tp ul se 2 0.0 01 0. PW T 1s 0.03 PW T 0.01 1m 10 m 100 m 1 10 Pulse Width PW (S) Avalanche Test Circuit Avalanche Waveform EAS = L VDS Monitor 1 L • IAP2 • 2 VDSS VDSS – VDD IAP Monitor V(BR)DSS IAP Rg VDS VDD D. U. T ID Vin 15 V 0 VDD Switching Time Test Circuit Switching Time Waveform Vout Monitor Vin Monitor 90% D.U.T. Rg RL Vin Vout Vin 10 V 10% 10% VDS = 10 V 90% td(on) R07DS0906EJ0110 Rev.1.10 Nov 01, 2012 10% tr 90% td(off) tf Page 9 of 10 RJK03P7DPA Preliminary Package Dimensions JEITA Package Code ⎯ RENESAS Code PWSN0008DD-B 5.1 ± 0.2 Previous Code WPAK-D(3)V MASS[Typ.] 0.07g Unit : mm 0.5 ± 0.15 Package Name WPAK-D(3) 0.85 Max 0.47 ± 0.08 2.2 ± 0.2 (0.05) 0.945 ± 0.16 2.92 ± 0.22 0.5 ± 0.15 0.21 Typ 1.27 Typ 0.4 ± 0.15 0.05Max 0Min Stand-off 0.545Typ 0.45 ± 0.1 (0.6) (0.6) 1.1 ± 0.2 5.9 6.1 0.9 ± 0.15 3.92 ± 0.22 4.9 ± 0.1 (Sn plating) Ordering Information Orderable Part Number RJK03P7DPA-00-J5A Quantity 3000 pcs Shipping Container Taping Note: The symbol of 2nd "-" is occasionally presented as "#". R07DS0906EJ0110 Rev.1.10 Nov 01, 2012 Page 10 of 10 Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. 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