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RJK03P9DPA-00#J5A

RJK03P9DPA-00#J5A

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    WFDFN8

  • 描述:

    POWER, N-CHANNEL MOSFET

  • 数据手册
  • 价格&库存
RJK03P9DPA-00#J5A 数据手册
Preliminary Datasheet RJK03P9DPA MOS1 30 V, 20 A, 7.0 mΩ max. MOS2 30 V, 50 A, 2.2 mΩ max. Built in SBD Dual N-channel Power MOS FET High Speed Power Switching R07DS0907EJ0110 Rev.1.10 Nov 01, 2012 Features      Low on-resistance Capable of 4.5 V gate drive High density mounting Pb-free Halogen-free Outline RENESAS Package code: PWSN0008DD-B (Package name: WPAK-D(3)) 2 3 4 D1 D1 D1 9 S1/D2 5 6 7 8 5 6 7 8 1 G1 8 G2 9 1, 8 Gate 2, 3, 4, 9 Drain 5, 6, 7, 9 Source 4 3 2 1 4 S2 S2 S2 5 6 7 MOS1 3 2 1 (Bottom View) MOS2 and Schottky Barrier Diode Absolute Maximum Ratings (Ta = 25°C) Ratings Item Drain to source voltage Gate to source voltage Drain current Drain peak current Reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Symbol MOS1 MOS2 Unit VDSS VGSS ID 30 ±20 20 30 ±20 50 V V A 80 20 12 14.4 15 150 –55 to +150 200 50 22 48 35 150 –55 to +150 A A A mJ W °C °C Note1 ID(pulse) IDR IAP Note 2 EAS Note 2 Pch Note3 Tch Tstg Notes: 1. PW  10 s, duty cycle  1% 2. Value at Tch = 25C, Rg  50  3. Tc=25C R07DS0907EJ0110 Rev.1.10 Nov 01, 2012 Page 1 of 10 RJK03P9DPA Preliminary Electrical Characteristics • MOS1 (Ta = 25°C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Gate Resistance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Rg Qg Qgs Qgd td(on) tr td(off) tf VDF trr Min 30 — — 1.2 — — — — — — — — — — — Typ — — — — 5.8 8.4 35 1180 252 90 1.0 7.7 3.3 2.0 3.8 Max — ±0.1 1 2.5 7.0 10.9 — 1660 — — 2.2 — — — — Unit V A A V m m S pF pF pF  nC nC nC ns — — — — — 3.4 13.2 3.8 0.83 9.0 — — — 1.08 — ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = ±20 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, I D = 1 mA ID = 10 A, VGS = 10 V Note4 ID = 10 A, VGS = 4.5 V Note4 ID = 10 A, VDS = 5 V Note4 VDS = 10 V VGS = 0 f = 1MHz VDD = 10 V VGS = 4.5 V ID = 20 A VGS =10 V, ID = 10 A VDD  10 V RL = 1.0  Rg = 4.7  IF = 20 A, VGS = 0 Note4 IF =20 A, VGS = 0 diF/ dt = 500 A/s Notes: 4. Pulse test R07DS0907EJ0110 Rev.1.10 Nov 01, 2012 Page 2 of 10 RJK03P9DPA Preliminary • MOS2 (Ta = 25°C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Gate Resistance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Rg Qg Qgs Qgd td(on) tr td(off) Fall time Schottky Barrier diode forward voltage tf VF Body–drain diode reverse recovery time trr Min 30 — — 1.2 — — — — — — — — — — — — — Typ — — — — 1.8 2.1 115 4680 780 450 1.3 36.7 12.1 12.1 8.0 6.0 76.4 Max — ±0.5 1 2.5 2.2 2.7 — 6560 — — 2.6 — — — — — — Unit V A mA V m m S pF pF pF  nC nC nC ns ns ns — — — 24.8 0.40 10.0 — — — ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = ±20 V, VDS = 0 VDS = 24 V, VGS = 0 VDS = 10 V, I D =1 mA ID =25 A, VGS = 10 V Note4 ID = 25 A, VGS = 4.5 V Note4 ID = 25 A, VDS = 5 V Note4 VDS = 10 V VGS = 0 f = 1MHz VDD = 10 V VGS = 4.5 V ID = 50 A VGS = 10 V, ID = 25 A VDD  10 V RL = 0.4  Rg = 4.7  IF = 2 A, VGS = 0 Note4 IF = 50 A, VGS = 0 diF/ dt = 500 A/s Notes: 4. Pulse R07DS0907EJ0110 Rev.1.10 Nov 01, 2012 Page 3 of 10 RJK03P9DPA Preliminary Main Characteristics • MOS1 Power vs. Temperature Derating Maximum Safe Operation Area 1000 Drain Current ID (A) Channel Dissipation Pch (W) 20 15 10 5 0 50 100 150 10 10 10 DC 0 1m ms s 200 µs µs Op er Operation in at ion this area is limited by RDS(on) 1 Tc = 25 °C 0.1 1 shot Pulse 0.1 1 10 100 Case Temperature Tc (°C) Drain to Source Voltage VDS (V) Typical Output Characteristics Typical Transfer Characteristics 50 50 4.5 V 3.4 V 10 V Pulse Test 3.2 V 40 Drain Current ID (A) Drain Current ID (A) 10 100 3.0 V 30 2.8 V 20 10 VGS = 2.6 V VDS = 5 V Pulse Test 40 30 20 10 25°C Tc = 75°C –25°C Drain to Source Saturation Voltage VDS(on) (mV) 0 2 4 6 8 10 0 1 2 3 5 4 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source On State Resistance vs. Drain Current 100 160 Pulse Test Pulse Test 120 30 80 10 VGS = 4.5 V ID = 10 A 40 5A 10 V 3 2A 0 5 10 15 20 Gate to Source Voltage VGS (V) R07DS0907EJ0110 Rev.1.10 Nov 01, 2012 1 0.1 0.3 1 3 10 30 100 Drain Current ID (A) Page 4 of 10 RJK03P9DPA Preliminary Static Drain to Source On State Resistance vs. Temperature Typical Capacitance vs. Drain to Source Voltage 20 10000 Pulse Test Capacitance C (pF) 3000 16 ID = 2 A, 5 A, 10 A 12 VGS = 4.5 V 8 2 A, 5 A, 10 A 4 10 V 25 50 75 100 125 150 Crss 30 10 20 25 Dynamic Input Characteristics Reverse Drain Current vs. Source to Drain Voltage 40 20 VGS 16 VDD = 20 V 10 V 30 12 VDS 8 10 4 VDD = 20 V 10 V 0 0 Coss 100 Drain to Source Voltage VDS (V) ID = 20 A 20 300 Case Temperature Tc (°C) 6 12 18 0 30 24 50 Reverse Drain Current IDR (A) 50 0 Ciss VGS = 0 10 f = 1 MHz 0 Gate to Source Voltage VGS (V) Drain to Source Voltage VDS (V) 0 –25 1000 10 V Pulse Test 5V 40 30 20 VGS = 0, –5 V 10 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage VSD (V) Gate Charge Qg (nc) Maximum Avalanche Energy vs. Channel Temperature Derating Avalanche Energy E AS (mJ) 20 16 12 8 4 0 25 50 75 100 125 150 Channel Temperature Tch (°C) R07DS0907EJ0110 Rev.1.10 Nov 01, 2012 Page 5 of 10 RJK03P9DPA Preliminary Normalized Transient Thermal Impedance vs. Pulse Width 3 1 D=1 0.5 0.3 0.2 0.1 0.1 0.05 PDM D= 2 0.0 1 0 . 0 ho tp ul se 0.03 PW T PW 1s T 0.01 1m 10 m 100 m 1 10 Pulse Width PW (S) Avalanche Test Circuit Avalanche Waveform EAS = L VDS Monitor 1 L • IAP2 • 2 VDSS VDSS – VDD IAP Monitor V(BR)DSS IAP Rg VDS VDD D. U. T ID Vin 0 VDD Switching Time Test Circuit Switching Time Waveform Vout Monitor Vin Monitor 90% D.U.T. Rg RL Vin Vout Vin 10% 10% 10% VDS = 10 V 90% td(on) R07DS0907EJ0110 Rev.1.10 Nov 01, 2012 tr 90% td(off) tf Page 6 of 10 RJK03P9DPA Preliminary • MOS2 and Schottky Barrier Diode Power vs. Temperature Derating Maximum Safe Operation Area 1000 Drain Current ID (A) Channel Dissipation Pch (W) 40 30 20 10 10 DC 10 1m ms s Op er Operation in this area is limited by RDS(on) 1 at ion Tc = 25 °C 0 50 100 150 0.1 1 shot Pulse 0.1 1 200 100 10 Case Temperature Tc (°C) Drain to Source Voltage VDS (V) Typical Output Characteristics Typical Transfer Characteristics 50 50 4.5 V 10 V Pulse Test 2.7 V 40 Drain Current ID (A) Drain Current ID (A) 100 2.6 V 30 20 2.5 V 10 VGS = 2.4 V VDS = 5 V Pulse Test 40 30 20 10 25°C Tc = 75°C –25°C Drain to Source Saturation Voltage VDS(on) (mV) 0 2 4 6 10 8 0 1 2 3 5 4 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source On State Resistance vs. Drain Current 10 80 Pulse Test Pulse Test 60 3 VGS = 4.5 V 10 V 40 1 ID = 20 A 10 A 20 0.3 5A 0 0.1 4 8 12 16 20 Gate to Source Voltage VGS (V) R07DS0907EJ0110 Rev.1.10 Nov 01, 2012 1 3 10 30 100 300 1000 Drain Current ID (A) Page 7 of 10 RJK03P9DPA Preliminary Static Drain to Source On State Resistance vs. Temperature Typical Capacitance vs. Drain to Source Voltage 5 10000 Pulse Test Capacitance C (pF) 4 ID = 5 A, 10 A, 20 A 3 VGS = 4.5 V 2 5 A, 10 A, 20 A 10 V 1 25 50 75 Coss 300 Crss 100 30 VGS = 0 f = 1 MHz 10 20 25 Drain to Source Voltage VDS (V) Dynamic Input Characteristics Reverse Drain Current vs. Source to Drain Voltage 100 20 VGS 40 16 VDD = 25 V 10 V 12 VDS 20 8 10 4 VDD = 25 V 10 V 0 0 1000 Case Temperature Tc (°C) ID = 50 A 30 Ciss 10 0 100 125 150 20 40 60 80 0 100 Reverse Drain Current IDR (A) 50 0 Gate to Source Voltage VGS (V) Drain to Source Voltage VDS (V) 0 –25 3000 10 V 80 Pulse Test 5V 60 40 VGS = 0, –5 V 20 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage VSD (V) Gate Charge Qg (nc) Maximum Avalanche Energy vs. Channel Temperature Derating 100 Avalanche Energy E AS (mJ) 22 80 60 40 20 0 25 50 75 100 125 150 Channel Temperature Tch (°C) R07DS0907EJ0110 Rev.1.10 Nov 01, 2012 Page 8 of 10 RJK03P9DPA Preliminary Normalized Transient Thermal Impedance vs. Pulse Width 3 1 D=1 0.5 0.3 0.2 0.1 0.1 0.05 PDM PW T PW T 1s ho 0.03 D= tp ul se 2 0.0 1 0 0. 0.01 1m 10 m 100 m 1 10 Pulse Width PW (S) Avalanche Test Circuit Avalanche Waveform EAS = L VDS Monitor 1 L • IAP2 • 2 VDSS VDSS – VDD IAP Monitor V(BR)DSS IAP Rg VDS VDD D. U. T ID Vin 0 VDD Switching Time Test Circuit Switching Time Waveform Vout Monitor Vin Monitor 90% D.U.T. Rg RL Vin Vout Vin 10% 10% 10% VDS = 10 V 90% td(on) R07DS0907EJ0110 Rev.1.10 Nov 01, 2012 tr 90% td(off) tf Page 9 of 10 RJK03P9DPA Preliminary Package Dimensions JEITA Package Code ⎯ RENESAS Code PWSN0008DD-B 5.1 ± 0.2 Previous Code WPAK-D(3)V MASS[Typ.] 0.07g Unit : mm 0.5 ± 0.15 Package Name WPAK-D(3) 0.85 Max 0.47 ± 0.08 2.2 ± 0.2 (0.05) 0.945 ± 0.16 2.92 ± 0.22 0.5 ± 0.15 0.21 Typ 1.27 Typ 0.4 ± 0.15 0.05Max 0Min Stand-off 0.545Typ 0.45 ± 0.1 (0.6) (0.6) 1.1 ± 0.2 5.9 6.1 0.9 ± 0.15 3.92 ± 0.22 4.9 ± 0.1 (Sn plating) Ordering Information Orderable Part Number RJK03P9DPA-00-J5A Quantity 3000 pcs Shipping Container Taping Note: The symbol of 2nd "-" is occasionally presented as "#". R07DS0907EJ0110 Rev.1.10 Nov 01, 2012 Page 10 of 10 Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics 3. 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RJK03P9DPA-00#J5A 价格&库存

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