X9314WM

DATASHEET X9314 FN8178 Rev 3.00 July 24, 2014 Terminal Voltages ±5V, 32 Taps, Log Taper Single Digitally Controlled Potentiometer (XDCP™) The Intersil X9314 is a solid state nonvolatile potentiometer and is ideal for digitally controlled resistance trimming. Features • Solid State Potentiometer The X9314 is a resistor array composed of 31 resistive elements. Between each element and at either end are tap points accessible to the wiper element. The position of the wiper element is controlled by the CS, U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. • 32 Taps • 10kEnd to End Resistance • Three-Wire Up/Down Serial Interface • Wiper Resistance, 40Typical • Nonvolatile Storage and Recall on Power-up of Wiper Position Standby Current < 500µA Max (Total Package) The XDCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing. • VCC = 3V to 5.5V Operation • 100 Year Data Retention • Offered in 8 Ld MSOP and SOIC Packages • Pb-Free Plus Anneal Available (RoHS Compliant) Block Diagram U/D INC CS 5-Bit UP/DOWN COUNTER 31 VH/RH 30 29 5-Bit NONVOLATILE MEMORY 28 ONE OF THIRTY-TWO DECODER TRANSFER GATES RESISTOR ARRAY 2 STORE AND RECALL CONTROL CIRCUITRY VCC VSS FN8178 Rev 3.00 July 24, 2014 1 0 VL/RL VW/RW Page 1 of 8 X9314 Ordering Information PART NUMBER (Notes 1, 2) PART MARKING X9314WSIZ X9314W ZI X9314WSZ X9314W Z X9314WMIZ-3 DEX X9314WSZ-3 X9314W ZD VCC RANGE (V) RTOTAL (k) TEMP RANGE (°C) 5 ±10% 10 -40 to +85 8 Ld SOIC M8.15 0 to +70 8 Ld SOIC M8.15 -40 to +85 8 Ld MSOP M8.118 0 to +70 8 Ld SOIC M8.15 3 to 5.5 PACKAGE (Pb-Free) PKG. DWG. # NOTES: 1. Add "T1" suffix for tape and reel. 2. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pin Descriptions Pin Configuration X9314 8 LD SOIC TOP VIEW VH /RH and VL/ RL The high (VH/RH) and low (VL/RL) terminals of the X9314 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is -5V and the maximum is +5V. It should be noted that the terminology of VL/RL and VH /RH references the relative position of the terminal in relation to wiper movement direction selected by the U/D input and not the voltage potential on the terminal. INC 1 8 VCC U/D 2 7 CS VH/RH 3 6 VL/RL VSS 4 5 VW/RW X9314 VW /RW VW/RW is the wiper terminal, equivalent to the movable terminal of a mechanical potentiometer. The position of the wiper within the array is determined by the control inputs. The wiper terminal series resistance is typically 40. Up/ Down (U/D) The U/D input controls the direction of the wiper movement and whether the counter is incremented or decremented. Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete the X9314 will be placed in the low power standby mode until the device is selected once again. FN8178 Rev 3.00 July 24, 2014 X9314 8 LD MSOP TOP VIEW VH/RH VSS 1 8 2 VW/RW 3 VL/RL 4 X9314 U/D 7 INC 6 VCC 5 CS Pin Names SYMBOL DESCRIPTION VH/RH High Terminal VW/RW Wiper Terminal VL/RL Low Terminal VSS Ground VCC Supply Voltage U/D Up/Down Input INC Increment Input CS Chip Select Input Page 2 of 8 X9314 Typical Attenuation Characteristics (dB) ATTENUATION (dB) 0 -20 -40 -43.5 -60 31 28 24 20 16 12 8 0 4 TAP POSITION Principles of Operation Operation Notes There are three sections of the X9314: the input control, counter and decode section; the nonvolatile memory; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. Under the proper conditions the contents of the counter can be stored in nonvolatile memory and retained for future use. The resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. The system may select the X9314, move the wiper and deselect the device without having to store the latest wiper position in nonvolatile memory. The wiper movement is performed as described above; once the new position is reached, the system would keep the INC LOW while taking CS HIGH. The new wiper position would be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. The INC, U/D and CS inputs control the movement of the wiper along the resistor array. With CS set LOW the X9314 is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a five bit counter. The output of this counter is decoded to select one of thirty-two wiper positions along the resistive array. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. The value of the counter is stored in nonvolatile memory whenever CS transistions HIGH while the INC input is also HIGH. When the X9314 is powered down, the last counter position stored will be maintained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and the counter is reset to the value last stored. FN8178 Rev 3.00 July 24, 2014 This would allow the system to always power up to a preset value stored in nonvolatile memory; then during system operation minor adjustments could be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, etc. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the X9314 and then move the wiper up and down until the proper trim is attained. tIW/RTOTAL The electronic switches on the X9314 operate in a “make before break” mode when the wiper changes tap positions. If the wiper is moved several positions multiple taps are connected to the wiper for tIW (INC to VW change). The RTOTAL value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. Power-up and Down Requirement The are no restrictions on the sequencing of VCC and the voltages applied to the potentiometer pins during power-up or power-down conditions. During power-up, the data sheet parameters for the DCP do not fully apply until 1 millisecond after VCC reaches its final value. The VCC ramp rate spec is always in effect. Page 3 of 8 X9314 Absolute Maximum Ratings Recommended Operating Conditions Temperature under bias . . . . . . . . . . . . . . . . . . . . . .-65C to +135C Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Voltage on CS, INC, U/D, and VCC with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V Voltage on VH/RH and VL/RL referenced to VSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +8V V = |VH/RH - VL/RL| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10V Lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . . +300°C Wiper current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1mA IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±8.8mA Temperature (Commercial) . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C Temperature (Industrial). . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Supply Voltage (VCC) Limits X9314. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ± 10% X9314-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 5.5V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. Potentiometer Characteristics Across recommended operating conditions unless otherwise specified. LIMITS SYMBOL RTOTAL VVL/RL PARAMETER TEST CONDITIONS/NOTES MIN TYP End to End Resistance Tolerance UNITS ±20 % VH/RH Terminal Voltage -5 +5 V VL/RL Terminal Voltage -5 +5 V 10 mW 100  ±4.4 mA Power Rating at +25°C RW Wiper Resistance IW = ±1mA, VCC = 5V IW Wiper Current Noise Ref: 1kHz Relative variation. Error in step size between taps. log (Rw(n)) - log Rw(n - 1)) RTOTAL Temperature Coefficient for -40°C to +85°C 40 -120 0.070.003 dBV 0.07 + 0.003 ±600 Ratiometric Temperature Coefficient CH/CL/CW Note 4 MAX Potentiometer Capacitance ppm/°C ±20 See “Circuit #3 SPICE Macromodel” on page 5 10/10/25 ppm/°C pF © Copyright Intersil Americas LLC 2005-2014. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8178 Rev 3.00 July 24, 2014 Page 4 of 8 X9314 DC Electrical Specifications Across recommended operating conditions unless otherwise specified. LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN TYP (Note 3) MAX UNITS 1 3 mA ICC VCC Active Current CS = VIL, U/D = VIL or VIH and INC = 0.4V/2.4V at max. tCYC ISB Standby Supply Current CS = VCC - 0.3V, U/D and INC = VSS or VCC - 0.3V 500 µA ILI CS, INC, U/D Input Leakage Current VIN = VSS to VCC ±10 µA VIH CS, INC, U/D Input HIGH Voltage 2 VCC + 1 V VIL CS, INC, U/D Input LOW Voltage -1 0.8 V 10 pF CIN (Note 4) CS, INC, U/D Input Capacitance VCC = 5V, VIN = VSS, TA = +25°C, f = 1MHz NOTES: 3. Typical values are for TA = +25°C and nominal supply voltage. 4. This parameter is periodically sampled and not 100% tested. Standard Parts PART NUMBER MAXIMUM RESISTANCE WIPER INCREMENTS MINIMUM RESISTANCE X9314W 10k Log Taper 40 Test Circuit #1 Test Circuit #2 Circuit #3 SPICE Macromodel MACRO MODEL VH/RH VH/RH RTOTAL TEST POINT TEST POINT VW/RW RH CH VW/RW FORCE CURRENT CW 10pF VL/RL VL/RL CL RL 10pF 25pF RW SYMBOL TABLE A.C. Conditions of Test INPUT PULSE LEVELS 0V to 3V Input rise and fall times 10ns Input reference levels 1.5V Mode Selection CS INC U/D MODE WAVEFORM INPUTS OUTPUTS Must be steady Will be steady May change from Low to High Will change from Low to High May change from High to Low Will change from High to Low L H Wiper up L L Wiper down Don’t Care: Changes Allowed Changing: State Not Known H X Store wiper position N/A X X Standby Center Line is High Impedance L X No store, return to standby H FN8178 Rev 3.00 July 24, 2014 Page 5 of 8 X9314 AC Electrical Specifications Across recommended operating conditions unless otherwise specified. LIMITS SYMBOL PARAMETER MIN TYP(Note 5) MAX UNITS tCl CS to INC Setup 100 ns tlD INC HIGH to U/D Change 100 ns tDI U/D to INC Setup 2.9 µs tlL INC LOW Period 1 µs tlH INC HIGH Period 1 µs tlC INC Inactive to CS Inactive 1 µs tCPH CS Deselect Time 20 ms tIW INC to VW Change tCYC 100 INC Cycle Time tR, tF (Note 6) tPU (Note 6) tR VCC 500 µs 4 µs INC Input Rise and Fall Time 500 µs Power-up to Wiper Stable 500 µs 50 mV/µs VCC Power-up Rate 0.2 NOTES: 5. Typical values are for TA = +25°C and nominal supply voltage. 6. This parameter is periodically sampled and not 100% tested. A.C. Timing CS tCYC tIL tCI tIC tIH tCPH 90% 90% 10% INC tID tDI tF tR U/D tIW VW MI Note 7 NOTE: 7. MI in the A.C. timing diagram refers to the minimum incremental change in the VW output due to a change in the wiper position. FN8178 Rev 3.00 July 24, 2014 Page 6 of 8 X9314 Package Outline Drawing M8.118 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE Rev 4, 7/11 5 3.0±0.05 A DETAIL "X" D 8 1.10 MAX SIDE VIEW 2 0.09 - 0.20 4.9±0.15 3.0±0.05 5 0.95 REF PIN# 1 ID 1 2 B 0.65 BSC GAUGE PLANE TOP VIEW 0.55 ± 0.15 0.25 3°±3° 0.85±010 H DETAIL "X" C SEATING PLANE 0.25 - 0.36 0.08 M C A-B D 0.10 ± 0.05 0.10 C SIDE VIEW 1 (5.80) NOTES: (4.40) (3.00) 1. Dimensions are in millimeters. (0.65) (0.40) (1.40) TYPICAL RECOMMENDED LAND PATTERN FN8178 Rev 3.00 July 24, 2014 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSEY14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. 4. Plastic interlead protrusions of 0.15mm max per side are not included. 5. Dimensions are measured at Datum Plane "H". 6. Dimensions in ( ) are for reference only. Page 7 of 8 X9314 Package Outline Drawing M8.15 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 4, 1/12 DETAIL "A" 1.27 (0.050) 0.40 (0.016) INDEX 6.20 (0.244) 5.80 (0.228) AREA 0.50 (0.20) x 45° 0.25 (0.01) 4.00 (0.157) 3.80 (0.150) 1 2 8° 0° 3 0.25 (0.010) 0.19 (0.008) SIDE VIEW “B” TOP VIEW 2.20 (0.087) SEATING PLANE 5.00 (0.197) 4.80 (0.189) 1.75 (0.069) 1.35 (0.053) 1 8 2 7 0.60 (0.023) 1.27 (0.050) 3 6 4 5 -C- 1.27 (0.050) 0.51(0.020) 0.33(0.013) SIDE VIEW “A 0.25(0.010) 0.10(0.004) 5.20(0.205) TYPICAL RECOMMENDED LAND PATTERN NOTES: 1. Dimensioning and tolerancing per ANSI Y14.5M-1994. 2. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 3. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 5. Terminal numbers are shown for reference only. 6. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 7. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 8. This outline conforms to JEDEC publication MS-012-AA ISSUE C. FN8178 Rev 3.00 July 24, 2014 Page 8 of 8