X93156
DATASHEET
NOT RECOMMENDED FOR NEW DESIGNS
NO RECOMMENDED REPLACEMENT
contact our Technical Support Center at
1-888-INTERSIL or www.intersil.com/tsc
FN8182
Rev 3.00
November 21, 2007
Single Digitally Controlled Potentiometer (XDCP™) Low Noise, Low Power, 3 wire
Up/Down, 32 Taps
The Intersil X93156 is a three-terminal digitally controlled
potentiometer (XDCP). The device consists of a resistor
array, wiper switches, a control section, and nonvolatile
memory. The wiper position is controlled by an Up/Down
interface.
The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. The position of the wiper element is controlled by
the CS, U/D, and INC inputs. The position of the wiper can
be stored in a nonvolatile memory and then be recalled upon
a subsequent power-up operation.
The device can be used as a three-terminal potentiometer or
as a two terminal variable resistor in a wide variety of
applications including the programming of bias voltages,
LCD brightness and contrast control as well as the
implementation of ladder networks.
Features
• Solid-state potentiometer
• Up/Down interface
• 32 wiper tap points
- Wiper position stored in nonvolatile memory and
recalled on power-up
• 31 resistive elements
- Temperature compensated
- Maximum resistance tolerance of ±25%
- Terminal voltage, 0 to VCC
• Low power CMOS
- VCC = 2.7V to 5.5V
- Active current, 200µA typ.
- Standby current, 2µA max.
• High reliability
- Endurance 200,000 data changes per bit
- Register data retention, 100 years
• RTOTAL value = 12.5k50k
• Package
- 8 Ld MSOP
- Pb-free Available (RoHS compliant)
Pinout
X93156
(8 LD MSOP)
TOP VIEW
FN8182 Rev 3.00
November 21, 2007
INC
1
U/D
2
X93156
8
VCC
7
CS
RH
3
6
RL
VSS
4
5
Rw
Page 1 of 7
X93156
Ordering Information
PART
MARKING
VCC
RANGE (V)
RTOTAL
(k)
TEMP
RANGE (°C)
X93156WM8I
AGO
5 ±10%
12.5
-40 to +85
8 Ld MSOP
M8.118
X93156WM8I-2.7*
AGR
2.7 to 5.5
12.5
-40 to +85
8 Ld MSOP
M8.118
X93156UM8I-2.7*
AGP
2.7 to 5.5
50
-40 to +85
8 Ld MSOP
M8.118
X93156WM8IZ-2.7* (Note)
DCK
2.7 to 5.5
12.5
-40 to +85
8 Ld MSOP (Pb-free)
M8.118
X93156UM8IZ-2.7* (Note)
AKV
2.7 to 5.5
50
-40 to +85
8 Ld MSOP (Pb-free)
M8.118
X93156WM8IZ
DCJ
5 ±10%
12.5
-40 to +85
8 Ld MSOP (Pb-free)
M8.118
PART NUMBER
PKG.
DWG. #
PACKAGE
*Add “-T1” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
Block Diagram
VCC (SUPPLY VOLTAGE)
U/D
INC
CS
30k
5-BIT
UP/DOWN
COUNTER
30
29
RH
UP/DOWN
(U/D)
CONTROL
AND
MEMORY
INCREMENT
(INC)
RH
31
5-BIT
NONVOLATILE
MEMORY
RW
DEVICE SELECT
STORE AND
CONTROL
RECALL
CIRCUITRY
(CS)
RL
28
ONE
OF
THIRTY
TWO
DECODER
TRANSFER
GATES
RW
RESISTOR
ARRAY
2
1
VSS (GROUND)
GENERAL
VCC
0
VSS
RL
DETAILED
Pin Descriptions
MSOP
SYMBOL
1
INC
Increment (INC). The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or
decrement the counter in the direction indicated by the logic level on the U/D input.
BRIEF DESCRIPTION
2
U/D
Up/Down (U/D). The U/D input controls the direction of the wiper movement and whether the counter is incremented or
decremented.
3
RH
RH. The RH and RL pins of the X93156 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum
voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in
relation to wiper movement direction selected by the U/D input.
4
VSS
Ground.
5
Rw
RW. The Rw pin of the X93156 is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a
mechanical potentiometer.
6
RL
RL. The RH and RL pins of the X93156 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum
voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in
relation to wiper movement direction selected by the U/D input.
7
CS
Chip Select (CS). The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile
memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete, the X93156 will
be placed in the low power standby mode until the device is selected once again.
8
VCC
Supply Voltage.
FN8182 Rev 3.00
November 21, 2007
Page 2 of 7
X93156
Absolute Maximum Ratings
Thermal Information
Temperature under bias . . . . . . . . . . . . . . . . . . . . . .-65C to +135C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on CS, INC, U/D, RH, RL and VCC
with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to +6.5V
Maximum resistor current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2mA
Thermal Resistance (Typical, Note 1)
JA (°C/W)
8 Ld MSOP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
190
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature Range
Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage VCC
X93156xxx-2.7 . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V (Note 8)
X93156xxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ±10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Potentiometer Specifications Over recommended operating conditions unless otherwise stated.
SYMBOL
RTOT
VR
PARAMETER
TEST CONDITIONS/NOTES
End to end resistance
RH, RL terminal voltages
(Note 7)
Noise
Ref: 1kHz (Note 7)
Wiper Resistance
IW
Wiper Current
TYP
MAX
(Note 9)
UNIT
9.375
12.5
15.625
k
37.5
50
62.5
k
VCC
V
1
mW
0
Power rating
RW
MIN
(Note 9)
-120
(Note 6)
Resolution
CH/CL/CW
VH(n)(actual) - VH(n)(expected)
(Note 4)
Relative linearity (Note 3)
VH(n + 1) - [VH(n) + MI] (Note 4)
RTOTAL temperature coefficient
(Note 7)
Potentiometer capacitances
See circuit #2 (Note 7)
SYMBOL
ICC1
ICC2
ISB
ILI
VCC active current (Increment)
VCC active current (Store)
(EEPROM Store)
CS input leakage current
FN8182 Rev 3.00
November 21, 2007
±0.6
mA
%
±1
MI
±0.5
MI
±35
ppm/°C
10/10/25
pF
Over recommended operating conditions unless otherwise specified.
TYP
(Note 5)
MAX
(Note 9)
UNIT
CS = VIL, U/D = VIL or VIH and INC = 0.4V
@ max. tCYC VCC = 3V
50
250
µA
CS = VIL, U/D = VIL or VIH and INC = 0.4V
@ max. tCYC VCC = 5V
200
300
µA
CS = VIH, U/D = VIL or VIH and INC =
VIH @ max. tWR VCC = 3V
600
µA
CS = VIH, U/D = VIL or VIH and INC =
VIH @ max. tWR VCC = 5V
1400
µA
CS = VCC - 0.3V, U/D and INC = VSS or
VCC - 0.3V VCC = 3V
1
µA
CS = VCC - 0.3V, U/D and INC = VSS or
VCC - 0.3V VCC = 5V
2
µA
VIN = VCC
±1
µA
PARAMETER
Standby supply current
1100
3
Absolute linearity (Note 2)
DC Electrical Specifications
dBV
TEST CONDITIONS
MIN
(Note 9)
Page 3 of 7
X93156
DC Electrical Specifications
SYMBOL
Over recommended operating conditions unless otherwise specified. (Continued)
PARAMETER
TEST CONDITIONS
MIN
(Note 9)
TYP
(Note 5)
MAX
(Note 9)
UNIT
ILI
CS input leakage current
VCC = 3V, CS = 0
60
100
150
µA
ILI
CS input leakage current
VCC = 5V, CS = 0
120
200
250
µA
ILI
INC, U/D input leakage current
VIN = VSS to VCC
±1
µA
VIH
CS, INC, U/D input HIGH voltage
VCC x 0.7
VCC + 0.5
V
VIL
CS, INC, U/D input LOW voltage
-0.5
VCC x 0.1
V
10
pF
CS, INC, U/D input capacitance
CIN
(Notes 7, 8)
VCC = 3V, VIN = VSS, TA = +25°C, f = 1MHz
NOTES:
2. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (VH(n)(actual)-VH(n)(expected)) = ±1 Ml Maximum.
n = 1.. 29 only
3. Relative linearity is a measure of the error in step size between taps = VH(n+1)—[VH(n) + Ml] = ±0.5 Ml, n = 1 .. 29 only.
4. 1 Ml = Minimum Increment = RTOT/31.
5. Typical values are for TA = +25°C and nominal supply voltage.
6. This parameter is periodically sampled and not 100% tested
7. This parameter is not 100% tested.
8. When performing multiple write operations, VCC must not decrease by more than 150mV from it’s initial value.
9. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
Circuit #2 SPICE Macro Model
Endurance and Data Retention
PARAMETER
Minimum endurance
MIN
UNIT
200,000
Data changes per bit
Data retention
100
RTOTAL
RH
CH
Years
CW
CL
RL
10pF
25pF
Test Circuit #1
10pF
TEST POINT
VH/RH
AC Electrical Specifications
SYMBOL
AC Conditions of Test
Input pulse levels
0V to 3V
Input rise and fall times
10ns
Input reference levels
1.5V
Over recommended operating conditions unless otherwise specified.
PARAMETER
MIN
TYP
MAX
UNIT
tCl
CS to INC setup
100
ns
tlD
INC HIGH to U/D change
100
ns
tDI
U/D to INC setup
100
ns
tlL
INC LOW period
1
µs
tlH
INC HIGH period
1
µs
tlC
INC Inactive to CS inactive
1
µs
tCPH
CS Deselect time (NO STORE)
250
ns
tCPH
CS Deselect time (STORE)
10
ms
tCYC
INC cycle time
2
µs
FN8182 Rev 3.00
November 21, 2007
Page 4 of 7
X93156
AC Electrical Specifications
SYMBOL
Over recommended operating conditions unless otherwise specified. (Continued)
PARAMETER
tR , tF
(Note 7)
INC input rise and fall time
tR VCC
(Note 7)
VCC power-up rate
tWR
MIN
TYP
MAX
UNIT
500
µs
50
V/ms
10
ms
0.2
Store cycle
5
AC Timing
CS
tCYC
tCI
tIL
tIH
tCPHNS
tCPHS
tIC
90%
90%
10%
INC
tID
tDI
tF
tR
U/D
tIW
RW
MI
(Note 4)
Power-Up and Down Requirements
Up/Down (U/D)
There are no restrictions on the power-up or power-down
conditions of VCC and the voltages applied to the
potentiometer pins provided that VCC is always more positive
than or equal to VH and VL, i.e., VCC VH,VL. The VCC ramp
rate spec is always in effect.
The U/D input controls the direction of the wiper movement
and whether the counter is incremented or decremented.
Pin Descriptions
RH and RL
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the counter
in the direction indicated by the logic level on the U/D input.
Chip Select (CS)
The RH and RL pins of the X93156 are equivalent to the fixed
terminals of a mechanical potentiometer. The minimum voltage
is VSS and the maximum is VCC. The terminology of RH and
RL references the relative position of the terminal in relation to
wiper movement direction selected by the U/D input.
The device is selected when the CS input is LOW. The current
counter value is stored in nonvolatile memory when CS is
returned HIGH while the INC input is also HIGH. After the store
operation is complete the X93156 will be placed in the low
power standby mode until the device is selected once again.
Rw
Principles of Operation
The Rw pin of the X93156 is the wiper terminal of the
potentiometer which is equivalent to the movable terminal of a
mechanical potentiometer.
There are three sections of the X93156: the input control,
counter and decode section; the nonvolatile memory; and the
resistor array. The input control section operates just like an
up/down counter. The output of this counter is decoded to turn
on a single electronic switch connecting a point on the resistor
array to the wiper output. Under the proper conditions the
contents of the counter can be stored in nonvolatile memory
and retained for future use. The resistor array is comprised of
31 individual resistors connected in series. At either end of the
FN8182 Rev 3.00
November 21, 2007
Page 5 of 7
X93156
array and between each resistor is an electronic switch that
transfers the connection at that point to the wiper.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
If the wiper is moved several positions, multiple taps are
connected to the wiper for tIW (INC to VW change). The
2-terminal resistance value for the device can temporarily
change by a significant amount if the wiper is moved several
positions.
When the device is powered-down, the last wiper position
stored will be maintained in the nonvolatile memory. When
power is restored, the contents of the memory are recalled and
the wiper is set to the value last stored.
Instructions and Programming
The INC, U/D and CS inputs control the movement of the wiper
along the resistor array. With CS set LOW the device is
selected and enabled to respond to the U/D and INC inputs.
HIGH to LOW transitions on INC will increment or decrement
(depending on the state of the U/D input) a five bit counter. The
output of this counter is decoded to select one of thirty two
wiper positions along the resistive array.
The value of the counter is stored in nonvolatile memory
whenever CS transitions HIGH while the INC input is also
HIGH. In order to avoid an accidental store during power-up,
CS must go HIGH with VCC during initial power-up. When left
open, the CS pin is internally pulled up to VCC by an internal
30k resistor.
This procedure allows the system to always power-up to a
preset value stored in nonvolatile memory; then during system
operation minor adjustments could be made. The adjustments
might be based on user preference, system parameter
changes due to temperature drift, or other system trim
requirements.
The state of U/D may be changed while CS remains LOW. This
allows the host system to enable the device and then move the
wiper up and down until the proper trim is attained.
Mode Selection
CS
INC
U/D
MODE
L
H
Wiper Up
L
L
Wiper Down
H
X
Store Wiper Position
X
X
Standby Current
L
X
No Store, Return to Standby
L
H
Wiper Up (not recommended)
L
L
Wiper Down (not recommended)
H
Symbol Table
WAVEFORM
The system may select the X93156, move the wiper and
deselect the device without having to store the latest wiper
position in nonvolatile memory. After the wiper movement is
performed as described above and once the new position is
reached, the system must keep INC LOW while taking CS
HIGH. The new wiper position will be maintained until changed
by the system or until a power-up/down cycle recalled the
previously stored data. In order to recall the stored position of
the wiper on power-up, the CS pin must be held HIGH.
INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from Low to
High
Will change
from Low to
High
May change
from High to
Low
Will change
from High to
Low
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
© Copyright Intersil Americas LLC 2005-2007. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8182 Rev 3.00
November 21, 2007
Page 6 of 7
X93156
Mini Small Outline Plastic Packages (MSOP)
N
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
E1
INCHES
E
-B-
INDEX
AREA
1 2
0.20 (0.008)
A B C
TOP VIEW
4X
0.25
(0.010)
R1
R
GAUGE
PLANE
SEATING
PLANE -CA
4X
A2
A1
b
-H-
0.10 (0.004)
L1
SEATING
PLANE
C
D
0.20 (0.008)
C
a
CL
E1
0.20 (0.008)
C D
MAX
MIN
MAX
NOTES
0.037
0.043
0.94
1.10
-
A1
0.002
0.006
0.05
0.15
-
A2
0.030
0.037
0.75
0.95
-
b
0.010
0.014
0.25
0.36
9
c
0.004
0.008
0.09
0.20
-
D
0.116
0.120
2.95
3.05
3
E1
0.116
0.120
2.95
3.05
4
0.026 BSC
-B-
0.65 BSC
-
E
0.187
0.199
4.75
5.05
-
L
0.016
0.028
0.40
0.70
6
0.037 REF
N
C
SIDE VIEW
MIN
A
L1
-A-
e
SYMBOL
e
L
MILLIMETERS
0.95 REF
8
R
0.003
R1
0
-
8
-
0.07
0.003
-
5o
15o
0o
6o
7
-
-
0.07
-
-
5o
15o
-
0o
6o
Rev. 2 01/03
END VIEW
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. - H - Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (0.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums -A -H- .
and - B - to be determined at Datum plane
11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
FN8182 Rev 3.00
November 21, 2007
Page 7 of 7
