X9318WS8ZT1

DATASHEET X9318 FN8184 Rev 1.00 September 14, 2005 Digitally Controlled Potentiometer (XDCP™) FEATURES DESCRIPTION • • • • The Intersil X9318 is a digitally controlled potentiometer (XDCP). The device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface. • • • • • • Solid-state potentiometer 3-wire serial interface Terminal voltage, 0 to +8V 100 wiper tap points —Wiper position stored in nonvolatile memory and recalled on power-up 99 resistive elements —Temperature compensated —End to end resistance range ± 20% Low power CMOS —VCC = 5V —Active current, 3mA max. —Standby current, 1mA max. High reliability —Endurance, 100,000 data changes per bit —Register data retention, 100 years RTOTAL value = 10k Packages —8 Ld SOIC and DIP Pb-free plus anneal available (RoHS compliant) The potentiometer is implemented by a resistor array composed of 99 resistive elements and a wiper switching network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the wiper element is controlled by the CS, U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. The device can be used as a three-terminal potentiometer for voltage control or as a two-terminal variable resistor for current control in a wide variety of applications. PIN CONFIGURATION DIP/SOIC APPLICATIONS • • • • • LCD bias control DC bias adjustment Gain and offset trim Laser diode bias control Voltage regulator output control INC 1 U/D 2 RH 3 VSS 4 X9318 8 VCC 7 CS 6 RL 5 RW BLOCK DIAGRAM U/D INC CS VCC (Supply Voltage) Device Select (CS) Control and Memory 97 7-Bit Nonvolatile Memory RW RL VSS (Ground) General RH 99 98 RH Up/Down (U/D) Increment (INC) Up/Down Counter 96 One of One Hundred Decoder Wiper Switches Resistor Array 2 VCC VSS Store and Recall Control Circuitry 1 0 RL RW Detailed FN8184 Rev 1.00 September 14, 2005 Page 1 of 10 X9318 Ordering Information PART NUMBER PART MARKING RTOTAL (k) TEMP RANGE (°C) PACKAGE 10 0 to 70 8 Ld PDIP -40 to 85 8 Ld PDIP X9318WP8 X9318WP X9318WP8I X9318WP I X9318WS8* X9318W 0 to 70 8 Ld SOIC (150 mil) X9318WS8Z* (Note) X9318W Z 0 to 70 8 Ld SOIC (150 mil) (Pb-free) X9318WS8I* X9318W I -40 to 85 8 Ld SOIC (150 mil) X9318WS8IZ* (Note) X9318W Z I -40 to 85 8 Ld SOIC (150 mil) (Pb-free) *Add "T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. PIN DESCRIPTIONS DIP/SOIC Symbol 1 INC Increment. Toggling INC while CS is low moves the wiper either up or down. 2 U/D Up/Down. The U/D input controls the direction of the wiper movement. 3 RH The high terminal is equivalent to one of the fixed terminals of a mechanical potentiometer. 4 VSS Ground. 5 RW The wiper terminal is equivalent to the movable terminal of a mechanical potentiometer. 6 The low terminal is equivalent to one of the fixed terminals of a mechanical potentiometer. 7 RL CS 8 VCC Supply Voltage. FN8184 Rev 1.00 September 14, 2005 Brief Description Chip Select. The device is selected when the CS input is LOW, and de-selected when CS is high. Page 2 of 10 X9318 ABSOLUTE MAXIMUM RATINGS COMMENT Junction Temperature under bias...... -65C to +135C Storage temperature ......................... -65°C to +150°C Voltage on CS, INC, U/D and VCC with respect to VSS ................................. -1V to +7V RH, RW, RL to ground..........................................+10V Lead temperature (soldering 10s) ..................... 300°C IW (10s) ..............................................................±6mA Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. POTENTIOMETER CHARACTERISTICS (VCC = 5V ± 10%, TA = Full Operating Temperature Range unless otherwise stated) Limits Symbol VRH/RL Parameter Min. Typ.(4) IW Test Conditions/Notes -20 +20 % See ordering information for values RH/RL terminal voltage VSS 8 V VSS = 0V 25 mW Wiper resistance Wiper current(5) Noise(7) Absolute linearity(1) Relative linearity(2) -120 dBV Ref: 1kHz 1 % +1 MI(3) +0.2 MI(3) ±300 -20 4.5 IW = 1mA V(RH) = 8V, V(RL) = 0V ppm/°C +20 10/10/25 ) FN8184 Rev 1.00 September 14, 2005 See test circuit -0.2 CH/CL/CW(5 Potentiometer capacitances Supply Voltage  mA -1 RTOTAL temperature coefficient(5) Ratiometric temperature coefficient(5),(6) 200 +3.0 40 -3.0 Resolution VCC Unit End to end resistance tolerance Power rating RW Max. ppm/°C pF 5.5 See equivalent circuit V Page 3 of 10 X9318 D.C. OPERATING CHARACTERISTICS (VCC = 5V ± 10%, TA = Full Operating Temperature Range unless otherwise stated) Limits Symbol Parameter Typ.(4) Max. Unit 1 3 mA CS = VIL, U/D = VIL or VIH and INC = 0.4V/2.4V @ min. tCYC RL, RH, RW not connected 300 1000 µA CS  2.4V, U/D and INC = 0.4V RL, RH, RW not connected -10 +10 µA VIN = VSS to VCC Min. ICC VCC active current (Increment) ISB Standby supply current ILI CS, INC, U/D input leakage current VIH CS, INC, U/D input HIGH voltage 2 VCC + 1 V VIL CS, INC, U/D input LOW voltage -1 0.8 V CIN(5) CS, INC, U/D input capacitance 10 pF Test Conditions VCC = 5V, VIN = VSS, TA = 25°C, f = 1MHz ENDURANCE AND DATA RETENTION (VCC = 5V ± 10%, TA = Full Operating Temperature Range) Parameter Min. Unit Minimum endurance 100,000 Data changes per bit Data retention 100 Years Notes: (1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = [V(RW(n)(actual)) - V(RW(n)(expected))]/MI V(RW(n)(expected)) = n(V(RH) - V(RL))/99 + V(RL), with n from 0 to 99. (2) Relative linearity is a measure of the error in step size between taps = [V(RW(n+1)) - (V(RW(n)) - MI)]/MI (3) 1 Ml = Minimum Increment = [V(RH) - V(RL)]/99. (4) Typical values are for TA = 25°C and nominal supply voltage. (5) This parameter is not 100% tested. (6) Ratiometric temperature coefficient = (V(RW)T1(n) - V(RW)T2(n))/[V(RW)T1(n)(T1 - T2) x 106], with T1 & T2 being 2 temperatures, and n from 0 to 99. (7) Measured with wiper at tap position 31, RL grounded, using test circuit. Test Circuit Equivalent Circuit RTOTAL Test Point RH CW CH RW Force Current CL RL 10pF 25pF 10pF RW A.C. CONDITIONS OF TEST Input pulse levels 0.8V to 2.0V Input rise and fall times 10ns Input reference levels 1.4V FN8184 Rev 1.00 September 14, 2005 Page 4 of 10 X9318 A.C. OPERATING CHARACTERISTICS (VCC = 5V ± 10%, TA = Full Operating Temperature Range unless otherwise stated) Limits Symbol tCl Parameter Min. Typ.(4) Unit Max. CS to INC setup 100 ns (5) INC HIGH to U/D change 100 ns (5) tlD tDI U/D to INC setup 1 µs tlL INC LOW period 1 µs tlH INC HIGH period 1 µs tlC INC inactive to CS inactive 1 µs CS deselect time (STORE) 20 ms CS deselect time (NO STORE) 1 µs tCPHS tCPHNS (5 ) tIW INC to RW change tCYC tR, tF(5) tPU(5) tR VCC (5) 100 INC cycle time 500 µs 4 µs INC input rise and fall time 500 µs Power-up to wiper stable 500 µs 50 V/ms VCC power-up rate 0.2 POWER-UP AND DOWN REQUIREMENTS The recommended power-up sequence is to apply VCC/VSS first, then the potentiometer voltages. During power-up, the data sheet parameters for the DCP do not fully apply until 1 millisecond after VCC reaches its final value. The VCC ramp spec is always in effect. In order to prevent unwanted tap position changes, or an inadvertant store, bring the CS and INC high before or concurrently with the VCC pin on powerup. A.C. TIMING CS tCYC tCI tIL tIC tIH tCPHNS tCPHS 90% 90% 10% INC tID tDI tF tR U/D tIW RW FN8184 Rev 1.00 September 14, 2005 MI (3) Page 5 of 10 X9318 PIN NAMES PIN DESCRIPTIONS RH and RL Symbol The high (RH) and low (RL) terminals of the X9318 are equivalent to the fixed terminals of a mechanical potentiometer. The terminology of RL and RH references the relative position of the terminal in relation to wiper movement direction selected by the U/D input and not the voltage potential on the terminal. Description RH High terminal RW Wiper terminal RL Low terminal VSS Ground VCC Supply voltage RW U/D Up/Down control input Rw is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. The position of the wiper within the array is determined by the control inputs. The wiper terminal series resistance is typically 40. INC Increment control input CS Chip select control input Up/Down (U/D) The U/D input controls the direction of the wiper movement and whether the counter is incremented or decremented. Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete the X9318 will be placed in the low power standby mode until the device is selected once again. PIN CONFIGURATION DIP/SOIC 8 VCC 7 CS 3 6 RL 4 5 RW INC 1 U/D 2 RH VSS FN8184 Rev 1.00 September 14, 2005 X9318 PRINCIPLES OF OPERATION There are three sections of the X9318: the control section, the nonvolatile memory, and the resistor array. The control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. The contents of the counter can be stored in nonvolatile memory and retained for future use. The resistor array is comprised of 99 individual resistors connected in series. Electronic switches at either end of the array and between each resistor provide an electrical connection to the wiper pin, RW . The wiper acts like its mechanical equivalent and does not move beyond the first or last position. That is, the counter does not wrap around when clocked to either extreme. The electronic switches on the device operate in a “make before break” mode when the wiper changes tap positions. If the wiper is moved several positions, multiple taps are connected to the wiper for tIW (INC to VW change). The RTOTAL value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. When the device is powered-down, the last wiper position stored will be maintained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and the wiper is set to the value last stored. Page 6 of 10 X9318 INSTRUCTIONS AND PROGRAMMING The INC, U/D and CS inputs control the movement of the wiper along the resistor array. With CS set LOW the device is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a seven bit counter. The output of this counter is decoded to select one of one hundred wiper positions along the resistive array. MODE SELECTION CS INC U/D Mode L H Wiper up L L Wiper down H X Store wiper position to nonvolatile memory X X Standby The value of the counter is stored in nonvolatile memory whenever CS transitions HIGH while the INC input is also HIGH. L X No store, return to standby L H Wiper Up (not recommended) The system may select the X9318, move the wiper and deselect the device without having to store the latest wiper position in nonvolatile memory. After the wiper movement is performed as described above and once the new position is reached, the system must keep INC LOW while taking CS HIGH. The new wiper position will be maintained until changed by the system or until a powerup/down cycle recalled the previously stored data. L L Wiper Down (not recommended) H This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjustments could be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, etc. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. FN8184 Rev 1.00 September 14, 2005 Page 7 of 10 X9318 APPLICATIONS INFORMATION Electronic digitally controlled (XDCP) potentiometers provide three powerful application advantages; (1) the variability and reliability of a solid-state potentiometer, (2) the flexibility of computer-based digital controls, and (3) the retentivity of nonvolatile memory used for the storage of multiple potentiometer settings or data. Basic Configurations of Electronic Potentiometers VREF VREF RH RW RL I Three terminal potentiometer; variable voltage divider Two terminal variable resistor; variable current Basic Circuits Buffered Reference Voltage +V +V Single Supply Inverting Amplifier Cascading Techniques R1 +V R1 +5V RW VREF + VS LMC7101 VOUT – +8V R2 X RW – 100K +V VO + +8V LMC7101 RW VOUT = VW/RW (a) Voltage Regulator VIN 100K (b) VO = (R2/R1)VS Offset Voltage Adjustment VO (REG) 317 R1 R2 VS R1 VS 100k – Iadj 10k +12V 10k VO VO R1 } LMC7101 10k – + } R2 LT311A +12V + VO (REG) = 1.25V (1+R2/R1)+Iadj R2 Comparator with Hysteresis R2 VUL = {R1/(R1+R2)} VO(max) VLL = {R1/(R1+R2)} VO(min) (for additional circuits see AN115) FN8184 Rev 1.00 September 14, 2005 Page 8 of 10 X9318 PACKAGING INFORMATION 8-Lead Plastic Small Outline Package, Type S (8-lead SOIC) 0.150 (3.80) 0.228 (5.80) 0.158 (4.00) 0.244 (6.20) Pin 1 Index Pin 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.053 (1.35) 0.069 (1.75) 0.004 (0.19) 0.010 (0.25) 0.050 (1.27) 0.010 (0.25) X 45° 0.020 (0.50) 0.050"Typical 0.050" Typical 0° - 8° 0.0075 (0.19) 0.010 (0.25) 0.250" 0.016 (0.410) 0.037 (0.937) FOOTPRINT 0.030" Typical 8 Places NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) FN8184 Rev 1.00 September 14, 2005 Page 9 of 10 X9318 PACKAGING INFORMATION 8-Lead Plastic, DIP, Package Code P8 0.430 (10.92) 0.360 (9.14) 0.260 (6.60) 0.240 (6.10) Pin 1 Index Pin 1 0.300 (7.62) Ref. Half Shoulder Width On All End Pins Optional 0.145 (3.68) 0.128 (3.25) Seating Plane 0.025 (0.64) 0.015 (0.38) 0.065 (1.65) 0.045 (1.14) 0.150 (3.81) 0.125 (3.18) 0.020 (0.51) 0.016 (0.41) 0.110 (2.79) 0.090 (2.29) .073 (1.84) Max. Typ. 0.010 (0.25) 0.060 (1.52) 0.020 (0.51) 0.325 (8.25) 0.300 (7.62) 0° 15° NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH © Copyright Intersil Americas LLC 2005. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8184 Rev 1.00 September 14, 2005 Page 10 of 10