X93256WV14IZ-2.7

DATASHEET X93256 FN8188 Rev 2.00 February 1, 2008 Dual Digitally Controlled Potentiometers (XDCPs™) The Intersil X93256 is a dual digitally controlled potentiometer (XDCP). The device consists of two resistor arrays, wiper switches, a control section, and nonvolatile memory. The wiper positions are controlled by individual Up/Down interfaces. Features • Dual solid-state potentiometers • Individual Up/Down interfaces • 32 wiper tap points per potentiometer - Wiper position stored in nonvolatile memory and recalled on power-up A potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. The position of each wiper element is controlled by a set of independent CS, U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. • 31 resistive elements per potentiometer - Temperature compensated - Maximum resistance tolerance of ±25% - Terminal voltage, 0 to VCC Each potentiometer is connected as a three-terminal variable resistor and can be used in a wide variety of applications including: • Low power CMOS - VCC = 2.7V to 5.5V. - Active current, 200µA typical per potentiometer - Standby current, 4µA max per potentiometer • Bias and Gain Control • LCD Contrast Adjustment • High reliability - Endurance 200,000 data changes per bit - Register data retention, 100 years Pinout X93256 (14 LD TSSOP) TOP VIEW • RTOTAL value = 12.5k, 50k 14 RH1 • Package - 14 Ld TSSOP 2 13 U/D1 • Pb-free available (RoHS compliant) CS1 3 12 INC1 INC2 4 11 VCC U/D2 5 10 CS2 RH2 6 9 RL2 VSS 7 8 Rw2 Rw1 1 RL1 *NC can be left unconnected, or connected to any voltage between VSS and VCC. Ordering Information VCC LIMITS (V) RTOTAL (k) TEMPERATURE RANGE (°C) 2.7 to 5.5 50 -40 to +85 14 Ld TSSOP (4.4mm) 50 -40 to +85 14 Ld TSSOP (4.4mm) (Pb-free) M14.173 X9325 6WVG 12.5 -40 to +85 14 Ld TSSOP (4.4mm) X93256WV14IZ-2.7* X9325 6WZG (Note) 12.5 -40 to +85 14 Ld TSSOP (4.4mm) (Pb-free) M14.173 PART NUMBER X93256UV14I-2.7* PART MARKING X9325 6UVG X93256UV14IZ-2.7* X9325 6UZG (Note) X93256WV14I-2.7* PACKAGE PKG. DWG. # M14.173 M14.173 *Add "T1" suffix for tape and reel.Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. FN8188 Rev 2.00 February 1, 2008 Page 1 of 7 X93256 Block Diagram DETAILED SINGLE POTENTIOMETER DESCRIPTION GENERAL DESCRIPTION U/D1 VCC (SUPPLY VOLTAGE) RH1 30k INC1 CS1 5-BIT NONVOLATILE MEMORY UP/DOWN (INC1 AND INC2) CONTROL AND MEMORY RL1 STORE AND CONTROL RECALL CIRCUITRY RH2 DEVICE SELECT (CS1 AND CS2) RW2 RL2 RH1 31 30 29 RW1 (U/D1 AND U/D2) INCREMENT 5-BIT UP/DOWN COUNTER 28 ONE OF THIRTY TWO DECODER TRANSFER GATES RW RESISTOR ARRAY 2 1 VCC 0 VSS RL1 VSS (GROUND) Pin Descriptions TSSOP SYMBOL 1 RW1 RW1. The RW1 pin of the X93256 is the wiper terminal of the first potentiometer, which is equivalent to the movable terminal of a mechanical potentiometer. BRIEF DESCRIPTION 2 RL1 RL1. The RH1 and RL1 pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH1 and RL1 references the relative position of the terminal in relation to wiper movement direction selected by the U/D input. 3 CS1 Chip Select 1 (CS1). The first potentiometer is selected when the CS1 input is LOW. The current counter value is stored in nonvolatile memory when CS1 is returned HIGH while the INC1 input is also HIGH. After the store operation is complete, the first potentiometer of the X93256 will be placed in the low power standby mode until the first potentiometer is selected once again. 4 INC2 Increment 2 (INC2). The INC2 input is negative-edge triggered. Toggling INC2 will move the wiper of the second potentiometer and either increment or decrement the counter in the direction indicated by the logic level on the U/D2 input. 5 U/D2 Up/Down 2 (U/D2). The U/D2 input controls the direction of the second potentiometer wiper movement and whether the counter for the second potentiometer is incremented or decremented. 6 RH2 RH2. The RH2 and RL2 pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH2 and RL2 references the relative position of the wiper terminal for the second potentiometer in relation to the wiper movement direction selected by the U/D2 input. 7 VSS Ground. 8 RW2 RW2. The RW2 pin of the X93256 is the wiper terminal of the second potentiometer, which is equivalent to the movable terminal of a mechanical potentiometer. 9 RL2 RL2. The RH2 and RL2 pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH2 and RL2 references the relative position of the wiper terminal for the second potentiometer in relation to the wiper movement direction selected by the U/D2 input. 10 CS2 Chip Select 2 (CS2). The second potentiometer is selected when the CS2 input is LOW. The current counter value is stored in nonvolatile memory when CS2 is returned HIGH while the INC2 input is also HIGH. After the store operation is complete, the second potentiometer of the X93256 will be placed in the low power standby mode until the second potentiometer is selected once again. 11 VCC Supply Voltage. 12 INC1 Increment 1(INC1). The INC1 input is negative-edge triggered. Toggling INC1 will move the wiper of the first potentiometer and either increment or decrement the counter in the direction indicated by the logic level on the U/D1 input. 13 U/D1 Up/Down 1 (U/D1). The U/D1 input controls the direction of the first potentiometer wiper movement and whether the counter for the first potentiometer is incremented or decremented. 14 RH1 RH1. The RH1 and RL1 pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH1 and RL1 references the relative position of the wiper terminal for the first potentiometer in relation to the wiper movement direction selected by the U/D1 input. FN8188 Rev 2.00 February 1, 2008 Page 2 of 7 X93256 Absolute Maximum Ratings Thermal Information Voltage on CS, INC, U/D, RH, RL and VCC with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to +6.5V Maximum resistor current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2mA Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65C to +135C Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Maximum reflow temperature (40s) . . . . . . . . . . . . . . . . . . . . +240°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Temperature Range Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Supply Voltage VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V (Note 6) CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 1. Absolute linearity is utilized to determine actual wiper resistance vs expected resistance = (VH(n)(actual) - VH(n)(expected)) = ±1 Ml Maximum. n = 1 .. 29 only. 2. Relative linearity is a measure of the error in step size between taps = VH(n+1) - [VH(n) + Ml] = ±0.5 Ml, n = 1 .. 29 only. 3. 1 Ml = Minimum Increment = RTOT/31. 4. Typical values are for TA = +25°C and nominal supply voltage. 5. Limits established by characterization and are not production tested. 6. When performing multiple write operations, VCC must not decrease by more than 150mV from its initial value. 7. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested. Potentiometer Characteristics Over recommended operating conditions, unless otherwise stated. SYMBOL RTOT VR PARAMETER End-to-End Resistance MIN (Note 7) TYP (Note 4) MAX (Note 7) UNIT W option 9.375 12.5 15.625 k U option 37.5 50 62.5 k VCC V 1 mW (Note 6) TEST CONDITIONS/NOTES RH, RL Terminal Voltages 0 Power Rating RTOTAL 50k(Note 5) Noise Ref: 1kHz (Note 5) RW Wiper Resistance ((Note 5) 1100  IW Wiper Current (Notes 5) 0.6 mA Resolution CH/CL/CW dBV (Note 6) 3 Absolute Linearity (Note 1) VH(n)(actual) - VH(n)(expected) Relative Linearity (Note 2) VH(n+1) - [VH(n) + MI] RTOTAL Temperature Coefficient (Note 5) Potentiometer Capacitances See “Circuit #2 SPICE Macro Model” on page 4 FN8188 Rev 2.00 February 1, 2008 -120 % ±1 MI (Note 3) ±0.5 MI (Note 3) ±35 ppm/°C 10/10/25 pF (Note 5) Page 3 of 7 X93256 DC Operating Characteristics SYMBOL ICC1 ICC2 ISB Over recommended operating conditions, unless otherwise stated. TYP (Note 4) MAX (Note 7) UNIT CS = VIL, U/D = VIL or VIH and INC = 0.4V @ max. tCYC VCC = 3V 50 250 µA CS = VIL, U/D = VIL or VIH and INC = 0.4V @ max. tCYC VCC = 5V 200 300 PARAMETER MIN (Note 7) TEST CONDITIONS VCC Active Current (Increment) VCC Active Current (Store) (EEPROM Store) Standby Supply Current CS = VIH, U/D = VIL or VIH and INC = VIH @ max. tWR VCC = 3V 600 µA CS = VIH, U/D = VIL or VIH and INC = VIH @ max. tWR VCC = 5V 1400 µA CS = VCC - 0.3V, U/D and INC = VSS or VCC - 0.3V VCC = 3V 1 µA CS = VCC - 0.3V, U/D and INC = VSS or VCC - 0.3V VCC = 5V 4 µA ±1 µA ILI CS input Leakage Current VIN = VCC ILI CS input Leakage Current VCC = 3V, CS = 0 60 100 150 µA ILI CS input Leakage Current VCC = 5V, CS = 0 120 200 250 µA ILI INC, U/D Input Leakage Current VIN = VSS to VCC ±1 µA VIH CS, INC, U/D input HIGH Voltage VCC x 0.7 VCC + 0.5 V VIL CS, INC, U/D input LOW Voltage -0.5 VCC x 0.1 V CIN (Note 6) CS, INC, U/D Input Capacitance 10 pF VCC = 3V, VIN = VSS, TA = +25°C, f = 1MHz (Note 5) AC Conditions of Test Endurance and Data Retention PARAMETER MIN UNIT Minimum endurance 200,000 Data changes per bit Data retention 100 Years Test Circuit #1 Input pulse levels 0V to 3V Input rise and fall times 10ns Input reference levels 1.5V Circuit #2 SPICE Macro Model TEST POINT RTOTAL VH/RH RH CH CL CW RL 10pF 25pF 10pF AC Operating Characteristics Over recommended operating conditions, unless otherwise specified. In the table, CS, INC, U/D, RH and RL are used to refer to either CS1 or CS2, etc. SYMBOL PARAMETER MIN (Note 7) TYP (Note 4) MAX (Note 7) UNIT tCl CS to INC Setup 100 ns tlD INC HIGH to U/D Change 100 ns tDI U/D to INC Setup 100 ns tlL INC LOW Period 1 µs tlH INC HIGH Period 1 µs FN8188 Rev 2.00 February 1, 2008 Page 4 of 7 X93256 AC Operating Characteristics Over recommended operating conditions, unless otherwise specified. In the table, CS, INC, U/D, RH and RL are used to refer to either CS1 or CS2, etc. (Continued) SYMBOL tlC MIN (Note 7) PARAMETER INC Inactive to CS Inactive TYP (Note 4) MAX (Note 7) UNIT 1 µs tCPH CS Deselect Time (No store) 250 ns tCPH CS Deselect Time (Store) 10 ms tCYC INC Cycle Time 2 µs tR, tF (Note 5) INC Input Rise and Fall time tR VCC (Note 5) VCC Power-up Rate tWR 0.2 Store Cycle 5 500 µs 50 V/ms 10 ms AC Timing CS tCYC tCI tIL tIH tIC (STORE) tCPH 90% INC 90% 10% tID tDI tF tR U/D Note: CS, INC, U/D, RH and RL are used to refer to either CS1 or CS2, etc. Power-up and Power-down Requirements Up/Down (U/D) There are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins provided that VCC is always more positive than or equal to VH and VL, i.e., VCC  VH,VL. The VCC ramp rate specification is always in effect. The U/D input controls the direction of a single potentiometer’s wiper movement and whether the counter is incremented or decremented. Pin Descriptions In the text, CS, INC, U/D, RH, RW , and RL are used to refer to either CS1 or CS2, etc. Note: These signals can be applied independently or at the same time. RH and RL The RH and RL pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction selected by the U/D input per potentiometer. RW The RW pin of the X93256 is the wiper terminal of the potentiometer, which is equivalent to the movable terminal of a mechanical potentiometer. FN8188 Rev 2.00 February 1, 2008 Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the pertaining potentiometer’s counter in the direction indicated by the logic level on the pertaining potentiometer’s U/D input. Chip Select (CS) A potentiometer is selected when the pertaining CS input is LOW. Its current counter value is stored in nonvolatile memory when the pertaining CS is returned HIGH while the pertaining INC input is also HIGH. After the store operation is complete the affected potentiometer will be placed in the low power standby mode until the potentiometer is selected once again. Principles of Operation There are multiple sections for each potentiometer in the X93256: an input control, a counter and decode section; the nonvolatile memory; and a resistor array. Each input control section operates just like an up/down counter. The output of Page 5 of 7 X93256 this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. Under the proper conditions, the contents of the counter can be stored in nonvolatile memory and retained for future use. Each resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the connection at that point to the wiper. Each wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. If the wiper is moved several positions, multiple taps are connected to the wiper for tIW (INC to VW change). The 2-terminal resistance value for the device can temporarily change by a significant amount if the wiper is moved several positions. When the device is powered-down, the last wiper position stored will be maintained in the nonvolatile memory for each potentiometer. When power is restored, the contents of the memory are recalled and each wiper is set to the value last stored. Instructions and Programming The INC, U/D and CS inputs control the movement of the pertaining wiper along the resistor array. With CS set LOW the pertaining potentiometer is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a 5-bit counter. The output of this counter is decoded to select one of thirty two wiper positions along the resistive array. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move each wiper up and down until the proper trim is attained. Mode Selection CS INC U/D MODE L H Wiper Up L L Wiper Down H X Store Wiper Position X X Standby Current L X No Store, Return to Standby L H Wiper Up (not recommended) L L Wiper Down (not recommended) H Symbol Table WAVEFORM INPUTS OUTPUTS Must be steady Will be steady May change from Low to High Will change from Low to High May change from High to Low Will change from High to Low Don’t Care: Changes Allowed Changing: State Not Known N/A Center Line is High Impedance The value of the counter is stored in nonvolatile memory whenever each CS transitions HIGH while the pertaining INC input is also HIGH. In order to avoid an accidental store during power-up, each CS must go HIGH with VCC during initial power-up. When left open, each CS pin is internally pulled up to VCC by an internal 30k resistor. The system may select the X93256, move any wiper and deselect the device without having to store the latest wiper position in nonvolatile memory. After the wiper movement is performed as previously described and once the new position is reached, the system must keep INC LOW while taking CS HIGH. The new wiper position will be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. In order to recall the stored position of the wiper on power-up, the CS pin must be held HIGH. This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjustments could be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, or other system trim requirements. FN8188 Rev 2.00 February 1, 2008 Page 6 of 7 X93256 Thin Shrink Small Outline Plastic Packages (TSSOP) M14.173 N INDEX AREA E 0.25(0.010) M E1 2 SYMBOL 3 0.05(0.002) -A- INCHES GAUGE PLANE -B1 14 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE B M L A D -C- e  A2 A1 b 0.10(0.004) M 0.25 0.010 SEATING PLANE c 0.10(0.004) C A M B S MIN 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AC, Issue E. MILLIMETERS MIN MAX NOTES A - 0.047 - 1.20 - A1 0.002 0.006 0.05 0.15 - A2 0.031 0.041 0.80 1.05 - b 0.0075 0.0118 0.19 0.30 9 c 0.0035 0.0079 0.09 0.20 - D 0.195 0.199 4.95 5.05 3 E1 0.169 0.177 4.30 4.50 4 e 0.026 BSC 0.65 BSC - E 0.246 0.256 6.25 6.50 - L 0.0177 0.0295 0.45 0.75 6 8o 0o N NOTES: MAX  14 0o 14 7 8o Rev. 2 4/06 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees) © Copyright Intersil Americas LLC 2005-2008. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8188 Rev 2.00 February 1, 2008 Page 7 of 7