XL Family of Low Phase Noise
Quartz-based PLL Oscillators
Description
Features
The Renesas XL devices (XO and VCXO options) are
ultra-precision crystal oscillators with 750 to 890fs typical phase
jitter over 12kHz to 20MHz bandwidth. Available in a wide
frequency range from 0.750MHz to 1350MHz, the XL series
crystal oscillators utilize a family of proprietary ASICs, with a key
focus on noise reduction technologies.
▪
▪
▪
▪
XL
Datasheet
Output types: LVDS, LVPECL, LVCMOS
Phase jitter (12kHz to 20MHz): 750fs to 890fs typical
Supply voltage: 2.5V or 3.3V
Package options:
• 3.2 × 2.5 × 1.0 mm (not available for VCXO)
• 5.0 × 3.2 × 1.2 mm
• 7.0 × 5.0 × 1.3 mm
▪ Operating temperature: -20°C to +70°C
• Frequency stability options: ±20, ±25, ±50, or ±100 ppm
(XO only)
The 3rd order Delta Sigma Modulator reduces noise to the levels
that are comparable to traditional Bulk Quartz and SAW
oscillators. With short lead-time, low cost, low noise, wide
frequency range, excellent ambient performance, the XL devices
are an excellent choice over the conventional technologies. The
XL (XO option) devices have stabilities as tight as ±20ppm and
the XL (VCXO option) devices have ±50ppm APR. Either option
provides extremely quick delivery for both standard and custom
frequencies.
• ±50ppm APR (VCXO only)
▪ Operating temperature: -40°C to +85°C
• Frequency stability options: ±25, ±50, or ±100 ppm
(XO only)
• ±50ppm APR (VCXO only)
Pin Assignments
▪ Operating temperature: -40°C to +105°C (XO only)
(XO Option)
• Frequency stability options: ±50 or ±100 ppm
▪ kV of 85ppm/volt typical from 0.5VDC to VDD (VCXO only)
OUT2
OUT
5
4
1
2
3
NC / E/D
• Better than ±10% linearity for Vc range
GND
VDD
6
E/D / NC
NOTE: To minimize power supply line noise, a 0.01μF bypass
capacitor should be placed between VDD (Pin 6) and GND (Pin 3).
(VCXO Option)
VDD
OUT2
OUT
6
5
4
1
2
3
Vc
E/D
GND
NOTE: To minimize power supply line noise, a 0.01μF bypass
capacitor should be placed between VDD (Pin 6) and GND (Pin 3).
©2021 Renesas Electronics Corporation
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August 18, 2021
XL Datasheet
Pin Descriptions
Table 1. XO Pin Description
Table 2. VCXO Pin Description
Number
Name
Description
Number
Name
Description
1
E/D
NC
Enable/Disable [a][b]
No connect
1
Vc
Voltage control
2
E/D
Enable/Disable [a][b]
2
NC
E/D
No connect
Enable/Disable [a][b]
3
GND
Connect to ground
3
GND
Connect to ground
4
OUT
Output
4
OUT
Output
5
OUT2
Complementary output (NC LVCMOS)
5
OUT2
Complementary output [c]
6
VDD
Supply voltage
6
VDD
Supply voltage
[a] Pulled high internally.
[b] Low = output disabled.
See Ordering Information (VCXO) for more details.
[a] Pulled high internally.
[b] Low = output disabled.
[c] Do not connect for LVCMOS. For XLVCMOS, both OUT and OUT2
are ON and in opposite phase.
See Ordering Information (XO) for more details.
©2021 Renesas Electronics Corporation
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XL Datasheet
Ordering Information (XO)
XL
L
5
3
5
125.000000
I
Family and ASIC
Output Type
Package
Voltage
Precision
Frequency
Temperature Range
2: 2.5 VDC ±5%
3: 3.3 VDC ±5%
I: Industrial range: ‐ 40 to +85 °C
K: Extended industrial range : ‐40 to +105 °C
X: Extended commercial range : ‐20 to +70 °C
3: 3.2 x 2.5 mm
5: 5.0 x 3.2 mm
7: 7.0 x 5.0 mm
125.000000 listed in MHz as example
3 digits before decimal and 6 digits after decimal
H: LVCMOS Enable/Disable Pin 1
J: LVCMOS Enable/Disable Pin 2
L: LVDS Enable/Disable Pin 1
M: LVDS Enable/Disable Pin 2
P: LVPECL Enable/Disable Pin 1
Q: LVPECL Enable/Disable Pin 2
X: XLVCMOS Comp HCMOS Enable/Disable Pin 1*
Y: XLVCMOS Comp HCMOS Enable/Disable Pin 2*
000.750000 to 000.999999 75kHz to 999.999kHz
001.000000 to 009.999999 1MHz to 9.999999MHz
010.000000 to 099.999999 10MHz to 99.999999MHz
100.000000 to 999.999999 100MHz to 999.999999MHz
A00.000000 to A99.999999 1000MHz to 1099.999MHz
B00.000000 to B99.999999 1100MHz to 1199.999MHz
C00.000000 to C99.999999 1200MHz to 1299.999MHz
D00.000000 to D50.000000 1300MHz to 1350MHz
* XLVCMOS: Complimentary HCMOS where both
outputs are ON and in opposite phase.
0: ±100ppm**
5: ±50ppm**
6: ±25ppm
8: ±20ppm*
XL: 1,000 fs jitter
* ±20ppm for X (‐20° to +70°C) only.
** ±100ppm and ±50ppm for K (‐40°C to +105°C) only.
Ordering Information (VCXO)
XL
L
5
3
Family a nd AS IC
Output Type
Packag e
Volta ge
V
125.000000
I
Frequency
Temperature Ra nge
2: 2.5 VDC ±5%
3: 3.3 VDC ±5%
5: 5.0 x 3.2 mm
7: 7.0 x 5.0 mm
H: LVCMOS Enable/Disable
L: LVDS Enable/Disa ble
P: LVPECL Enable/Disa ble
I: Industrial range: ‐ 40 to +85 °C
X: Extended commercial range : ‐20 to +70 °C
125.000000 listed in MHz as example
3 digits before decimal and 6 digits af ter decima l
000.750000 to 000.999999 75kHz to 999.999kHz
001.000000 to 009.999999 1MHz to 9.999999MHz
010.000000 to 099.999999 10MHz to 99.999999MHz
100.000000 to 999.999999 100MHz to 999.999999MHz
A00.000000 to A99.999999 1000MHz to 1099.999MHz
B00.000000 to B99.999999 1100MHz to 1199.999MHz
C00.000000 to C99.999999 1200MHz to 1299.999MHz
D00.000000 to D50.000000 1300MHz to 1350MHz
XL: 1,000 fs ji tter
V: VCXO option
©2021 Renesas Electronics Corporation
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August 18, 2021
XL Datasheet
Contents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin Assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
(XO Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
(VCXO Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering Information (XO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering Information (VCXO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
ESD Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Mechanical Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Solder Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Output Waveforms – LVDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output Waveforms – LVPECL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output Waveforms – LVCMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Package Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Marking Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
©2021 Renesas Electronics Corporation
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August 18, 2021
XL Datasheet
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the device. These ratings, which are standard values for
Renesas commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above
those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature
range.
Table 3. Absolute Maximum Ratings
Item
VDD
E/D
OUT
Storage Temperature
Maximum Junction Temperature
Core Current
Theta JA
Theta JB
Rating
-0.5 to +5.0V
-0.5V to VDD + 0.5V
-0.5V to VDD + 0.5V
-55°C to 125°C
125°C
65mA maximum
JU6
7.0 × 5.0 × 1.3 mm
75.9 °C/W
48.6°C/W
JS6
5.0 × 3.2 × 1.2 mm
89.6 °C/W
54.3 °C/W
JX6
3.2 × 2.5 × 1.0 mm
94.7 °C/W
66.8 °C/W
ESD Compliance
Table 4. ESD Compliance
Human Body Model (HBM
1000V
Machine Model (MM)
150V
Mechanical Testing
Table 5. Mechanical Testing
Parameter
Test Method
Mechanical Shock
Drop from 75cm to hardwood surface–3 times.
Mechanical Vibration
10–55Hz, 1.5mm amplitude, 1 minute sweep; 2 hours each in 3 directions (X, Y, Z).
High Temperature Burn-in
Under power at 125°C for 2000 hours.
He pressure: 4 ±1kgf/cm2 2 hour soak.
Hermetic Seal
Solder Reflow Profile
tP
10 seconds Max within
5°C of 260°C peak
260°C
Ramp up 3°C/s Max
225°C
180°C
120 ±20 seconds
in pre-heating
area
160°C
50 ±10
seconds
above 225°C
reflow area
Ramp down not
to exceed 6°C/s
25°C
400 seconds MAX from +25°C to 260°C peak
©2021 Renesas Electronics Corporation
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August 18, 2021
XL Datasheet
DC Electrical Characteristics
Table 6. 3.3V IDD DC Electrical Characteristics
VDD = 3.3V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
Parameter
Output Type
LVDS
IDD
Power Supply Current
LVPECL[a]
LVCMOS
Conditions
Minimum
Typical
Maximum
0.75MHz to 40MHz.
—
32
37
40+MHz to 220MHz.
—
40
47
220+MHz to 630MHz.
—
49
57
630+MHz to 1350MHz.
—
72
100
0.75MHz to 40MHz.
—
26
31
40+MHz to 220MHz.
—
38
45
220+MHz to 630MHz.
—
56
64
630+MHz to 1350MHz.
—
96
120
0.75MHz to 20MHz.
—
27
32
20+MHz to 50MHz.
—
32
35
50+MHz to 130MHz.
—
43
47
130+MHz to 200MHz.
—
48
55
200+MHz to 250MHz.
—
48
60
Minimum
Typical
Maximum
0.75MHz to 20MHz.
—
24
26
20+MHz to 220MHz.
—
29
34
220+MHz to 630MHz.
—
36
44
630+MHz to 1000MHz.
—
46
65
0.75MHz to 20MHz.
—
20
33
20+MHz to 220MHz.
—
28
41
220+MHz to 630MHz.
—
41
63
630+MHz to 1000MHz.
—
56
72
0.75MHz to 20MHz.
—
17
22
20+MHz to 50MHz.
—
23
25
50+MHz to 100MHz.
—
28
29
100+MHz to 130MHz.
—
30
32
130+MHz to 160MHz.
—
32
35
160+MHz to 180MHz.
—
33
37
Units
mA
[a] Without termination resistors.
Table 7. 2.5V IDD DC Electrical Characteristics
VDD = 2.5V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
Parameter
Output Type
LVDS
LVPECL[a]
IDD
Power Supply Current
LVCMOS
Conditions
Units
mA
[a] Without termination resistors.
©2021 Renesas Electronics Corporation
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August 18, 2021
XL Datasheet
Table 8. LVDS DC Electrical Characteristics
VDD = 3.3V, 2.5V ±5%, T A = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard frequencies.
Symbol
Parameter
Conditions
Minimum
Typical
Maximum
VDD = 3.3V ±5%.
—
—
0.6
VDD = 2.5V ±5%.
—
—
0.4
VDD = 3.3V ±5%.
—
—
1.3
VDD = 2.5V ±5%.
—
—
1.25
VOD
Differential Output Voltage
VOS
Output Offset Voltage
VIH
Enable/Disable Input High Voltage
(Output enabled)
—
70% VDD
—
—
VIL
Enable/Disable Input Low Voltage
(Output disabled)
—
—
—
30% VDD
Units
V
Table 9. LVPECL DC Electrical Characteristics
VDD = 3.3V, 2.5V ±5%, T A = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard frequencies.
Symbol
Parameter
Conditions
Minimum
Typical
Maximum
VDD = 3.3V ±5%.
2.055
VDD = 2.5V ±5%.
—
VDD = 3.3V ±5%.
1.305
VDD = 2.5V ±5%.
—
0.68
—
2.405
VOD
Differential Output Voltage
VOS
Output Offset Voltage
VIH
Enable/Disable Input High Voltage
(Output enabled)
—
70% VDD
—
—
VIL
Enable/Disable Input Low Voltage
(Output disabled)
—
—
—
30% VDD
©2021 Renesas Electronics Corporation
7
Units
1.4
—
1.65
V
August 18, 2021
XL Datasheet
Table 10. LVCMOS DC Electrical Characteristics
VDD = 3.3V, 2.5V ±5%, T A = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C. Below are guaranteed for listed standard frequencies.
Symbol
Parameter
Conditions
VDD = 3.3V ±5%.
VOH
Output High Voltage
VDD = 2.5V ±5%.
VDD = 3.3V ±5%.
VOL
Output Low Voltage
VDD = 2.5V ±5%.
Minimum
Typical
Maximum
0.75MHz to 150MHz.
90% VDD
—
—
150+MHz to 250MHz.
80% VDD
—
—
0.75MHz to 160MHz.
90% VDD
—
—
160+MHz to 180MHz.
80% VDD
—
—
0.75MHz to 150MHz.
—
—
10% VDD
150+MHz to 250MHz.
—
—
20% VDD
0.75MHz to 160MHz.
—
—
10% VDD
160+MHz to 180MHz.
—
—
20% VDD
VIH
Enable/Disable Input High Voltage
(Output enabled)
—
—
70% VDD
—
—
VIL
Enable/Disable Input Low Voltage
(Output disabled)
—
—
—
—
30% VDD
©2021 Renesas Electronics Corporation
8
Units
V
August 18, 2021
XL Datasheet
AC Electrical Characteristics
Table 11. 3.3V AC Electrical Characteristics
VDD = 3.3V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
F
Parameter
Output Frequency Range
Frequency Stability
tR
Minimum
Typical
Maximum
LVDS.
0.75
—
1350
LVPECL.
0.75
—
1350
LVCMOS.
0.75
—
250
Temperature = -20°C to +70°C.
±20
—
±100
ppm
Temperature = -40°C to +85°C.
±25
—
±100
ppm
Temperature = -40°C to +105°C.
±50
—
±100
ppm
—
—
±3
ppm
Aging (10 years)
TA = 25°C.
—
—
±10
ppm
Start-up Time
Output Rise Time
LVDS.
Differential.
—
100
—
LVPECL.
VDD - 2.0V.
—
50
—
LVCMOS.
To GND.
—
15
—
pF
Output valid time after VDD meets minimum
specified level.
—
—
10
ms
LVDS.
—
—
400
—
—
400
—
—
3
—
—
400
—
—
400
—
—
3
LVDS.
45
—
55
LVPECL.
45
—
55
FOUT < 62.5MHz.
45
—
55
FOUT > 62.5MHz.
40
—
60
—
—
100
LVDS.
—
3
—
LVPECL.
—
5.8
—
—
5
—
LVDS.
—
1.3
—
LVPECL.
—
1.29
—
—
0.6
—
LVDS.
—
5.8
—
LVPECL.
—
9.3
—
—
10
—
20% to 80% Vpp.
LVPECL.
10% to 90% VDD.
LVDS.
Output Fall Time
80% to 20% Vpp.
LVPECL.
LVCMOS.
ODC
Output Clock Duty Cycle
90% to 10% VDD.
LVCMOS.
TOE
JPER
Output Enable/ Disable Time
Period Jitter, RMS
—
LVCMOS.
RJ
Random Jitter
LVCMOS.
DJ
MHz
TA = 25°C.
LVCMOS.
tF
Units
Aging (1st year)
Output Load
TST
Test Condition
Deterministic Jitter
LVCMOS.
©2021 Renesas Electronics Corporation
FOUT = 125MHz.
FOUT = 125MHz.
FOUT = 125MHz.
9
Ω
ps
ns
ps
ns
%
ns
ps
ps
ps
August 18, 2021
XL Datasheet
Table 11. 3.3V AC Electrical Characteristics (Cont.)
VDD = 3.3V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
TJ
Parameter
Total Jitter
Test Condition
Minimum
Typical
Maximum
LVDS.
—
23.6
—
LVPECL.
—
27.7
—
—
19
—
LVDS.
—
890
—
LVPECL.
—
860
—
—
750
—
Minimum
Typical
Maximum
LVDS.
0.75
—
1000
LVPECL.
0.75
—
1000
LVCMOS.
0.75
—
180
Temperature = -20°C to +70°C.
±20
—
±100
ppm
Temperature = -40°C to +85°C.
±25
—
±100
ppm
Temperature = -40°C to +105°C.
±50
—
±100
ppm
LVCMOS.
fJITTER
Phase Jitter (12kHz–20MHz)
FOUT = 125MHz.
FOUT = 125MHz.
LVCMOS.
Units
ps
fs
Table 12. 2.5V AC Electrical Characteristics
VDD = 2.5V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
F
Parameter
Output Frequency Range
Frequency Stability
tR
—
—
±3
ppm
Aging (10 years)
TA = 25°C.
—
—
±10
ppm
Start-up Time
Output Rise Time
LVDS.
Differential.
—
100
—
LVPECL.
VDD - 2.0V.
—
50
—
LVCMOS.
To GND.
—
15
—
pF
Output valid time after VDD meets minimum
specified level.
—
—
10
ms
LVDS.
—
—
400
—
—
400
—
—
3.5
—
—
400
—
—
400
—
—
3
LVDS.
45
—
55
LVPECL.
45
—
55
LVCMOS.
45
—
55
—
—
100
20% to 80% Vpp.
LVPECL.
10% to 90% VDD.
LVDS.
Output Fall Time
80% to 20% Vpp.
LVPECL.
LVCMOS.
ODC
TOE
MHz
TA = 25°C.
LVCMOS.
tF
Units
Aging (1st year)
Output Load
TST
Test Condition
Output Clock Duty Cycle
Output Enable/ Disable Time
©2021 Renesas Electronics Corporation
90% to 10% VDD.
—
10
Ω
ps
ns
ps
ns
%
ns
August 18, 2021
XL Datasheet
Table 12. 2.5V AC Electrical Characteristics (Cont.)
VDD = 2.5V ±5%, TA = -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol
JPER
Parameter
Period Jitter, RMS
Test Condition
Minimum
Typical
Maximum
LVDS.
—
4
—
LVPECL.
—
5.12
—
—
3.3
—
LVDS.
—
1.4
—
LVPECL.
—
1.36
—
—
1.3
—
LVDS.
—
9.2
—
LVPECL.
—
10
—
—
6.7
—
LVDS.
—
29.2
—
LVPECL.
—
29.3
—
—
25.6
—
LVDS.
—
1040
—
LVPECL.
—
1200
—
—
850
—
LVCMOS.
RJ
Random Jitter
LVCMOS.
DJ
Deterministic Jitter
LVCMOS.
TJ
Total Jitter
LVCMOS.
fJITTER
Phase Jitter (12kHz–20MHz)
LVCMOS.
FOUT = 125MHz.
FOUT = 125MHz.
FOUT = 125MHz.
FOUT = 125MHz.
FOUT = 125MHz.
Units
ps
ps
ps
ps
fs
Notes for all AC Electrical Characteristics tables:
1
All jitter values provided at 156.25MHz, unless noted otherwise.
©2021 Renesas Electronics Corporation
11
August 18, 2021
XL Datasheet
Output Waveforms – LVDS
Output Levels/Rise Time/Fall Time Measurements
TF
TR
OUTPUT 2
50% VPP
20% to 80% VPP
VOS
VOD
OUTPUT 1
Oscillator Symmetry
Ideally, Symmetry should be 50/50 for ½ period –Other expressions are 45/55 or 55/45
VOH
OUTPUT 2
50% VPP
OUTPUT 1
VOL
½ Period
Period
Output Waveforms – LVPECL
Rise Time/Fall Time Measurements
TF
TR
VOH
OUTPUT 2
20% to 80% VPP
OUTPUT 1
VOL
Oscillator Symmetry
VOH
OUTPUT 2
50% VPP
OUTPUT 1
VOL
½ Period
Period
©2021 Renesas Electronics Corporation
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August 18, 2021
XL Datasheet
Output Waveforms – LVCMOS
©2021 Renesas Electronics Corporation
13
August 18, 2021
XL Datasheet
Package Outline Drawings
The package outline drawings (JS6, JX6, JU6) are appended at the end of this document. The package information is the most current
data available.
Marking Diagrams
JX6 3.2 × 2.5 mm Package Option (example based on XLH320010.000000I)
▪ Line 1:
• “010” denotes last three digits to the left of the decimal point as shown in the above
example. This number will vary depending upon the frequency value selected in the
orderable part number.
• “YW” denotes the last digit of the year and work week the part was assembled.
JS6 5.0 × 3.2 mm Package Option (example based on XLH536210.380000I)
▪ Line 1:
• “XL” = family; “H” = output type; “5” = package size; “3” = voltage; “6” = precision
level. This number will vary depending upon the output type, voltage, and precision
values selected in the orderable part number.
▪ Line 2:
• “210” denotes last three digits to the left of the decimal point as shown in the above
example. This number will vary depending upon the frequency value selected in the
orderable part number.
• “YW” denotes the last digit of the year and work week the part was assembled.
JU6 7.0 × 5.0 mm Package Option (example based on XLH735004.915200X)
▪ Line 1:
• “XL” = family; “H” = output type; “7” = package size; “3” = voltage; “5” = precision
level. This number will vary depending upon the output type, voltage, and precision
values selected in the orderable part number.
▪ Line 2:
• “004” denotes last three digits to the left of the decimal point as shown in the above
example. This number will vary depending upon the frequency value selected in the
orderable part number.
• “YW” denotes the last digit of the year and work week the part was assembled.
©2021 Renesas Electronics Corporation
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August 18, 2021
XL Datasheet
Revision History
Revision Date
Description of Change
August 18, 2021
Moved XO and VCXO ordering information tables to be just after Pin Descriptions.
January 19, 2021
▪ Removed 4-pin package description table, figure, and package drawing references.
▪ Added footnote for pin 5 in Table 1.
▪ Added footnote under “Output Type” in XO Ordering Information.
January 12, 2021
Added Marking Diagrams section and updated Package Outline Drawings links.
October 27, 2020
Added pin counts to Output Type in XO ordering table.
September 21, 2020
Added typical IDD to tables. Added more frequency ranges to IDD tables. Updated H to be LVCMOS in order
code.
April 27, 2020
Updated ODC parameter. 2nd LVCMOS row to be changed from 62.5 MHz.
September 7, 2018
Updated frequency stability options value from ±20ppm to ±25ppm for -40°C to +85°C XO only.
June 25, 2018
▪ Updated Package Outline Drawings section.
May 4, 2018
▪
▪
▪
▪
January 12, 2018
Initial release.
Added XO and VCXO options.
Updated description and Features sections.
Updated Package Outline Drawings section.
Added VCXO Ordering Information decoder diagram.
©2021 Renesas Electronics Corporation
15
August 18, 2021
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