0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
ZSPM4011BA1R50

ZSPM4011BA1R50

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

  • 描述:

    PQFN / 16 / 3X3MM# G1 T&R - 13"

  • 数据手册
  • 价格&库存
ZSPM4011BA1R50 数据手册
ZSPM4011B High Efficiency 1A Synchronous Buck Converter Brief Description Benefits The ZSPM4011B is a DC/DC synchronous switching regulator with fully integrated power switches, internal compensation, and full fault protection. The 1MHz switching frequency enables using small filter components, resulting in reduced board space and reduced bill-of-materials costs. • The ZSPM4011B utilizes current mode feedback in normal regulation pulse-width modulation (PWM) mode. When the regulator is disabled (EN pin is low), the ZSPM4011B draws less than 10µA quiescent current. • • Available Support Physical Characteristics • • Related IDT Products • • • • • • • © 2016 Integrated Device Technology, Inc. ZSPM4011B Application Circuits Adjustable Output BST VCC EN ZSPM4011B CBYPASS EN CBST VSW PGND VCC GND • • Output voltage options (depends on order code):  Fixed output voltages: 1.5V, 1.8V, 2.5V, 3.3V, or 5V with +/- 2% output tolerance  Adjustable output voltage range: 0.9V to 5.5V with +/- 1.5% reference Wide input voltage range: 4.5V to 24V 1MHz +/- 10% fixed switching frequency 1A continuous output current High efficiency – up to 95% Current mode PWM control with pulsefrequency modulation (PFM) mode for improved light load efficiency Voltage supervisor for VOUT reported at the PG pin Input supply under voltage lockout Soft start for controlled startup with no overshoot Full protection for over-current, overtemperature, and VOUT over-voltage Less than 10µA in Disabled Mode Low external component count VOUT LOUT RTOP COUT RBOT FB VOUT 10 kΩ (optional) PG PG Fixed Output VCC BST VCC CBYPASS EN ZSPM4011B • ZSPM4012B/ZSPM4013B: 2A/3A synchronous buck converters, available with adjustable output from 0.9 to 5.5V or fixed output voltages at 1.5V, 1.8V, 2.5V, 3.3V, 5.0V (16-pin 3x3 QFN) ZSPM1000: >5A single-phase, single-rail, true digital PWM controller (24-lead 4x4mm QFN) EN 1 PGND • Junction operating temperature -40°C to 125°C Packaged in a 16pin QFN (3x3mm) GND • Evaluation Kit Documentation • Features • Increased battery life Minimal external component count (3 capacitors, 1 inductor) Inherent fault protection and reporting • The ZSPM4011B integrates a wide range of protection circuitry, including input supply undervoltage lockout, output voltage soft start, current limit, VOUT over-voltage, and thermal shutdown. The ZSPM4011B includes supervisory reporting through the PG (Power Good) open drain output to interface other components in the system. • Datasheet VSW CBST VOUT LOUT COUT FB VOUT 10kΩ (optional) PG PG January 27, 2016 ZSPM4011B High Efficiency 1A Synchronous Buck Converter ZSPM4011B Block Diagram EN PG Datasheet VCC 4.2V VCC VCC MONITOR & CONTROL Oscillator Typical Applications • • • • • Wireless access points, cable modems Set-top boxes DVD, LCD, LED supplies Portable products, including GPS, smart phones, tablet PCs Printers VCC Over-Voltage Protection FB Bootstrap Voltage Thermal Protection Ramp Generator Vref & Soft Start Under-Voltage Protection BST Over Current Protection VCC S Gate Drive Gate Drive Control Comparator Gate Drive Error Amp Compensation Network VSW High-Side Switch Vref PGND Low-Side Switch FB PFM Mode Comparator GND Ordering Information Ordering Code Description ZSPM4011BA1W00 ZSPM4011BA1W15 ZSPM4011BA1W18 ZSPM4011BA1W25 ZSPM4011BA1W33 ZSPM4011BA1W50 ZSPM4011BKIT 1A Synchronous Buck Converter: adjustable output, 0.9V to 5.5V, 16-pin 3x3mm QFN 1A Synchronous Buck Converter: fixed output, 1.5V,16-pin 3x3mm QFN 1A Synchronous Buck Converter: fixed output, 1.8V,16-pin 3x3mm QFN 1A Synchronous Buck Converter: fixed output, 2.5V,16-pin 3x3mm QFN 1A Synchronous Buck Converter: fixed output, 3.3V,16-pin 3x3mm QFN 1A Synchronous Buck Converter: fixed output, 5.0V,16-pin 3x3mm QFN ZSPM4011BKIT, Evaluation Kit for 1A Synchronous Buck Converter Package Corporate Headquarters Sales 6024 Silver Creek Valley Road San Jose, CA 95138 www.IDT.com 1-800-345-7015 or 408-284-8200 Fax: 408-284-2775 www.IDT.com/go/sales 7” reel with 1000 ICs 7” reel with 1000 ICs 7” reel with 1000 ICs 7” reel with 1000 ICs 7” reel with 1000 ICs 7” reel with 1000 ICs Kit Tech Support www.IDT.com/go/support DISCLAIMER Integrated Device Technology, Inc. (IDT) reserves the right to modify the products and/or specifications described herein at any time, without notice, at IDT's sole discretion. Performance specifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT's products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the property of IDT or their respective third party owners. For datasheet type definitions and a glossary of common terms, visit www.idt.com/go/glossary. All contents of this document are copyright of Integrated Device Technology, Inc. All rights reserved. © 2016 Integrated Device Technology, Inc. 2 January 27, 2016 ZSPM4011B Datasheet Contents 1 2 3 4 5 6 7 8 9 ZSPM4011B Characteristics ............................................................................................................................... 5 1.1. Absolute Maximum Ratings .......................................................................................................................... 5 1.2. Thermal Characteristics ................................................................................................................................ 5 1.3. Recommended Operating Conditions .......................................................................................................... 6 1.4. Electrical Characteristics .............................................................................................................................. 6 1.5. Regulator Characteristics ............................................................................................................................. 7 Typical Performance Characteristics – ZSPM401x Family ................................................................................. 9 Description of Circuit ......................................................................................................................................... 12 3.1. Block Diagram ............................................................................................................................................ 12 3.2. Internal Protection Details .......................................................................................................................... 13 3.2.1. Internal Current Limit ........................................................................................................................... 13 3.2.2. Thermal Shutdown ............................................................................................................................... 13 3.2.3. Voltage Reference Soft-Start ............................................................................................................... 13 3.2.4. VCC Under-Voltage Lockout................................................................................................................ 13 3.2.5. Output Over-Voltage Protection ........................................................................................................... 14 3.2.6. Output Under-Voltage Monitoring ........................................................................................................ 14 Application Circuits ............................................................................................................................................ 15 4.1. Selection of External Components ............................................................................................................. 15 4.2. Typical Application Circuits ......................................................................................................................... 15 Pin Configuration and Package ......................................................................................................................... 16 5.1. Package Dimensions .................................................................................................................................. 16 5.2. Marking Diagram & Pin-out ........................................................................................................................ 17 5.3. Pin Description for 16 LEAD 3x3 QFN ....................................................................................................... 18 5.4. Detailed Pin Description ............................................................................................................................. 19 5.4.1. Unregulated Input, VCC (Pins # 2, 3) .................................................................................................. 19 5.4.2. Bootstrap Control, BST (Pin #10) ........................................................................................................ 19 5.4.3. Sense Feedback, FB (Pin #5) .............................................................................................................. 19 5.4.4. Switching Output, VSW (Pins #12, 13) ................................................................................................ 19 5.4.5. Ground, GND (Pin #4) ......................................................................................................................... 19 5.4.6. Power Ground, PGND (Pins #14, 15) .................................................................................................. 19 5.4.7. Enable, EN (Pin #9) ............................................................................................................................. 19 5.4.8. PG Output, PG (Pin #8) ....................................................................................................................... 19 Ordering Information ......................................................................................................................................... 20 Related Documents ........................................................................................................................................... 20 Glossary ............................................................................................................................................................ 20 Document Revision History ............................................................................................................................... 21 © 2016 Integrated Device Technology, Inc. 3 January 27, 2016 ZSPM4011B Datasheet List of Figures Figure 2.1 Figure 2.2 Figure 2.3 Figure 2.4 Figure 2.5 Figure 2.6 Figure 2.7 Figure 2.8 Figure 2.9 Figure 2.10 Figure 2.11 Figure 2.12 Figure 2.13 Figure 2.14 Figure 2.15 Figure 2.16 Figure 2.17 Figure 2.18 Figure 3.1 Figure 3.2 Figure 4.1 Figure 4.2 Figure 5.1 Figure 5.2 Startup Response .................................................................................................................................. 9 100mA to 1A Load Step (VCC= 12V, VOUT =1.8V) ............................................................................. 9 100mA to 2A Load (VCC=12V, VOUT = 1.8V) ...................................................................................... 9 100mA t0 1A Load Step (VCC=12V, VOUT = 3.3V) ............................................................................. 9 100mA to 2A Load Step (VCC=12V, VOUT = 3.3V) ............................................................................. 9 Line Transient Response (VCC=10V to 15V, VOUT = 3.3V) ................................................................ 9 Load Regulation ................................................................................................................................... 10 Line Regulation (IOUT=1A) .................................................................................................................... 10 Efficiency vs. Output Current ( VOUT = 1.8V) ..................................................................................... 10 Efficiency vs. Output Current ( VOUT = 3.3V) ..................................................................................... 10 Efficiency vs. Output Current (VOUT= 5V) .......................................................................................... 10 Efficiency vs. Input Voltage (VOUT = 3.3V) ......................................................................................... 10 Standby Current vs. Input Voltage ....................................................................................................... 11 Standby Current vs. Temperature ....................................................................................................... 11 Output Voltage vs. Temperature.......................................................................................................... 11 Oscillator Frequency vs. Temperature (Iout=300mA) ......................................................................... 11 Quiescent Current vs. Temperature (No load) .................................................................................... 11 Input Current vs. Temperature (No load, No switching) ..................................................................... 11 ZSPM4011B Block Diagram ................................................................................................................ 12 Monitor and Control Logic Functionality .............................................................................................. 13 Typical Application for Adjustable Output Voltage............................................................................... 15 Typical Application for Fixed Output Voltage ....................................................................................... 15 ZSPM4011B Package Drawing ........................................................................................................... 16 16 Lead 3x3mm QFN (top view) .......................................................................................................... 17 List of Tables Table 1.1 Table 1.2 Table 1.3 Table 1.4 Table 1.5 Table 5.1 Absolute Maximum Ratings ................................................................................................................... 5 Thermal Characteristics ......................................................................................................................... 5 Recommended Operating Conditions ................................................................................................... 6 Electrical Characteristics ....................................................................................................................... 6 Regulator Characteristics ...................................................................................................................... 7 Pin Description, 16 lead, 3x3mm QFN ................................................................................................ 18 © 2016 Integrated Device Technology, Inc. 4 January 27, 2016 ZSPM4011B Datasheet 1 ZSPM4011B Characteristics Important: Stresses beyond those listed under “Absolute Maximum Ratings” (section 1.1) may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” (section 1.3) is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. 1.1. Absolute Maximum Ratings Over operating free–air temperature range unless otherwise noted. Table 1.1 Absolute Maximum Ratings Parameter Value 1) UNIT Voltage on VCC pin -0.3 to 26.4 V Voltage on BST pin -0.3 to (VCC+6) V Voltage on VSW pin -1 to 26.4 V -0.3 to 6 V +/-2k V +/-500 V 260 °C Voltage on EN, PG, FB pins Electrostatic Discharge – Human Body Model 2) Electrostatic Discharge – Charge Device Model 2) Lead Temperature (soldering, 10 seconds) 1) 2) All voltage values are with respect to network ground terminal. ESD testing is performed according to the respective JESD22 JEDEC standard. 1.2. Thermal Characteristics Table 1.2 Thermal Characteristics Parameter Symbol Value Unit θJA 34.5 °C/W θJc 2.5 °C/W Storage Temperature Range TSTG -65 to 150 °C Maximum Junction Temperature TJ MAX 150 °C TJ -40 to 125 °C Thermal Resistance Junction to Air 1) Thermal Resistance Junction to Case 1) Operating Junction Temperature Range 1) Assumes 1 in area of 2 oz. copper and 25°C ambient temperature. 2 © 2016 Integrated Device Technology, Inc. 5 January 27, 2016 ZSPM4011B Datasheet 1.3. Recommended Operating Conditions Table 1.3 Recommended Operating Conditions Parameter Input Operating Voltage Bootstrap Capacitor Output Filter Inductor Typical Value 1) Output Filter Capacitor Typical Value 2) Output Filter Capacitor ESR Input Supply Bypass Capacitor Typical Value 1) 2) 3) 1.4. 3) Symbol Min Typ Max Unit VCC 4.5 12 24 V CBST 17.6 22 26.4 nF LOUT 3.76 4.7 5.64 µH COUT 33 44 (2 x 22) COUT-ESR 2 35 CBYPASS 8 10 µF 100 mΩ µF For best performance, an inductor with a saturation current rating higher than the maximum VOUT load requirement plus the inductor current ripple. For best performance, a low ESR ceramic capacitor should be used. For best performance, a low ESR ceramic capacitor should be used. If CBYPASS is not a low ESR ceramic capacitor, a 0.1µF ceramic capacitor should be added in parallel to CBYPASS. Electrical Characteristics Electrical Characteristics, TJ = -40°C to 125°C, VCC = 12V (unless otherwise noted) Table 1.4 Electrical Characteristics Parameter Symbol Condition Min Typ Max Unit 24 V VCC Supply Voltage Input Supply Voltage Quiescent Current: Normal Mode Quiescent Current: Normal Mode, Non-switching Quiescent Current: Disabled Mode VCC ICC-NORM ICCNOSWITCH ICC-DISABLE 4.5 VCC = 12V, ILOAD = 0A, EN ≥ 2.2 5.2 mA VCC=12V, ILOAD=0A, EN ≥ 2.2 Non-switching 2.3 mA VCC = 12V, EN = 0V 5 10 µA 4.1 4.3 4.5 V 300 325 350 mV 0.9 1 1.1 MHz VCC Under Voltage Lockout Input Supply Under Voltage Threshold Input Supply Under Voltage Threshold Hysteresis VCC-UV VCC Increasing VCCUV_HYST Oscillator Oscillator Frequency fOSC © 2016 Integrated Device Technology, Inc. 6 January 27, 2016 ZSPM4011B Datasheet Parameter Symbol Condition Min Typ Max Unit PG Open Drain Output PG Release Timer tPG High-Level Output Leakage IOH-PG VPG = 5V Low-Level Output Voltage VOL-PG IPG = -0.3mA 10 ms 0.5 µA 0.01 V EN Input Voltage Thresholds High Level Input Voltage VIH-EN Low Level Input Voltage VIL-EN Input Hysteresis Input Leakage 2.2 0.8 VHYST-EN IIN-EN V V 480 mV VEN=5V 3.5 µA VEN=0V -1.5 µA 170 °C 10 °C Thermal Shutdown Thermal Shutdown Junction Temperature TSD Hysteresis 1.5. TSD Note: Guaranteed by design 150 TSDHYST Regulator Characteristics Electrical Characteristics, TJ = -40°C to 125°C, VCC = 12V (unless otherwise noted) Table 1.5 Regulator Characteristics See important table notes at the end of the table. Parameter Symbol Condition Min Typ Max Unit ILOAD =1A VOUT – 2% VOUT VOUT + 2% V ILOAD = 0A VOUT – 1% VOUT + 1% VOUT + 3.5% V Switch Mode Regulator: L=4.7µH and C=2 x 22µF Output Voltage Tolerance in Pulse-Width Modulation (PWM) Mode VOUT- Output Voltage Tolerance in Pulse-Frequency Modulation (PFM) Mode VOUT- Differential Voltage Between VOUT and VCC PWM PFM VIN-OUT High Side Switch On 1) Resistance Low Side Switch On 1) Resistance Steady State. (Example, VOUT maximum is 3.3V with VCC min of 4.5V) 1.2 V IVSW = -1A 180 mΩ IVSW = 1A 120 mΩ RDSON Output Current IOUT Over Current Detect IOCD © 2016 Integrated Device Technology, Inc. HS switch current 7 1.4 1.8 1 A 2.4 A January 27, 2016 ZSPM4011B Datasheet Parameter Symbol Feedback Reference (Adjustable Mode) FBTH Soft Start Ramp Time tSS PFM Mode FB Comparator Tolerance FBTH-TOL PFM Mode FB Comparator Threshold FBTH-PFM VOUT Under Voltage Threshold VOUT-UV VOUT Under Voltage Hysteresis VOUT Over Voltage Threshold VOUT Over Voltage Hysteresis Max Duty Cycle 1) 2) 1) 2) Condition Min Typ Max Unit 0.886 0.9 0.914 V 4 For the adjustable version, the ratio of VCC/Vout cannot exceed 16 -1.5 ms 1.5 VOUT + 1% 88% VOUT VOUT- 90% VOUT % V 92% VOUT 1.5% VOUT UV_HYST VOUT-OV 103% VOUT VOUT- 1% VOUT OV_HYST DUTYMAX 95% 97% 99% RDSON is characterized at 1A and tested at lower current in production. Regulator VSW pin is forced off for 240ns every 8 cycles to ensure the BST cap is replenished. © 2016 Integrated Device Technology, Inc. 8 January 27, 2016 ZSPM4011B Datasheet 2 Typical Performance Characteristics – ZSPM401x Family Graphs apply to ZSPM401x ICs. See section 1 for ZSPM4011B characteristics. Unless otherwise noted, TJ = -40°C to 125°C, VCC = 12V. Figure 2.1 Startup Response Figure 2.2 100mA to 1A Load Step (VCC= 12V, VOUT =1.8V) Figure 2.3 100mA to 2A Load (VCC=12V, VOUT = 1.8V) Figure 2.4 100mA t0 1A Load Step (VCC=12V, VOUT = 3.3V) Figure 2.5 100mA to 2A Load Step (VCC=12V, VOUT = 3.3V) Figure 2.6 Line Transient Response (VCC=10V to 15V, VOUT = 3.3V) © 2016 Integrated Device Technology, Inc. 9 January 27, 2016 ZSPM4011B Datasheet Figure 2.7 Load Regulation Figure 2.8 Line Regulation (IOUT=1A) Figure 2.9 Efficiency vs. Output Current ( VOUT = 1.8V) Figure 2.10 Efficiency vs. Output Current ( VOUT = 3.3V) Figure 2.11 Efficiency vs. Output Current (VOUT= 5V) Figure 2.12 Efficiency vs. Input Voltage (VOUT = 3.3V) © 2016 Integrated Device Technology, Inc. 10 January 27, 2016 ZSPM4011B Datasheet Figure 2.13 Standby Current vs. Input Voltage Figure 2.14 Standby Current vs. Temperature Figure 2.15 Output Voltage vs. Temperature Figure 2.16 Oscillator Frequency vs. Temperature (Iout=300mA) Figure 2.17 Quiescent Current vs. Temperature (No load) Figure 2.18 Input Current vs. Temperature (No load, No switching) © 2016 Integrated Device Technology, Inc. 11 January 27, 2016 ZSPM4011B Datasheet 3 Description of Circuit The ZSPM4011B current-mode synchronous step-down power supply product can be used in the commercial, industrial, and automotive market segments. It includes flexibility for a wide range of output voltages and is optimized for high efficiency power conversion with low RDSON integrated synchronous switches. A 1MHz internal switching frequency facilitates low-cost LC filter combinations. The fixed-output versions also enable a minimum external component count to provide a complete regulation solution with only 4 external components: an input bypass capacitor, an inductor, an output capacitor, and the bootstrap capacitor. The regulator automatically transitions between pulse frequency modulation (PFM) and pulse width modulation (PWM) mode to maximize efficiency for the load demand. See section 5.4.3 for details for adjusting VOUT for the adjustable output version of the ZSPM4011B. 3.1. Block Diagram Figure 3.1 provides a block diagram of the ZSPM4011B, and Figure 3.2 illustrates its monitor and control logic functions, which are explained in section 3.2. Figure 3.1 ZSPM4011B Block Diagram EN PG VCC 4.2V VCC VCC MONITOR & CONTROL Oscillator VCC Over-Voltage Protection Bootstrap Voltage BST Over Current Protection VCC S Gate Drive Gate Drive Control Comparator Vref VSW High-Side Switch Gate Drive Error Amp Compensation Network FB Thermal Protection Ramp Generator Vref & Soft Start Under-Voltage Protection PGND Low-Side Switch FB PFM Mode Comparator GND © 2016 Integrated Device Technology, Inc. 12 January 27, 2016 ZSPM4011B Datasheet Figure 3.2 Monitor and Control Logic Functionality PG VOUT-UV EN Filter Filter ENABLE REGULATOR Internal POR Filter VCC-UV Filter TSD 3.2. 3.2.1. Filter VOUT-OV Filter IOCD OCD_Filter TRI-STATE VSW OUTPUT Internal Protection Details Internal Current Limit The current through the high side FET is sensed on a cycle-by-cycle basis, and if the current limit is reached, the over-current detection (OCD) circuit will abbreviate the cycle. The device also senses the FB pin to identify hard short conditions and will direct the VSW output to skip 4 cycles if the current limit occurs when FB is low. This allows current built up in the inductor during the minimum on-time to decay sufficiently. The current limit is always active when the regulator is enabled. Soft start ensures that current limit does not prevent regulator startup. An additional feature of the over-current protection circuitry is that under extended over-current conditions, the device will automatically disable. A simple toggle of the EN enable pin will return the device to normal operation. 3.2.2. Thermal Shutdown If the temperature of the die exceeds 170°C (typical), the thermal shutdown (TSD) circuit will set the VSW outputs to the tri-state level to protect the device from damage. The PG and all other protection circuitry will stay active to inform the system of the failure mode. If the ZSPM4011B cools to 160°C (typical), it will attempt to start up again, following the normal soft start sequence. If the device reaches 170°C, the shutdown/restart sequence will repeat. 3.2.3. Voltage Reference Soft-Start The voltage reference in this device is ramped at a rate of 4ms to prevent the output from overshoot during startup. This ramp restarts whenever there is a rising edge sensed on the EN pin. This occurs in both the fixed and adjustable versions. During the soft start ramp, current limit is still active and still protects the device if the output is shorted. 3.2.4. VCC Under-Voltage Lockout The ZSPM4011B is held in the off state until VCC reaches 4.3V (typical). See section 1.4 for the input hysteresis. © 2016 Integrated Device Technology, Inc. 13 January 27, 2016 ZSPM4011B Datasheet 3.2.5. Output Over-Voltage Protection If the output of the regulator exceeds 103% of the regulation voltage, the output over-voltage (OUT-OV) protection circuit will set the VSW outputs to the tri-state level to protect the ZSPM4011B from damage. (See Figure 3.2.) This check occurs at the start of each switching cycle. If it occurs during the middle of a cycle, the switching for that cycle will complete and the VSW outputs will tri-state at the start of the next cycle. 3.2.6. Output Under-Voltage Monitoring The switched mode output voltage is also monitored by the output under-voltage circuit (OUT-UV) as shown in Figure 3.2. The PG line remains low until the output voltage reaches the VOUT-UV threshold (see Table 1.5). Once the internal comparator detects that the output voltage is above the desired threshold, an internal delay timer is activated and the PG line is de-asserted (to high) once this delay timer expires. In the event that the output voltage decreases below VOUT-UV, the PG line will be asserted low and remain low until the output rises above VOUT-UV and the delay timer times out. There is a hysteresis for the VOUT-UV threshold (see Table 1.5. © 2016 Integrated Device Technology, Inc. 14 January 27, 2016 ZSPM4011B Datasheet 4 4.1. Application Circuits Selection of External Components The internal compensation is optimized for a 44µF output capacitor (COUT) and a 4.7µH inductor (LOUT). The minimum allowable value for the output capacitor is 33µF. To keep the output ripple low, a low ESR (less than 35mΩ) ceramic is recommended. The inductor range is 4.7µH +/-20%. For optimal over-current protection, the inductor should be able to handle up to the regulator current limit without saturation. Connect the VCC pin to the bypass capacitor CBYPASS to improve performance (see section 5.4.1). See Table 1.3 for the recommended value. Connect the BST pin to the bootstrap capacitor CBST as described in section 5.4.2. See Table 1.3 for the recommended value. For the adjustable version of the ZSPM4011B, an external voltage resistor divider is required (RTOP and RBOT). See section 5.4.3 for details. 4.2. Typical Application Circuits Figure 4.1 Typical Application for Adjustable Output Voltage Adjustable Output BST VCC ZSPM4011B EN GND EN Figure 4.2 CBST VSW CBYPASS PGND VCC VOUT LOUT RTOP COUT RBOT FB VOUT 10 kΩ (optional) PG PG Typical Application for Fixed Output Voltage Fixed Output BST VCC EN GND EN ZSPM4011B CBYPASS © 2016 Integrated Device Technology, Inc. PGND VCC VSW CBST VOUT LOUT COUT FB VOUT 10kΩ (optional) PG 15 PG January 27, 2016 ZSPM4011B Datasheet 5 5.1. Pin Configuration and Package Package Dimensions Figure 5.1 ZSPM4011B Package Drawing © 2016 Integrated Device Technology, Inc. 16 January 27, 2016 ZSPM4011B Datasheet 5.2. Marking Diagram & Pin-out Figure 5.2 16 Lead 3x3mm QFN (top view) 4011B: Part Name B: Revision XXXXX: Lot number (last five digits) O: Pin 1 mark VL: Voltage level • 15 1.5V • 18 1.8V • 25 2.5V • 33 3.3V • 50 5.0V • 00 0.9V – 5.5V variable MY: Date Code M = Month • 1 January • 2 February • 3 March • 4 April • 5 May • 6 June • 7 July • 8 August • 9 September • A October • B November • C December Y = Year • A 2011 • B 2012 • C 2013 • etc. © 2016 Integrated Device Technology, Inc. 17 January 27, 2016 ZSPM4011B Datasheet 5.3. Pin Description for 16 LEAD 3x3 QFN Table 5.1 Pin Description, 16 lead, 3x3mm QFN Name Pin # Function VSW 1 Switching Voltage Node Connected to a 4.7µH (typical) inductor. Also connect to additional VSW pins 12, 13, and 16. VCC 2 Input Voltage Input voltage. Also connect to additional VCC pins 3 and 11. VCC 3 Input Voltage Input voltage. Also connect to additional VCC pins 2 and 11. GND 4 GND Primary ground for the majority of the device except the low-side power FET. FB 5 Feedback Input Regulator FB voltage. Connects to VOUT for fixed-mode and the output resistor divider for adjustable mode. NC 6 No Connect Not connected. NC 7 No Connect Not connected. PG 8 PG Output Open-drain output. EN 9 Enable Input Above 2.2V the device is enabled. Ground this pin to disable the ZSPM4011B. Includes internal pull-up. BST 10 Bootstrap Capacitor Bootstrap capacitor for the high-side FET gate driver. Connect a 22nF ceramic capacitor from BST pin to VSW pin. VCC 11 Input Voltage Input voltage. Also connect to additional VCC pins 2 and 3. VSW 12 Switching Voltage Node Connect to additional VSW pins 1, 13, and 16. VSW 13 Switching Voltage Node Connect to additional VSW pins 1, 12, and 16. PGND 14 Power GND GND supply for internal low-side FET/integrated diode. Also connect to additional PGND pin 15. PGND 15 Power GND GND supply for internal low-side FET/integrated diode. Also connect to additional PGND pin 14. VSW 16 Switching Voltage Node Connect to additional VSW pins 1, 12, and 13. © 2016 Integrated Device Technology, Inc. Description 18 January 27, 2016 ZSPM4011B Datasheet 5.4. 5.4.1. Detailed Pin Description Unregulated Input, VCC (Pins # 2, 3) This terminal is the unregulated input voltage source for the ZSPM4011B. It is recommended that a 10µF bypass capacitor be placed close to the device for best performance. Since this is the main supply for the ZSPM4011B, good layout practices must be followed for this connection. 5.4.2. Bootstrap Control, BST (Pin #10) This terminal will provide the bootstrap voltage required for the high-side internal NMOS switch of the buck regulator. An external ceramic capacitor placed between the BST input terminal, and the VSW pin will provide the necessary voltage for the high-side switch. In normal operation, the capacitor is re-charged on every low side synchronous switching action. If the switch mode approaches 100% duty cycle for the high side FET, the device th will automatically reduce the duty cycle switch to a minimum off time on every 8 cycle to allow this capacitor to re-charge. 5.4.3. Sense Feedback, FB (Pin #5) This is the input terminal for the output voltage feedback. For the fixed-mode versions, this should be connected directly to VOUT. The connection on the PCB should be kept as short as possible and should be made as close as possible to the capacitor. The trace should not be shared with any other connection. For adjustable-mode versions of the ZSPM4011B, this should be connected to the external resistor divider. To choose the resistors, use the following equation: VOUT = 0.9 (1 + RTOP/RBOT) The input to the FB pin is high impedance, and input current should be less than 100nA. As a result, good layout practices are required for the feedback resistors and feedback traces. When using the adjustable version, the feedback trace should be kept as short and narrow as possible to reduce stray capacitance and the injection of noise. 5.4.4. Switching Output, VSW (Pins #12, 13) This is the switching node of the regulator. It should be connected directly to the 4.7µH inductor with a wide, short trace and to one end of the bootstrap capacitor. It switches between VCC and PGND at the switching frequency. 5.4.5. Ground, GND (Pin #4) This ground is used for the majority of the device including the analog reference, control loop, and other circuits. 5.4.6. Power Ground, PGND (Pins #14, 15) This is a separate ground connection used for the low-side synchronous switch to isolate switching noise from the rest of the device. 5.4.7. Enable, EN (Pin #9) This is the input terminal to activate the regulator. The input threshold is TTL/CMOS compatible. It also has an internal pull-up to ensure a stable state if the pin is disconnected. 5.4.8. PG Output, PG (Pin #8) This is an open drain, active low output. See section 3.2.6 for a description of the function of this pin. © 2016 Integrated Device Technology, Inc. 19 January 27, 2016 ZSPM4011B Datasheet 6 Ordering Information Ordering Code Description Package ZSPM4011BA1W00 1A Synchronous Buck Converter: adjustable output, 0.9V to 5.5V, 16-pin 3x3mm QFN 7” reel with 1000 ICs ZSPM4011BA1W15 1A Synchronous Buck Converter: fixed output, 1.5V,16-pin 3x3mm QFN 7” reel with 1000 ICs ZSPM4011BA1W18 1A Synchronous Buck Converter: fixed output, 1.8V,16-pin 3x3mm QFN 7” reel with 1000 ICs ZSPM4011BA1W25 1A Synchronous Buck Converter: fixed output, 2.5V,16-pin 3x3mm QFN 7” reel with 1000 ICs ZSPM4011BA1W33 1A Synchronous Buck Converter: fixed output, 3.3V,16-pin 3x3mm QFN 7” reel with 1000 ICs ZSPM4011BA1W50 1A Synchronous Buck Converter: fixed output, 5.0V,16-pin 3x3mm QFN 7” reel with 1000 ICs ZSPM4011BKIT ZSPM4011BKIT, Evaluation Kit for 1A Synchronous Buck Converter Kit 7 Related Documents Document ZSPM4011B Feature Sheet ZSPM4011B Evaluation Kit Description Visit IDT’s website www.IDT.com or contact your nearest sales office for the latest version of these documents. 8 Glossary Term Description PWM Pulse width modulation (fixed frequency). PFM Pulse frequency modulation (fixed pulse width). POR Power-on reset ESR Equivalent series resistance. © 2016 Integrated Device Technology, Inc. 20 January 27, 2016 ZSPM4011B Datasheet 9 Document Revision History Revision Date Description 1.00 April 4, 2013 1.10 June 21, 2013 1.20 February 13, 2014 Revision of specifications for “Input Supply Under Voltage Threshold Hysteresis” in Table 1.4. January 27, 2016 Changed to IDT branding. First release of ZSPM4011BB, based on ZSPM4011B, silicon revision A. Update to allow for 5.5V output voltage, new transient response graph, addition of thermal parameter for “Thermal Resistance Junction to Case (θJc)” specification, and revision of “Thermal Resistance Junction to Ambient (θJA)” specification. Corporate Headquarters Sales 6024 Silver Creek Valley Road San Jose, CA 95138 www.IDT.com 1-800-345-7015 or 408-284-8200 Fax: 408-284-2775 www.IDT.com/go/sales Tech Support www.IDT.com/go/support DISCLAIMER Integrated Device Technology, Inc. (IDT) reserves the right to modify the products and/or specifications described herein at any time, without notice, at IDT's sole discretion. Performance specifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT's products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the property of IDT or their respective third party owners. For datasheet type definitions and a glossary of common terms, visit www.idt.com/go/glossary. All contents of this document are copyright of Integrated Device Technology, Inc. All rights reserved. © 2016 Integrated Device Technology, Inc. 21 January 27, 2016
ZSPM4011BA1R50 价格&库存

很抱歉,暂时无法提供与“ZSPM4011BA1R50”相匹配的价格&库存,您可以联系我们找货

免费人工找货