RF2418

RF2418 0 RoHS Compliant & Pb-Free Product Typical Applications • UHF Digital and Analog Receivers • Digital Communication Systems • Commercial and Consumer Systems • 433MHz and 915MHz ISM Band Receivers LOW CURRENT LNA/MIXER • Spread-Spectrum Communication Systems • General Purpose Frequency Conversion Product Description The RF2418 is a monolithic integrated UHF receiver front-end. The IC contains all of the required components to implement the RF functions of the receiver except for the passive filtering and LO generation. It contains an LNA (low-noise amplifier), a second RF amplifier, a dualgate GaAs FET mixer, and an IF output buffer amplifier which will drive a 50 Ω load. In addition, the IF buffer amplifier may be disabled and a high impedance output is provided for easy matching to IF filters with high impedances. The output of the LNA is made available as an output to permit the insertion of a bandpass filter between the LNA and the RF/Mixer section. The LNA section may be disabled by removing the VDD1 connection to the IC. 0.156 0.148 .018 .014 0.010 0.004 0.347 0.339 0.050 0.252 0.236 0.059 0.057 8° MAX 0° MIN 0.0500 0.0164 0.010 0.007 Optimum Technology Matching® Applied Si BJT Si Bi-CMOS InGaP/HBT GaAs HBT SiGe HBT GaN HEMT GaAs MESFET Si CMOS SiGe Bi-CMOS Package Style: SOIC-14 Features • Single 3V to 6.5V Power Supply • High Dynamic Range • Low Current Drain LNA LNA IN 1 GND 2 VDD1 3 VDD2 4 10pF IF BYP 5 IF2 OUT 6 IF1 OUT 7 10 GND 9 DEC MIXER 8 LO IN 14 LNA OUT 13 GND 12 GND 11 RF IN • High LO Isolation • LNA Power Down Mode for Large Signals RF AMP Ordering Information RF2418 RF2418 PCBA Low Current LNA/Mixer Fully Assembled Evaluation Board BUFFER Functional Block Diagram RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com Rev A7 060203 8-21 RF2418 Absolute Maximum Ratings Parameter Supply Voltage Input LO and RF Levels Ambient Operating Temperature Storage Temperature Rating -0.5 to 7 +6 -40 to +85 -40 to +150 Unit VDC dBm °C °C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. RoHS marking based on EUDirective2002/95/EC (at time of this printing). However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Parameter Overall RF Frequency Range Cascade Power Gain Cascade IP3 Cascade Noise Figure Specification Min. Typ. Max. 400 to 1100 23 -13 2.4 Unit Condition T = 25°C, VCC =5V, RF=850MHz, LO=921MHz MHz dB dBm dB High impedance output Referenced to the input Single sideband, includes image filter with 1.0dB insertion loss First Section (LNA) Noise Figure Input VSWR Input IP3 Gain Reverse Isolation Output VSWR 1.8 1.5:1 +4.0 14 40 1.5:1 2.0 dB With external series matching inductor dBm dB dB High impedance output 9.5 1.5:1 +1 9 4000||10pF dB dBm dB Ω Single Sideband With external series matching inductor +3.0 13 Second Section (RF Amp, Mixer, IF1) Noise Figure Input VSWR Input IP3 Conversion Power Gain Output Impedance 7 Second Section (RF Amp, Mixer, IF2) Noise Figure Input VSWR Input IP3 Conversion Gain Output Impedance 10 1.5:1 0 6 30 300 to 1200 -6 to +6 15 40 1.3:1 dB dBm dB Ω MHz dBm dB dB Open Collector Buffered output, 50 Ω load Single Sideband With external series matching inductor -0.5 5 LO Input LO Frequency LO Level LO to RF Rejection LO to IF Rejection LO Input VSWR With pin 5 connected to ground. In order to achieve a low VSWR match at this input, an 82 Ω resistor to ground is placed in parallel with this port. Power Supply Voltage Current Consumption 3.0 12 6 14 20 9 6.5 26 20 V mA mA mA VCC =5.0V, LNA On, Mixer On, Buffer Off VCC =5.0V, LNA On, Mixer On, Buffer On VCC =5.0V, LNA Off, Mixer On, Buffer Off 8-22 Rev A7 060203 RF2418 Pin 1 Function LNA IN Description A series 10nH matching inductor is necessary to achieve specified gain and noise figure at 900MHz. This pin is NOT internally DC-blocked. An external blocking capacitor must be provided if the pin is connected to a device with DC present. A DC path to ground (i.e. an inductor or resistor to ground) is, however, acceptable at this pin. If a blocking capacitor is required, a value of 22pF is recommended. Interface Schematic LNA IN 2 3 GND VDD1 Ground connection. Keep traces physically short and connect immediately to ground plane for best performance. Supply Voltage for the LNA only. A 22pF external bypass capacitor is required and an additional 0.01 μF is required if no other low frequency bypass capacitors are near by. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane. For large input signals, VDD1 may be disconnected, resulting in the LNA’s gain changing from +11dB to -26dB and current drain decreasing by 4mA. If the LNA is never required for use, then this pin can be left unconnected or grounded, and Pin 11 is used as the first input. Power supply for the IF buffer amplifier. If the high impedance mixer output is being used, then this pin is not connected. If this pin is connected to ground, an internal 10pF capacitor is connected in parallel with the mixer output. This capacitor functions as an LO trap, which reduces the amount of LO to IF bleed-through and prevents high LO voltages at the mixer output from degrading the mixer’s dynamic range. At higher IF frequencies, this capacitance, along with parasitic layout capacitance, should be parallel resonated out by the choice of the bias inductor value at pin 7. If the internal capacitor is not connected to ground, the buffer amplifier could become unstable. A ~10pF capacitor should be added at the output to maintain the buffer’s stability, but the gain will not be significantly affected. 50 Ω buffered (open source) output port, one of two output options. Pin 7 must have a bias resistor to VDD and pin 6 must have a bias resistor to ground (see Buffered Output Application Schematic) in order to turn the buffer amplifier on. Current drain will increase by approximately 8mA at 5V, and by approximately 5mA at 3V. It is recommended that these bias resistors be less than 1kΩ. High impedance (open drain) output port, one of two output options. This pin must be connected to VDD through a resistor or inductor in order to bias the mixer, even when using IF2 Output. In addition, a 0.01 μF bypass capacitor is required at the other end of the bias resistor or inductor. The ground side of the bypass capacitor should connect immediately to ground plane. This output is intended to drive high impedance IF filters. The recommended matching network is shunt L, series C (see the application schematic, high impedance output). This topology will provide matching, bias, and DC-blocking. Mixer LO input. A high-pass matching network, such as a single shunt inductor (as shown in the application schematics), is the recommended topology because it also rejects IF noise at the mixer input. This filtering is required to achieve the specified noise figures. This pin is NOT internally DC-blocked. An external blocking capacitor must be provided if the pin is connected to a device with DC present. A DC path to ground (i.e. an inductor or resistor to ground) is, however, acceptable at this pin. If a blocking capacitor is required, a value of 22pF is recommended. Connection for the external bypass capacitor for the mixer RF input preamp. 1000pF is recommended. The trace length between the pin and the capacitor should be minimized. The ground side of the bypass capacitor should connect immediately to ground plane. 4 5 VDD2 IF BYP 6 IF2 OUT IF2 OUT 7 IF1 OUT IF1 OUT 8 LO IN LO IN 9 RF BYP Rev A7 060203 8-23 RF2418 Pin 10 11 Function GND RF IN Description Same as pin 2. Mixer RF Input port. For a 50 Ω match at 900MHz use a 15nH series inductor. This pin is NOT internally DC-blocked. An external blocking capacitor must be provided if the pin is connected to a device with DC present. A DC path to ground (i.e. an inductor or resistor to ground) is, however, acceptable at this pin. If a blocking capacitor is required, a value of 22pF is recommended.To minimize the mixer’s noise figure, it is recommended to have a RF bandpass filter before this input. This will prevent the noise at the image frequency from being converted to the IF. Same as pin 2. Same as pin 2. 50 Ω output. Internally DC-blocked. LNA OUT Interface Schematic RF IN 12 13 14 GND GND LNA OUT Application Schematic High Impedance Output Configuration 850MHz 10 nH RF IN 1 2 3 100 nF 47 pF 4 10pF 5 6 C1 IF OUT VDD L1 7 10 1 nF IF Filter, Hi Z BUFFER 9 MIXER 8 10 nH 4 pF LO IN LNA 14 13 12 15 nH 11 Image Filter 50 Ω VDD RF AMP 100 nF L1 and C1 are picked to match the mixer's output impedance (4 kΩ II 10 pF) to the IF filter's impedance, at the IF frequency. C1 also serves as a DC block, in case the IF filter is not an open circuit at DC. 8-24 Rev A7 060203 RF2418 Application Schematic Buffered Output Configuration 850MHz 10 nH RF IN 1 2 3 100 nF 47 pF 4 10pF 5 C1 IF OUT IF Filter, 50Ω R1 6 7 BUFFER 9 MIXER 8 10 nH 4 pF LO IN 10 1 nF LNA 14 13 12 15nH 11 Image Filter, 50 Ω VDD RF AMP VDD R2 L1 L1 should parallel resonate, at the IF frequency, with the internal 10pF capacitor plus any extra parasitic layout capacitance. 100 nF 100 nF R1 and R2 are bias resistors that set the bias current for the buffer amplifier. The value recommended is 510 W, each. Higher values will decrease the current consumption but also decrease the output level at which voltage clipping begins to occur. At lower IF frequencies, where the internal 10 pF capacitor does not roll off the conversion gain, L1 may be eliminated. C1 is a blocking capacitor, in case the IF filter's input is not an open circuit at DC. Rev A7 060203 8-25 RF2418 Evaluation Board Schematic RF=850MHz, IF=71MHz (Download Bill of Materials from www.rfmd.com.) L3 10 nH 1 R4 5.11 kΩ 2 3 P1-3 Jumper E2 E1 see note J1 LNA IN 50 Ω μstrip LNA 14 13 12 50 Ω μstrip 11 10pF 5 6 10 9 MIXER 8 L4 10 nH TP1 R1 300 Ω L1 1 μH see note 50 Ω μstrip J5 LNA OUT RF AMP L2 18 nH 50 Ω μstrip C3 47 pF 4 J4 RF IN R3 610 Ω J2 IF OUT C1 0.1 μF C2 1 nF C5 3 pF to 5 pF BUFFER 50 Ω μstrip 7 J3 LO IN C4 0.1 μF 2418400C P1 NC 1 2 P1-3 3 GND VDD VDD Notes: For high impedance output 1) Populate L1 and TP1 2) Remove jumper E1 to E2 8-26 Rev A7 060203 RF2418 Evaluation Board Layout Board Size 1.52” x 1.52” Board Thickness 0.031”, Board Material FR-4 Rev A7 060203 8-27 RF2418 High Impedance Mixer Gain versus Voltage, RF=850MHz 10.0 26.0 High Impedance Casc. Gain versus Voltage, RF=850MHz 9.5 24.0 9.0 22.0 Gain (dB) 8.5 Gain (dB) 20.0 8.0 T =-40 7.5 T = 26 T = 85 7.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 18.0 T =-40 16.0 T =26 T = 85 14.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Voltage (V) Voltage (V) 4.0 High Impedance Mixer Input IP3 versus Voltage, RF=850MHz T =-40 -10.0 -10.5 -11.0 -11.5 High Impedance Casc. Input IP3 versus Voltage, RF=850MHz T =-40 T =26 T = 85 3.5 T = 26 T = 85 3.0 IIP3 (dBm) 2.5 IIP3 (dBm) 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 -12.0 -12.5 -13.0 -13.5 -14.0 2.0 1.5 1.0 -14.5 0.5 -15.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Voltage (V) Voltage (V) 17.0 16.0 15.0 14.0 13.0 12.0 11.0 10.0 9.0 8.0 7.0 3.0 3.5 Buffered LNA Gain versus Voltage, RF=850MHz 15.0 14.0 13.0 12.0 11.0 10.0 9.0 8.0 T =-40 T = 26 T =85 6.0 5.0 7.0 Buffered Mixer Gain versus Voltage, RF=850MHz T =-40 T = 26 T = 85 Gain (dB) 4.0 4.5 5.0 5.5 6.0 6.5 Gain (dB) 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Voltage (V) Voltage (V) 8-28 Rev A7 060203 RF2418 30.0 Buffered Casc. Gain versus Voltage, RF=850MHz T =-40 T =26 6.0 Buffered LNA Input versus Voltage, RF=850MHz T =-40 4.0 T = 26 T =85 25.0 T = 85 2.0 IIP3 (dBm) 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Gain (dB) 20.0 0.0 -2.0 15.0 -4.0 -6.0 10.0 -8.0 5.0 -10.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Voltage (V) Voltage (V) 2.0 1.5 1.0 0.5 Buffered Mixer Input IP3 versus Voltage, RF=850MHz T =-40 T = 26 T = 85 -10.0 Buffered Casc. Input IP3 versus Voltage, RF=850MHz T =-40 -11.0 T =26 T = 85 -12.0 IIP3 (dBm) IIP3 (dBm) 0.0 -0.5 -1.0 -1.5 -2.0 -13.0 -14.0 -15.0 -2.5 -3.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 -16.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Voltage (V) Voltage (V) 2.0 Buffered LNA Noise Figure versus Voltage, RF=850MHz Part to Part Variation 11.0 Buffered Mixer Noise Figure versus Voltage, RF=850MHz Part to Part Variation Part 1 Part 1 Part 2 Part 3 1.8 Part 4 Part 5 10.5 Part 2 Part 3 Part 4 Part 5 Gain (dB) Gain (dB) 1.6 1.4 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 10.0 9.5 9.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Voltage (V) Voltage (V) Rev A7 060203 8-29 RF2418 8-30 Rev A7 060203