RF2461

RF2461 0 Typical Applications • CDMA/FM (AMPS) Systems • Dual-Mode TACS/JCDMA Systems • General Purpose Downconverter Product Description The RF2461 is a receiver front-end designed for the receive section of dual-mode CDMA/FM cellular applications. It is designed to amplify and downconvert RF signals, while providing 30dB of stepped gain control range. Features include digital control of LNA gain, mixer gain, and power down mode. Another feature of the chip is adjustable IIP3 of the LNA and mixer using an off-chip current setting resistor. Noise figure, IP3, and gain are designed to be compatible with the IS-98B interim standard for CDMA cellular communications. The IC is manufactured on an advanced Silicon Germanium Bi-CMOS process and is assembled in a 4mmx4mm, 20-pin, QFN package. RoHS Compliant & Pb-Free Product CDMA/FM LOW NOISE AMPLIFIER/MIXER 900MHz DOWNCONVERTER • Commercial and Consumer Systems • Portable Battery-Powered Equipment 0.15 C A -A- 0.05 C 4.00 2 PLCS 1.00 0.90 2 PLCS 0.05 0.15 C B 3.75 4.00 Dimensions in mm. 12° MAX 0.15 C 2 PLCS -B- -C- 3.75 0.15 C 2 PLCS Note orientation of package. 0.10 M C A B 0.20 0.60 0.24 TYP 2 0.65 0.30 4 PLCS NOTES: 1 Shaded lead is Pin 1. Dimension applies to plated terminal: 2 to be measured between 0.02 mm and 0.25 mm from terminal end. 2.10 SQ. 0.75 0.50 0.50 0.23 0.13 4 PLCS Optimum Technology Matching® Applied Si BJT Si Bi-CMOS InGaP/HBT GaAs HBT SiGe HBT GaN HEMT GaAs MESFET Si CMOS SiGe Bi-CMOS Package Style: QFN, 20-Pin, 4x4 Features • Complete Receiver Front-End • Stepped LNA/Mixer Gain Control ENABLE IP SET IF SEL VCC2 LO IN • Adjustable LNA/Mixer Bias Current • Adjustable LNA/Mixer IIP3 15 IF2+ 20 19 18 17 16 LNA GAIN 1 • Meets IMD Tests with Three Gain States/Two Logic Control Lines MIX GAIN 2 14 IF2- LNA IN 3 13 BYPASS VCC1 4 12 IF1+ Ordering Information RF2461 CDMA/FM Low Noise Amplifier/Mixer 900MHz Downconverter RF2461PCBA-41X Fully Assembled Evaluation Board RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com GND1B 5 11 IF1- 6 LNA OUT 7 ISET2 8 ISET1 9 GND3B 10 MIX IN Functional Block Diagram Rev B6 060925 8-103 RF2461 Absolute Maximum Ratings Parameter Supply Voltage Input LO and RF Levels Operating Ambient Temperature Storage Temperature Rating -0.5 to +5.0 +6 -40 to +85 -40 to +150 Unit VDC dBm °C °C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. RoHS marking based on EUDirective2002/95/EC (at time of this printing). However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Parameter Overall RF Frequency Range LO Frequency Range IF Frequency Range Power Down Current Specification Min. Typ. Max. 800 700 0.1 869 to 894 832 to 870 954 to 979 722 to 760 1000 1000 250 10 15.0 14.5 1.8 1.8 +11.0 +9.0 6.5 5.0 16.0 15.0 2 2 Unit MHz MHz MHz μA dB dB dB dB dBm dBm mA mA LNA Gain=1 IPSET=1 IPSET=0 IPSET=1 IPSET=0 IPSET=1 IPSET=0 IPSET=1 IPSET=0 LNA Gain=0 Condition T = 25°C, VCC =3.0V LNA - CDMA/JCDMA Gain Noise Figure Input IP3 Current +9.0 +7.0 14.0 13.5 LNA Bypass CDMA/JCDMA Gain Noise Figure Input IP3 Current -8 +16.0 -6 6 +18.0 0 8 dB dB dBm mA Mixer - CDMA Gain Noise Figure Input IP3 Current +3.0 +13.0 13 4 14.5 5.8 5.5 13 +4.0 +14.0 21 18 dB dB dB dB dBm dBm mA mA 7 14 Mixer - JCDMA Gain Noise Figure Input IP3 Current +2.0 +10.0 12 2.5 13 4.0 5.5 13 +3.0 +12.0 24 21 dB dB dB dB dBm dBm mA mA 7 14 3kΩ balanced load. IIP3 is adjustable. Decreasing R4/R5 will increase IIP3. LO=965MHz@-10dBm, IF=85.38MHz Mixer Preamp ON, Mix Gain=1 Mixer Preamp OFF, Mix Gain=0 Mixer Preamp ON, Mix Gain=1 Mixer Preamp OFF, Mix Gain=0 Mixer Preamp ON, Mix Gain=1 Mixer Preamp OFF, Mix Gain=0 Mixer Preamp ON, Mix Gain=1 Mixer Preamp OFF, Mix Gain=0 3kΩ balanced load. IIP3 is adjustable. Decreasing R4/R5 will increase IIP3. LOIN=741MHz@-4dBm, IF=110MHz Mixer Preamp ON, Mix Gain=1 Mixer Preamp OFF, Mix Gain=0 Mixer Preamp ON, Mix Gain=1 Mixer Preamp OFF, Mix Gain=0 Mixer Preamp ON, Mix Gain=1 Mixer Preamp OFF, Mix Gain=0 Mixer Preamp ON, Mix Gain=1 Mixer Preamp OFF, Mix Gain=0 8-104 Rev B6 060925 RF2461 Parameter Local Oscillator Input Input Level LO to IF Isolation LO to LNA Isolation -10 -70 -60 2.65 3.0 3.15 dBm dB dB V LNA High Gain/Mixer High Gain. LNA Gain=1, Mix Gain=1. Assumes 3dB Image filter insertion loss. 23.5 -11 26 2.4 -9 26 28 0 dB dB dBm mA LNA High Gain/Mixer Low Gain. LNA Gain=1, Mix Gain=0. Assumes 3dB Image filter insertion loss. 16.5 4.9 0 23 dB dB dBm mA LNA Low Gain/Mixer High Gain. LNA Gain=0, Mix Gain=1. Assumes 3dB Image filter insertion loss. 4 15.5 11.8 22 dB dB dBm mA LNA Low Gain/Mixer Low Gain. LNA Gain=0, Mix Gain=0. Assumes 3dB Image filter insertion loss. -7 +14 -4.5 22.5 +20 18 -3 40 dB dB dBm mA Specification Min. Typ. Max. Unit Condition Any gain state. Power Supply Voltage Cascade High Gain Mode Gain Noise Figure Input IP3 Current Cascade Mid Gain Mode Gain Noise Figure Input IP3 Current Cascade Low Gain Mode Gain Noise Figure Input IP3 Current Cascade Ultra-Low Gain Mode Gain Noise Figure Input IP3 Current Cellular CDMA, IPSET=1 Mode High Gain Mid Gain Low Gain Ultra-Low Gain LNA GAIN 1 1 0 0 MIX GAIN 1 0 1 0 Recommended for IMD Tests 1 and 2 Recommended for IMD Tests 3 and 4 Recommended for IMD Tests 5 and 6 Alternative Lowest Current Mode for IMD Tests 5 and 6 Rev B6 060925 8-105 RF2461 Pin 1 Function LNA GAIN Description Controls the bypass feature of the LNA. A logic low (2.0V) turns on the LNA. Interface Schematic LNA GAIN 2 MIX GAIN Controls the bypass feature of the mixer preamp. A logic low (2.0V) turns on the preamppreamp. LNA input pin. MIX GAIN 3 LNA IN LNA OUT LNA IN GND1B 4 5 VCC1 GND1B VCC pin for all circuits except the LO. Buffer/bias circuitry. LNA emitter. This pin provides the DC path to ground for the LNA. A lumped element or a transmission line inductor can be placed between this pin and ground to degenerate the LNA. This will decrease the gain and increase the IP3 of the LNA. As the value of inductance is increased, these effects will become more pronounced. LNA output pin. An external resistor R2 connected to this pin sets the current of the preamp and the mixer. An external resistor R3 connected to this pin sets the current of the LNA when IP SET is high (see pin 19). Ground pin for preamp circuit. A 3.3nH inductor is used between pin 9 and ground to degenerate the mixer preamp. Degenerating the preamp will reduce the gain, increase the IP3 and affect the preamp input impedance. MIX IN 6 7 8 9 LNA OUT ISET2 ISET1 GND3B See pin 3. VCC2 GND3B 10 11 12 MIX IN IF1IF1+ Mixer preamp input pin. Second differential output pin for the first mixer. First differential output pin for the first mixer. Open collector. A current combiner external network performs a differential to single-ended conversion and sets the output impedance. A DC blocking cap must be present if the IF filter input has a DC path to ground. Mixer (IF2+ and IF-) needs to “see” a differential impedance between 2kΩ to 4kΩ. See pin 9. See pin 12. IF1IF1+ 13 14 BYPASS IF2- Bypass pin for the LO bias reference. Second differential output pin for the second mixer. See pin 15. 8-106 Rev B6 060925 RF2461 Pin 15 Function IF2+ Description First differential output pin for the second mixer. Open collector. A current combiner external network performs a differential to single-ended conversion and sets the output impedance. A DC blocking cap must be present if the IF filter input has a DC path to ground. Mixer (IF2+ and IF2-) needs to “see” a differential impedance between 2kΩ to 4kΩ. Interface Schematic IF2IF2+ 16 17 VCC2 LO IN VCC pin for the LO buffer/bias circuitry. LO limiter input pin. LO IN 18 ENABLE This pin is used to enable or disable the RF2461. A logic high (>2.0V) enables the circuitry. A logic low (