RF2722

Proposed RF2722 GSM/GPRS/EDGE RECEIVER Part of the POLARISTM TOTAL RADIOTM Solution Features LNA VCC GPO1 RX EN RoHS Compliant & Pb-Free Product Package Style: QFN, 32-Pin, 5x5 CLK IN • GSM850, EGSM, DCS & PCS Operation • Supports Both VLIF & DCR Modes • Integrated RF VCO • Integrated LNA’s Support up to Four RF Bands • EDGE Receive Compatible LNA 1P 1 LNA 1N 2 GPO2 SCLK 32 31 30 29 28 27 26 SSB 25 24 DIG/FLT VCC 23 I OUT 22 IB OUT 21 QB OUT 20 Q OUT 19 TX EN 18 TXB IN HB 17 TXB IN LB 16 VCO VCC LNA1 Serial Data Interface LNA 2P 3 LNA2 LNA 2N 4 Quadrature Mixer Polyphase Filter DC Correct LNA 3P 5 LNA3 LNA 3N 6 LNA 4P 7 LNA4 Applications • EGSM/DCS Handsets • EGSM/DCS/PCS Handsets • GSM850/PCS Handsets • GSM850/EGSM/DCS/PCS Handsets LNA 4N 8 9 MIX VCC 10 LO VCC Quadrature Generator 11 VCO OUT 12 TX OUT LB 13 TX OUT HB 14 VT Functional Block Diagram Product Description The RF2722 is a highly-integrated receiver IC supporting GSM, GPRS, and EDGE cellular standards in the GSM850, EGSM, DCS, and PCS bands. The RF2722 supports both very-low intermediate frequency (VLIF) as well as direct conversion receive (DCR) architectures, reducing external component count and eliminating the need for IF SAW and RF interstage filters without compromising performance. The IC includes: four LNA’s for multi-band support; an integrated voltage controlled oscillator (VCO); automatic gain control (AGC); a quadrature downconverting mixer; and, low and high band transmit buffers. Chip functionality, including IF AGC setting, is controlled through a three-wire serial data interface (SDI). The RF2722 is part of the POLARISTM TOTAL RADIOTM solution. Ordering Information RF2722 RF2722PCBA-41X GSM/GPRS/EDGE Receiver Fully Assembled Evaluation Board Optimum Technology Matching® Applied GaAs HBT GaAs MESFET InGaP HBT SiGe BiCMOS Si BiCMOS SiGe HBT GaAs pHEMT Si CMOS Si BJT GaN HEMT RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trademark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc. Rev A4 DS050919 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. VTC SDI 15 1 of 26 RF2722 Absolute Maximum Ratings Parameter Supply Voltage Storage Temperature Input Voltage, any pin Proposed Rating -0.5 to +3.6 -40 to +150 3.6 Unit V °C V Caution! ESD sensitive device. Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent damage to the device. Extended application of Absolute Maximum Rating conditions to the device may reduce device reliability. Specified typical performance or functional operation of the device under Absolute Maximum Rating conditions is not implied. RoHS status based on EUDirective2002/95/EC (at time of this document revision). The information in this publication is believed to be accurate and reliable. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents, or other rights of third parties, resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice. Parameter Operating Range Temperature (TOP) Frequency Range GSM850 RX GSM850 TX EGSM RX EGSM TX DCS RX DCS TX PCS RX PCS TX Supply Voltage (VCC) Power Down Current Active Current RX VLIF Mode Low Band (850/950MHz) High Band (1800/1900MHz) RX DCR Mode Low Band (850/950MHz) High Band (1800/1900MHz) TX Mode Low Band (850/950MHz) High Band (1800/1900MHz) Min. Specification Typ. Max. Unit Condition Temp=-30°C to +85°C, VCC =2.7V to 3.0V, all specifications referenced to 50 Ω, unless specified differently. -30 869 824 925 880 1805 1710 1930 1850 2.7 2.75 +85 894 849 960 915 1880 1785 1990 1910 3.0 °C MHz MHz MHz MHz MHz MHz MHz MHz V Low Band Low Band Low Band Low Band High Band High Band High Band High Band Pins 9 (MIXVCC), 10 (LOVCC), 16 (VCOVCC), 24(DIG/FLT VCC), and 32 (LNAVCC). RX EN=0 10 μA 64 63 77 76 91 90 mA mA All circuits on, (LNA_CURR=10, MIX_CURR=10) All circuits on, (LNA_CURR=00, MIX_CURR=00) All circuits on, (LNA_CURR=10, MIX_CURR=10) All circuits on, (LNA_CURR=00, MIX_CURR=00) VCC =2.8V, PIN =+4dBm Low side LO injection for all bands. Except where noted, receiver specifications defined from LNA input with I or Q channel differential as output. 62.5 61.5 75.5 74.5 89.5 88.5 mA mA 19.5 24.5 25 32 mA mA Receiver System Cascaded Noise Figure Low Band (850/950MHz) High Band (1850/1950MHz) 2.8 3.2 dB dB +25°C, LNA_BYP=0 +25°C, LNA_BYP=0 2 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Rev A4 DS050919 Proposed Low Band (850/950MHz) High Band (1850/1950MHz) Noise Figure with 3MHz Blocker Low Band (850/950MHz) High Band (1800/1900MHz) Cascaded IIP3 Low Band (850/950MHz) High Band (1850/1950MHz) Low Band (850/950MHz) High Band (1850/1950MHz) -15 -14 -12 -11 dBm dBm dBm dBm 3.8 4.7 4.8 5.7 dB dB 4.8 5.2 dB dB RF2722 -30-85°C, LNA_BYP=0 -30-85°C, LNA_BYP=0 +25°C; -26dBm at LNA input. +25°C; -29dBm at LNA input. +25°C; LNA_BYP=0; Interferers at 0.8MHz and 1.6MHz -30-85°C; LNA_BYP=0; Interferers at 0.8MHz and 1.6MHz Rev A4 DS050919 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. 3 of 26 RF2722 Parameter Receiver System, cont’d Cascaded IIP2 (VLIF Improvement not included) Low Band (850/950MHz) High Band (1850/1950MHz) Cascaded P1dB Low Band (850/950MHz) High Band (1850/1950MHz) Cascaded Gain Low Band (850/950MHz) High Band (1850/1950MHz) Gain Compression with 3MHz Blocker Low Band (850/950MHz) High Band (1850/1950MHz) LNA Gain Step Low Band (850/950MHz) High Band (1850/1950MHz) LO Leakage Low Band (850/950MHz) High Band (1850/1950MHz) 2LO Suppression Low Band (850/950MHz) High Band (1850/1950MHz) 3LO Suppression Low Band (850/950MHz) High Band (1850/1950MHz) 5LO Suppression Low Band (850/950MHz) High Band (1850/1950MHz) Image Balance Low Band (850/950MHz) High Band (1850/1950MHz) LNA Input Impedance Low Band (850/950MHz) High Band (1850/1950MHz) LNA Input Return Loss Low Band (850/950MHz) High Band (1850/1950MHz) Absolute Gain Accuracy -3.2 -10 -10 +3.2 82-j156 38-j66 32 32 36 36 -22 -45 -20 -43 -6 -16 -4 -14 -22 -24 -20 -22 -110 -110 -100 -100 15 17 16 18 17 19 1.5 1.0 54.5 53.5 57.5 56.5 60.5 59.5 -22 -23 -20 -21 50 44 50 44 58 52 58 52 Proposed Specification Typ. Unit Condition 1 tone (IIP21)/2 tone (IIP21) LNA_BYP=0 dBm dBm dBm dBm dBm dBm dB dB 1 tone 2 tone 1 tone 2 tone Minimum Gain Minimum Gain LNA_BYP=0; Polyphase Gain=0/12.6/7.4/1/8.4dB LNA_BYP=0; Polyphase Gain=0/12.6/7.4/1/8.4dB Min. Max. dB dB +25°C; LNA_BYP=0; -26dBm at LNA input, with gain settings for a -99dBm wanted signal. +25°C; LNA_BYP=0; -29dBm at LNA input, with gain settings for a -99dBm wanted signal. LNA_BYP=1 LNA_BYP=1 At the LNA input. At the LNA input. LNA_BYP=0 dB dB dBm dBm dB dB LNA_BYP=0 dB dB LNA_BYP=0 dB dB dB dB Ω Ω dB dB dB With external match to 100 Ω With external match to 100 Ω For any recommended AGC setting across frequency and temperature in a single band, for power levels between -110dBm and -48dBm, assuming 1 gain calibration point per band. 4 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Rev A4 DS050919 Proposed Relative Gain Accuracy -1 +1 dB RF2722 For any 20dB gain step, using recommended AGC gain settings for receive power levels in the range -110dBm and -48dBm. Rev A4 DS050919 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. 5 of 26 RF2722 Parameter VCO+LO Chain LO Frequency Output Level to Synth Output Frequency to Synth Tuning Voltage Tuning Line Input Impedance KVCO* LO Phase Noise, Low Band 0.6MHz 1.6MHz 3.0MHz 10.0MHz LO Phase Noise, High Band 0.6MHz 1.6MHz 3.0MHz 10.0MHz -123.0 -133.1 -137.9 -140.0 -121.0 -131.1 -135.9 -138.0 -129.2 -138.4 -142.8 -145.0 -127.2 -136.4 -140.8 -143.0 -27 869 1805 -18.6 434.5 0.5 12 -107 -17.4 960 1990 -16.2 497.5 2.0 Proposed Specification Typ. Unit MHz MHz dBm MHz V MΩ MHz/V GSM850/EGSM dBc/Hz dBc/Hz dBc/Hz dBc/Hz DCS/PCS dBc/Hz dBc/Hz dBc/Hz dBc/Hz DC measurement VCOHL=0 VCOHL=1 2kΩ//5pF load VCO_OUT=VCO/8 Min. Max. Condition Buffers, divide-by-2, divide-by-4, divide-by-8 * When used with an RF600X, the product of KVCO xCharge Pump Current is calibrated to be within 5% of nominal value. 6 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Rev A4 DS050919 Proposed Parameter Polyphase Filter (4th Order) VLIF Mode Center Frequency Half-Bandwidth In-Band Ripple Group Delay Integrated Attenuation 200kHz 400kHz 600kHz >600kHz I/Q Phase Error I/Q Amplitude Error Output Capacitive Load Output Resistive Load Maximum Output Voltage Swing Output Common Mode Voltage Static DC Offset Direct Conversion (DCR) Mode Center Frequency Half-Bandwidth In-Band Ripple Group Delay Integrated Attenuation 200kHz 400kHz 600kHz >600kHz I/Q Phase Error I/Q Amplitude Error Output Capacitive Load Output Resistive Load Maximum Output Voltage Swing Output Common Mode Voltage DC Offset (Uncorrected) 1 1.20 -160 1.23 1.26 +160 30 5.0 23.0 38.0 38.0 1.0 0.1 1.8 0.25 20 dB dB dB dB ° dB pF kΩ VP-P V mV Uncorrected Entire RX chain Entire RX chain -7.5 180 0 200 +7.5 220 0.35 1.3 kHz kHz dB us 1 1.23 -160 1.26 1.29 +160 30 5.0 23.0 38.0 38.0 1.0 0.1 1.8 0.25 20 dB dB dB dB ° dB pF kΩ VP-P V mV Uncorrected Entire RX chain Entire RX chain 99.5 180 107.0 200 114.5 220 0.35 1.3 kHz kHz dB us RF2722 Max. Unit Condition Min. Specification Typ. 130kHz Half-Bandwidth 130kHz Half-Bandwidth 30kΩ RF6001/3 RX A/D input impedance. Differential 130kHz Half-Bandwidth 130kHz Half-Bandwidth 30kΩ RF6001/3 RX A/D input impedance. Differential Rev A4 DS050919 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. 7 of 26 RF2722 Parameter Polyphase Filter (4th Order), cont’d Polyphase Input Attenuator (DCR) (Midband Gain) Gain -0.3 -6.1 -14.0 0 -5.5 -13.0 +0.3 -4.9 -12.0 Proposed Specification Typ. Unit Condition Min. Max. dB dB dB C_G1_1:0=11 C_G1_1:0=10 C_G1_1:0=00 First Pole (DCR) (Midband Gain) Gain 18.6 17.5 16.5 15.5 14.5 13.5 12.5 11.5 10.4 9.4 8.4 7.4 6.4 5.4 4.4 3.4 18.7 17.6 16.6 15.6 14.6 13.6 12.6 11.6 10.5 9.5 8.5 7.5 6.5 5.5 4.5 3.5 18.8 17.7 16.7 15.7 14.7 13.7 12.7 11.7 10.6 9.6 8.6 7.6 6.6 5.6 4.6 3.6 dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB F_G1_3:0=0111 F_G1_3:0=0110 F_G1_3:0=0101 F_G1_3:0=0100 F_G1_3:0=0011 F_G1_3:0=0010 F_G1_3:0=0001 F_G1_3:0=0000 F_G1_3:0=1111 F_G1_3:0=1110 F_G1_3:0=1101 F_G1_3:0=1100 F_G1_3:0=1011 F_G1_3:0=1010 F_G1_3:0=1001 F_G1_3:0=1000 Second Pole (DCR) (Midband Gain) Gain 7.3 -0.9 7.4 -0.7 7.6 -0.5 dB dB S_G2_0=1 S_G2_0=0 Third Pole (DCR) (Midband Gain) Gain 0.9 -6.9 1.0 -6.8 1.1 -6.7 dB dB S_G2_1=1 S_G2_1=0 Fourth Pole (DCR) (Midband Gain) Gain 13.9 8.1 2.2 14.3 8.4 2.5 14.7 8.7 2.8 dB dB dB S_G3_1:0=11 S_G3_1:0=01 S_G3_1:0=00 8 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Rev A4 DS050919 Proposed Parameter DC Offset Correction Residual DC Error DC Correction Time DC Offset Drift Referred to the LNA Input CLK IN Frequency 26 -20 +20 20 -126 mV μs dBm MHz RF2722 Max. Unit Condition Following DC offset correction. Differential measurement. Max gain measured in a window 150 μs to 730 μs after RXEN is activated. CLKF=0 Min. Specification Typ. TX Buffer Low Band Input Power Saturated Output Power Output Power Variation DC Current Drain RF Current Drain Phase Noise Input VSWR Output VSWR Load VSWR Reverse Isolation Forward Isolation High Band Input Power Saturated Output Power Output Power Variation DC Current Drain RF Current Drain Phase Noise Input VSWR Output VSWR Load VSWR Reverse Isolation Forward Isolation 35 28 3 4.9 -1.6 8 18 -160 3:1 2:1 3:1 dB dB 11 24.5 6.5 6 8.1 1.6 13.8 32 dBm dBm dB mA mA dBc/Hz PIN =+4dBm PIN =+4dBm PIN =+4dBm TXEN=H TXEN=L DC with no RF input PIN =+4dBm PIN =+4dBm 20 20 3 6.6 -1.1 5.2 14 -167 3:1 2:1 3:1 dB dB 7.2 19.5 7.7 6 8.8 1.1 9.3 25 dBm dBm dB mA mA dBc/Hz DC with no RF input PIN =+4dBm 20MHz offset PIN =+4dBm PIN =+4dBm PIN =+4dBm TXEN=H TXEN=L PIN =+4dBm Rev A4 DS050919 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. 9 of 26 RF2722 Parameter Serial Interface Input High Voltage (VIH) Input Low Voltage (VIL) Input High Current (IIH) Input Low Current (IIL) Setup Time (TSU) Hold Time (TH) Rise/Fall Time (TRF) Clock to Select Time (TCS) Clock Pulse Width High (TCWH) Clock Pulse Width Low (TCWL) 10 50 50 VCC -0.05 VCC -0.50 Output Low Voltage (VOL) Output Rise/Fall Time (TRFO) 0.05 0.50 5 25 10 10 0.7*VCC 0.3*VCC 5 5 Proposed Specification Typ. Unit V V μA μA ns ns ns ns ns ns Apply to pins: GPO1, GPO2 V V V V ns Applies to CLKIN. 26 600 49kΩ// 480fF VCC/2 250 0.7VCC 0.3VCC V ns V V DC-coupled mode DC-coupled mode Internal bias MHz mVP-P AC-coupled mode 1mA load 10mA load 1mA load 10mA load Min. Max. Condition Applies to pins SCLK, SDI and SSB. Digital Output Drivers Output High Voltage (VOH) 26MHz Reference Clock Input Frequency Range (FR) Input Level (VINR) Input Impedance (ZINR) Interface Voltage Transient Startup Time Input High Voltage (VIH) Input Low Voltage (VIL) Package Drawing 10 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Rev A4 DS050919 Proposed Pin 1 Function LNA 1P Description RF input to LNA 1. Internally matched for 800MHz to 1000MHz operation. This pin possesses a DC voltage with respect to ground, and a series blocking cap may be required in some applications. RF2722 Interface Schematic BIAS + - 2 3 LNA 1N LNA 2P Complementary input to pin 1. This pin possesses a DC voltage with See Pin 1. respect to ground, and a series blocking cap may be required in some applications. RF input to LNA 2. Internally matched for 800MHz to 1000MHz operation. This pin possesses a DC voltage with respect to ground, and a series blockBIAS ing cap may be required in some applications. + - 4 5 LNA2N LNA 3P Complementary input to pin 3. This pin possesses a DC voltage with respect to ground, and a series blocking cap may be required in some applications. RF input to LNA 3. Internally matched for 1800MHz to 2000MHz operation. This pin possesses a DC voltage with respect to ground, and a series blocking cap may be required in some applications. See Pin 3. BIAS + - 6 7 LNA 3N LNA 4P Complementary input to pin 5. This pin possesses a DC voltage with respect to ground, and a series blocking cap may be required in some applications. RF input to LNA 4. Internally matched for 1800MHz to 2000MHz operation. This pin possesses a DC voltage with respect to ground, and a series blocking cap may be required in some applications. See Pin 5. BIAS + - 8 9 LNA 4N MIX VCC Complementary input to pin 7. This pin possesses a DC voltage with respect to ground, and a series blocking cap may be required in some applications. Supply for the quadrature mixer. See Pin 7. MIX VCC LOAD 10 LO VCC VCO divider supply. LO VCC BIAS 11 VCO OUT Output from the VCO to drive the synthesizer input. This is the VCO divided by 8. VCO OUT 12 TXB OUT LB Low band TX buffer output. TXB OUT LB Rev A4 DS050919 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. 11 of 26 RF2722 Pin 13 Function TXB OUT HB Description High band TX buffer output. Proposed Interface Schematic TXB OUT HB 14 VT Tuning control line for the VCO. Analog input. VT VCO VCC VCO VCC 15 16 VTC VCO VCC Coarse VCO tuning control driven by RF6001. Digital input. VTC Supply for the RF VCO. VCO VCC LOAD 17 18 19 TXB IN LB TXB IN HB TX EN 20 Q OUT TX buffer low band input. This is a high impedance voltage-driven input designed to be driven by the RF6001/3 TXVCO output. TX buffer high band input. This is a high impedance voltage-driven input designed to be driven by the RF6001/3 TXVCO output. TX buffer enable. If the TX SEL (CRX1[2]) bit is set high, the TX buffers are enabled by this pin. If the TX SEL bit is set low, this pin has no effect on the activation of the TX buffers. (See register map for more information.) The TX buffers are enabled by setting this pin high. The TX buffers are disabled by setting this pin low. Q-channel differential IF output. Q OUT 21 QB OUT Complementary output to Q OUT. QB OUT 22 IB OUT Complementary output to I OUT. IB OUT 23 I OUT I-channel differential IF output. I OUT 24 DIG/FLT VCC Supply for all digital circuitry. Supply for the filter. DIG/FLT VCC LOAD 12 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Rev A4 DS050919 Proposed Pin 25 26 27 28 29 30 Function SSB SDI SCLK CLK IN RX EN GPO1 Description SDI enable input (active low). RF2722 Interface Schematic SSB SDI data input. SDI SDI clock input. SCLK Clock input for the DC offset correction system. A 26MHz clock must be applied to this pin for proper operation of the DC offset correction system. Set to VCC to activate the IC. Set to GND to deactivate. CLK IN RX EN General purpose digital output 1. Controlled via SDI programming. GPO1 31 GPO2 General purpose digital output 2. Controlled via SDI programming. GPO2 32 RX VCC Supply for the LNA’s. RX VCC BIAS Rev A4 DS050919 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. 13 of 26 RF2722 Proposed Package Drawing 2 PLCS 0.10 C A -A- 0.05 C 0.90 0.85 5.00 SQ. 2.50 TYP. 0.70 0.65 3 2 PLCS 0.10 C B 0.05 0.00 2 PLCS 0.10 C B 12° MAX -B2.37 TYP. 2 PLCS 0.10 C A -C- SEATING PLANE 4.75 SQ. 0.10 M C A B 0.60 0.24 TYP. 0.30 0.18 2 Shaded lead is pin 1. Dimensions in mm. Pin 1 ID R.20 3.45 SQ. 3.15 0.50 0.30 0.50 14 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Rev A4 DS050919 Proposed Detailed Functional Block Diagram LNA VCC CLK IN RX EN GPO2 GPO1 SCLK SSB RF2722 32 LNA 1P 1 LNA1 31 30 29 28 27 SDI 26 25 24 DIG/FLT VCC LNA 1N 2 Serial Data Interface 23 I OUT LNA 2P 3 LNA2 22 IB OUT LNA 2N 4 Quadrature Mixer Polyphase Filter DC Correct 21 QB OUT LNA 3P 5 LNA3 20 Q OUT LNA 3N 6 19 TX EN LNA 4P 7 LNA4 Quadrature Generator 18 TXB IN HB LNA 4N 8 9 MIX VCC 10 LO VCC 17 TXB IN LB 13 TX OUT HB 14 VT 15 VTC 16 VCO VCC 11 VCO OUT 12 TX OUT LB Rev A4 DS050919 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. 15 of 26 RF2722 26 MHz Clock Input RX Enable from RF6001/3 or RX Controller GPO1 GPO2 VCC Proposed Application Schematic To Serial Port Controller 32 1 LNA1 Serial Data Interface 150 Ω EGSM or GSM850 RF SAW Filter EGSM/GSM850 RF INPUT 150 Ω EGSM or GSM850 RF SAW Filter EGSM/GSM850 RF INPUT 100 Ω PCS or DCS RF SAW Filter PCS/DCS RF INPUT 31 30 29 28 27 26 25 24 VCC 2 23 3 LNA2 22 4 Quadrature Mixer Polyphase Filter DC Correct 21 To RF6001/3 or VLIF-to-Baseband Converter 5 LNA3 20 6 100 Ω DCS or PCS RF SAW Filter PCS/DCS RF INPUT 8 9 VCC 10 19 TX EN 7 LNA4 Quadrature Generator 18 HB TXVCO Output from RF6001/3 17 13 14 15 16 VCC LB TXVCO Output from RF6001/3 11 12 To RF6001/3 or PLL (See Note) 10 nF 4.7 μF To RF31XX PA HB Input To RF31XX PA LB Input BP 4 VO 5 3 CE 2 GND 1 VIN National LP2985 2.8 V Low-Dropout Regulator or Equivalent NOTE If external PLL is used for RF2722 VCO Control, VTC must be manually toggled to place the VCO in appropriate frequency range to achieve lock. VBATT 2.2 μF 16 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Rev A4 DS050919 Proposed Application Information Functional Description The RF2722 receiver IC will support GSM and EDGE cellular standards. RF2722 Four Low Noise Amplifiers (LNA’s) are provided to accommodate various combinations of up to four bands. The four LNA’s share a common quadrature mixer. The active LNA is selected and may be bypassed through the Serial Data Interface (SDI). An RX Local Oscillator (VCO) is provided. The VCO is fully integrated including an internal resonator and is band-selectable to cover the GSM850, EGSM, DCS, and PCS bands. The desired signal is converted to either a VLIF (100kHz/120kHz) or directly to DC, as determined by the setting of bit 1 in SDI register CF. Once downconverted, the signal is filtered by an active RC Polyphase bandpass filter. The purpose of this filter is to provide some rejection to interfering signals such that the dynamic range of the A/D converters will not be compromised. The RF2722 also includes two reverse isolation dual-band buffer amplifiers. These buffers are suitable for use in the transmit path between the VCO output and the PA input to improve transmit performance. The RF2722 accepts single-ended inputs from the RF6001/3 and provides single-ended outputs to the PA. DC Correction Operation The Polaris RF2722 VLIF/DCR IC will reduce the residual DC error of the I and Q channels to less than 20mV within 20usec assuming that no input signal is present during the DC adapt time. The DC correction system will activate on the rising edge of RX_EN if the SDI bit DC_EN is programmed true. Programming the SDI bit DC_ST true can also activate the DC correction system. In this case the SDI bit DC_ST will automatically return to a false state once the DC correction system is activated. The RF6001/3 also has an RX_EN pin that normally is set high at the same time as the RX_EN of the RF2722. The DC correction system of the RF2722 will run for DC_TIME1 cycles of the clock present on CLK_IN divided by 16. This should be set for approximately 20usec. With a 26MHz clock on CLK_IN the setting of DC_TIME1 will be 20H. Given the low levels of LO leakage to the LNA inputs of the RF2722, the coarse DC adapt will be performed when RX_EN rises with the LNAs disabled. The residual DC error due to LO leakage when the LNAs are enabled will be less than 5mV. Once completed the DC correction outputs of the RF2722 will be held until power is removed from the IC or until another DC correction command is issued. During operation of the DC correction system the input signal should be muted so that the coarse DC correction system does not attempt to lock to the instantaneous signal level. This can be accomplished by disabling all LNAs. This mode is selected if the LND SDI bit is programmed true. This is performed for DC_TIME2 clock cycles of CLK_IN divided by 16 beginning at the DC correction command time so that the RF2722 will have sufficient time to complete DC correction. If the radio employs a T/R switch then the T/R switch can also be used to disable the signal instead of or in addition to disabling the LNAs. The RF2722 can be used to automatically disable the T/R switch if the SDI bit TRD is programmed true. In this case it is assumed that GPO1 and GPO2 provide on/off control for each of the possible bands of the receive side of the T/R switch. During the DC control time interval set by DC_TIME2 the outputs of GPO1 and GPO2 will be overridden by the SDI register TRDC. The bits of this register can be set to 0 or 1 as needed by the particular T/R switch implementation to deactivate the receiver inputs. After DC_TIME2 has expired the normally programmed GPO states will return. After the coarse DC adapt time has elapsed then the RF6001/3 will require an additional time of approximately 50usec to complete the fine digital DC correction. Note that the input signal may be present during the final DC correction time of the RF6001/3. For VLIF modes this will not cause a DC problem since the RF6001/3 does an averaging of the DC error and there will be few components of the signal Rev A4 DS050919 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. 17 of 26 RF2722 Proposed near DC. In addition, the RF6001/3 will notch out 100kHz converted DC components for channel bandwidths less than or equal to 85kHz. The RF6003 will also notch out 120kHz converted DC components for channel bandwidth of 90kHz. This is only useful in VLIF mode. In DCR mode there may be significant spectral content near DC during the final adapt of the RF6001/3. This may result in a significant DC component that will track the input desired signal level. It is assumed that the baseband DSP will be able to remove any such static DC error. In addition, if the DC adapt of the RF6001/3 is performed during the guard times then the spectral content of the input signal should be a tone in the region of 50kHz to 70kHz and should not interfere with the DC adapt process. If DC_TIME2 is extended to encompass the fine DC adapt time of the RF6001/3 then the input signal will not interfere with the adapt process as the LNAs will be muted. However, if there is any residual LO leakage into the LNA input then this error will remain after the DC correction process. This may be a smaller residual error than that due to the input signals. A diagram depicting the composite DC correction and RX startup of the RF2722 and RF6001/3 is presented below. System Warm-Up t=-120usec t=-140usec Activate RF2722/ RF2722 DCOCl completed RF6001/3 t=-90usec Initial Cal completed t=-20usec RF6001/3 PLL lock completed t=0usec RF6001/3 DCOC completed BURST STARTS t=42 RF6001/3 filter data flushed receive valid data RX_EN, EN_SE RF2722 Turn on Initial Calibration PLL Lockup RF2722 RXI, Q DCOC RF6001/3 RXI,Q DCOC DC_TIME1