RF2948BPCBA

RF2948B 0 Typical Applications • IEEE 802.11b WLANs • Wireless Residential Gateways • Secure Communication Links Product Description The RF2948B is a monolithic integrated circuit specifically designed for direct-sequence spread-spectrum systems operating in the 2.4GHz ISM band. The part includes: a direct conversion from IF receiver with variable gain control; quadrature demodulator; I/Q baseband amplifiers; and, on-chip programmable baseband filters. For the transmit side, a QPSK modulator and upconverter are provided. The design reuses the IF SAW filter for transmit and receive reducing the number of SAW filters required. Two-cell or regulated three-cell (3.6V maximum) battery applications are supported by the part. The part is also designed to be part of a 2.4GHz chipset consisting of the RF2494 LNA/Mixer, one of the many RFMD high-efficiency GaAs HBT PA’s and the RF3000 Baseband Processor. Optimum Technology Matching® Applied Si BJT Si Bi-CMOS InGaP/HBT GaAs HBT SiGe HBT GaN HEMT Si CMOS 2.4GHz SPREAD-SPECTRUM TRANSCEIVER • High Speed Digital Links • Wireless Security • Digital Cordless Telephones IG N S -A5.00 SQ. 2.50 TYP. 3 2 PLCS 0.10 C A 0.05 C 0.90 0.85 0.70 0.65 2 PLCS 0.10 C B 0.05 0.00 2 PLCS 0.10 C B 12° MAX E S -B-C2.37 TYP. 4.75 SQ. 0.10 M C A B 0.60 0.24 TYP. 0.30 0.18 2 SEATING PLANE 2 PLCS 0.10 C A D Shaded lead is pin 1. Pin 1 ID R.20 Dimensions in mm. W 3.45 SQ. 3.15 0.50 0.30 N E 0.50 Package Style: QFN, 32-Pin, 5x5 GaAs MESFET SiGe Bi-CMOS Features • 45MHz to 500MHz IF Quad Demod • On-Chip Variable Baseband Filters • Quadrature Modulator and Upconverter • 2.7V to 3.6V Operation • Part of IEEE802.11b Chipset FO BW CTRL RX VGC VREF 1 32 31 30 VCC2 29 BW Control R DCFB Q 28 DC Feedback gm-C LPF gm-C LPF VREF1 BUF DCFB I 27 26 25 PD 1 N O T RX EN 2 Logic RX IF BIAS 3 REF DC Feedback Q OUT • 2.4GHz PA Driver 24 I OUT TX Bias VCC1 4 RX IF IN 5 23 VCC4 TX IF IN 6 gm-C LPF 22 TXQ DATA VCC9 7 21 TXQ BP Ordering Information RF2948B RF2948BTR13 RF2948B PCBA 2.4GHz Spread-Spectrum Transceiver 2.4GHz Spread-Spectrum Transceiver (Tape & Reel) Fully Assembled Evaluation Board Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com Σ TX VGC 8 ÷2 Phase Splitter gm-C LPF 20 TXI DATA 19 TXI BP 18 IF1 OUT+ 17 IF1 OUT9 IF LO 10 VCC8 11 VCC6 12 PA OUT 13 PA IN 14 VCC5 15 RF LO 16 Functional Block Diagram RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA NOT FOR NEW DESIGNS Rev A6 040930 RF OUT 11-239 RF2948B Absolute Maximum Ratings Parameter Supply Voltage Control Voltages Input RF Level LO Input Levels Operating Ambient Temperature Storage Temperature MSL JEDEC level 3 at 240oC Refer to “Handling of PSOP and PSSOP Products” on page 16-15 for special handling information. Rating -0.5 to +3.6 -0.5 to +3.6 +12 +5 -40 to +85 -40 to +150 Unit VDC VDC dBm dBm °C °C Refer to “Soldering Specifications” on page 16-13 for special soldering information. Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Parameter Overall Receiver RX Frequency Range Cascaded Voltage Gain Cascaded Noise Figure Cascaded Input IP3 Cascaded Input IP3 IF LO Leakage Quadrature Phase Variation Quadrature Amplitude Variation Output P1dB Distortion Unit D ±3 +1 2 7.5 VREF1+15 35 0.1 ±30 50 115 -68 0 0 W 1.2 Gain Noise Figure IF Input Impedance N E IF AMP and Quad Demod 65 4.5 70 5.5 515-j994 2 700 VREF1 10 RX Baseband Filters Passband Ripple Baseband Filter 3dB Frequency Accuracy Group Delay Baseband Filter 3dB Bandwidth FO THD Output Voltage DC Output Voltage R RX Baseband Amplifiers VREF1-15 1 N O T ±10 15 400 >80 20 Group Delay Baseband Filter Ultimate Rejection Output Impedance 11-240 E S dB VPP % dB dB Ω % mVPP mV MHz dB % ns ns dB Ω 45 65 0 5.5 374 500 76 3 35.0 MHz dB dB dB dBµV dBµV dBm ° IG N S Specification Min. Typ. Max. Condition T=25 °C, VCC =3.0V, Freq=374MHz, RBW =10kΩ RX VGC =1.2V RX VGC =2.0V Varies with gain. VGC < 1.2V VGC>2.0V f=374MHz, LO Power=-10dBm With expected LO amplitude and harmonic content. 1.4 5k Ω, < 15pF load. Rev A6 040930 RF2948B Parameter Transmit Modulator and LPF Filter Gain Baseband Filter 3dB Bandwidth Passband Ripple Group Delay Group Delay Ultimate Rejection Input Impedance Input AC Voltage Input P1dB Input DC Offset Requirement IF Frequency Range Differential Output Resistance Differential Output Capacitance Shunt Output Capacitance I/Q Phase Balance I/Q Gain Balance Conversion Transconductance Carrier Output -18 0 1 15 400 >80 3 100 200 1.6 45 1.7 22 0.436 0.4 0 0 0.0185 -26 1.8 500 35 0.1 dB MHz dB ns ns dB kΩ mVp-p mVp-p V MHz kΩ pF pF Any setting 5th order Bessel LPF, Set by BW CTRL At 35MHz, increasing as bandwidth decreases. At 2MHz. Single-ended Linear, Single-ended. Single-ended. For correct operation. Between output pins. Open collector when TX on, Hi Z when TX off Between output pins. From each pin to ground. Specification Min. Typ. Max. Unit Condition E S ±3 ±1 dB S D Harmonic Outputs W -30 VGA/Mixer Output Power FO R VGA Gain Range VGA Control Voltage Range VGA Gain Sensitivity VGA Input Impedance RF Mixer Output Impedance VGA/Mixer Conversion Gain VGA/Mixer Output Power N E Transmit VGA and Upconverter 17 1.0 to 2.0 17 515-j994 50 -3 to +14 -9 -4 N O T Rev A6 040930 IG N S dBc dBc dB V dB/V Ω Ω dB dBm dBm Positive Slope Single-ended voltage input to differential output current conversion gain. Without external offset adjustments. 374MHz. Compared to modulated signal, 100mVP-P input. 374MHz With matching elements. With 50 Ω match on the output. 1dB compression - Single Sideband, TX GC=1.0V. (Desired signal power) 1dB compression - Single Sideband, TX GC=2.0V. (Desired signal power) 11-241 RF2948B Parameter Transmit Power Amp Linear Output Power Gain Output P1dB Output Impedance Input Impedance 6 9 12 50 50 VCC +0.3V 0 >1 200 2 330 1.33 50 0.3 dBm dB dBm Ω Ω V V MΩ ns µs ns ms µs Specification Min. Typ. Max. Unit Condition 10 Nominal Nominal Voltage supplied to the input, not to exceed 3.6V. Voltage supplied to the input. Full step in gain, to 90% of final output level. I/Q output VALID To IF output VALID To I/Q output VALID To IF output VALID The IF LO is divided by 2 and split into quadrature signals to drive the frequency mixers. f=748MHz peak (2x IF Frequency) f=2.04GHz unmatched. Power Down Control Logical Controls “ON” Logical Controls “OFF” Control Input Impedance RX VGC Response TIme RX EN Response TIme TX EN Response TIme VPD to RX Response TIme VPD to TX Response TIme VCC -0.3V -0.3 RF LO Input Input Impedance Input Power Range Input Frequency 33-j110 -10 2000 D 0 2400 1 VREF1+10 1.8 3.6 85 136 Input Impedance Input Power Range Input Frequency -15 90 1050-j1200 -10 0 1000 VREF1 Buffered Source/Sink Current Output Voltage VREF1 VREF1-10 1.6 2.7 W 1.7 3.3 1 18 65 70 110 95 105 115 Power Supply Voltage Total Current Consumption Sleep Mode Current PA Driver Current RX Current BW (MHz) 9 12-20 20-30 TX Current BW (MHz) 9 12-20 20-30 N E R FO N O T 11-242 E S Ω dBm MHz Ω dBm MHz mA mV V V µA mA mA mA mA mA mA mA IF LO Input IG N S VCC =3.3V, Baseband BW 1MHz to 40MHz PD=0, RX EN=1 TX EN=1 Rev A6 040930 RF2948B Pin 1 Function PD Description This pin is used to power up or down the transmit and receive baseband sections. A logic high powers up the quad demod mixers, TX and RX GmC LPF’s, baseband VGA amps, data amps, and IF LO buffer amp/ phase splitter. A logic low powers down the entire IC for sleep mode. Also, see State Decode Table. Interface Schematic VCC Pins 3, 4, 5 10 kΩ ESD To Logic 2 RX EN Power supply for RX VGA amplifier, IC logic and RX references. 6 TX IF IN D IF input for receiver section. Must have DC-blocking cap. The capacitor See pin 6. value should be appropriate for the IF frequency. For half-duplex operation, connect RX IF IN and TX IF IN signals together after the DC blocking caps, then run a transmission line from the output of the IF SAW. AC coupling capacitor must be less than 150pF to prevent delay in switching RX to TX/TX to RX. Input for the TX IF signal after SAW filter. External DC-blocking cap IF required. For half-duplex operation, connect RX IF IN and TX IF IN sigSAW nals together after the DC-blocking caps, then run a transmission line Filter from the output of the IF SAW. AC coupling capacitor must be less than 150pF to prevent delay in switching RX to TX/TX to RX. E S IG N S IF VCO From TX RF Image Filter 3 4 5 RX IF BIAS VCC1 RX IF IN Enable pin for the receiver 15dB gain IF amp and the RX VGA amp. Powers up all receiver functions when PD is high, turns off the receiver IF circuits when low. Also, see State Decode Table. When this pin is a logic “high”, the device is in receive mode. When this pin is a logic “low”, the device is in transmit mode. Shunt resistor of 23.7±1% to ground. Biases IF AMPS. See pin 1. 50 Ω µstrip DC Block Pin 7 Pin 8 IF LO input. Must have DC-blocking cap. The capacitor value should be appropriate for the IF frequency. LO frequency=2xIF. Quad mod/demod phase accuracy requires low harmonic content from IF LO, so it is recommended to use an n=3 LPF between the IF VCO and IF LO. This is a high impedance input and the recommended matching approach is to simply add a 100 Ω shunt resistor at this input to constrain the mismatch. W 7 8 9 VCC9 TX VGC IF LO Power supply for the TX 15dB gain amp and TX VGA. Gain control setting for the transmit VGA. Positive slope. Recommended Matching Network for IF LO C2 150 pF IF LO Pin 9 N E 100 Ω FO 10 11 12 VCC8 VCC6 PA OUT R Power supply for IF LO buffer and quadrature phase network. Power supply for transmitter bias generator. VCC This is the output transistor of the power amp stage. It is an open collector output. The output match is formed by an inductor to VCC, which supplies DC and a series cap. 22 nF CBYP L C Power Amp Output N O T PA OUT 14 mA PA IN Bias Rev A6 040930 11-243 RF2948B Pin 13 14 Function PA IN VCC5 Description Input to the power amplifier stage. This is a 50 Ω input. Requires DCblocking/tuning cap. Supply for the RF LO buffer, RF upconverter and amplifier. Interface Schematic See pin 12. VCC VCC CBYP 22 nF CBYP 22 nF To TX RF Image Filter VCC5 From TX VGA RF OUT 12 mA VB 15 16 17 RF LO RF OUT IF1 OUT- 18 IF1 OUT+ 19 20 21 22 23 24 25 26 27 28 29 30 TXI BP TXI DATA TXQ BP TXQ DATA VCC4 I OUT Q OUT This is the in-phase modulator bypass pin. A 10nF capacitor to ground is recommended. I input to the baseband 5 pole Bessel LPF for the transmit modulator. This is the quadrature phase modulator bypass pin. A 10nF capacitor to ground is recommended. Q input to the baseband 5 pole Bessel LPF for the transmit modulator. Power supply for quadrature modulator. Baseband analog signal output for in-phase channel. 700mVP-P linear output. Baseband analog signal output for quadrature channel. 700mVP-P linear output. Buffered version of the VREF1 output. See pin 31. Sink/Source current